by T2Cert
| 11 | 15 | 12: | 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ − len_180_0 ≤ 0 ∧ ct_17_0 − ct_17_post ≤ 0 ∧ − ct_17_0 + ct_17_post ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_0 − result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_0 + result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ x_14_0 − x_14_post ≤ 0 ∧ − x_14_0 + x_14_post ≤ 0 ∧ x_16_0 − x_16_post ≤ 0 ∧ − x_16_0 + x_16_post ≤ 0 ∧ x_SLAM_f_18_0 − x_SLAM_f_18_post ≤ 0 ∧ − x_SLAM_f_18_0 + x_SLAM_f_18_post ≤ 0 ∧ − y_19_post + y_19_post ≤ 0 ∧ y_19_post − y_19_post ≤ 0 ∧ − y_19_2 + y_19_2 ≤ 0 ∧ y_19_2 − y_19_2 ≤ 0 ∧ − y_19_1 + y_19_1 ≤ 0 ∧ y_19_1 − y_19_1 ≤ 0 ∧ − y_19_0 + y_19_0 ≤ 0 ∧ y_19_0 − y_19_0 ≤ 0 ∧ − x_SLAM_f_18_2 + x_SLAM_f_18_2 ≤ 0 ∧ x_SLAM_f_18_2 − x_SLAM_f_18_2 ≤ 0 ∧ − x_SLAM_f_18_1 + x_SLAM_f_18_1 ≤ 0 ∧ x_SLAM_f_18_1 − x_SLAM_f_18_1 ≤ 0 ∧ − x_34_post + x_34_post ≤ 0 ∧ x_34_post − x_34_post ≤ 0 ∧ − x_34_1 + x_34_1 ≤ 0 ∧ x_34_1 − x_34_1 ≤ 0 ∧ − x_34_0 + x_34_0 ≤ 0 ∧ x_34_0 − x_34_0 ≤ 0 ∧ − x_28_post + x_28_post ≤ 0 ∧ x_28_post − x_28_post ≤ 0 ∧ − x_28_1 + x_28_1 ≤ 0 ∧ x_28_1 − x_28_1 ≤ 0 ∧ − x_28_0 + x_28_0 ≤ 0 ∧ x_28_0 − x_28_0 ≤ 0 ∧ − x_238_post + x_238_post ≤ 0 ∧ x_238_post − x_238_post ≤ 0 ∧ − x_238_0 + x_238_0 ≤ 0 ∧ x_238_0 − x_238_0 ≤ 0 ∧ − x_20_post + x_20_post ≤ 0 ∧ x_20_post − x_20_post ≤ 0 ∧ − x_20_2 + x_20_2 ≤ 0 ∧ x_20_2 − x_20_2 ≤ 0 ∧ − x_20_1 + x_20_1 ≤ 0 ∧ x_20_1 − x_20_1 ≤ 0 ∧ − x_20_0 + x_20_0 ≤ 0 ∧ x_20_0 − x_20_0 ≤ 0 ∧ − x_177_post + x_177_post ≤ 0 ∧ x_177_post − x_177_post ≤ 0 ∧ − x_177_0 + x_177_0 ≤ 0 ∧ x_177_0 − x_177_0 ≤ 0 ∧ − x_16_1 + x_16_1 ≤ 0 ∧ x_16_1 − x_16_1 ≤ 0 ∧ − tmp_48_post + tmp_48_post ≤ 0 ∧ tmp_48_post − tmp_48_post ≤ 0 ∧ − tmp_48_0 + tmp_48_0 ≤ 0 ∧ tmp_48_0 − tmp_48_0 ≤ 0 ∧ − temp_49_post + temp_49_post ≤ 0 ∧ temp_49_post − temp_49_post ≤ 0 ∧ − temp_49_0 + temp_49_0 ≤ 0 ∧ temp_49_0 − temp_49_0 ≤ 0 ∧ − temp0_45_post + temp0_45_post ≤ 0 ∧ temp0_45_post − temp0_45_post ≤ 0 ∧ − temp0_45_1 + temp0_45_1 ≤ 0 ∧ temp0_45_1 − temp0_45_1 ≤ 0 ∧ − temp0_45_0 + temp0_45_0 ≤ 0 ∧ temp0_45_0 − temp0_45_0 ≤ 0 ∧ − temp0_32_post + temp0_32_post ≤ 0 ∧ temp0_32_post − temp0_32_post ≤ 0 ∧ − temp0_32_4 + temp0_32_4 ≤ 0 ∧ temp0_32_4 − temp0_32_4 ≤ 0 ∧ − temp0_32_3 + temp0_32_3 ≤ 0 ∧ temp0_32_3 − temp0_32_3 ≤ 0 ∧ − temp0_32_2 + temp0_32_2 ≤ 0 ∧ temp0_32_2 − temp0_32_2 ≤ 0 ∧ − temp0_32_1 + temp0_32_1 ≤ 0 ∧ temp0_32_1 − temp0_32_1 ≤ 0 ∧ − temp0_32_0 + temp0_32_0 ≤ 0 ∧ temp0_32_0 − temp0_32_0 ≤ 0 ∧ − temp0_15_0 + temp0_15_0 ≤ 0 ∧ temp0_15_0 − temp0_15_0 ≤ 0 ∧ − t_23_post + t_23_post ≤ 0 ∧ t_23_post − t_23_post ≤ 0 ∧ − t_23_1 + t_23_1 ≤ 0 ∧ t_23_1 − t_23_1 ≤ 0 ∧ − t_23_0 + t_23_0 ≤ 0 ∧ t_23_0 − t_23_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_post + result_dot_printf_sdv_special_RETURN_VALUE_41_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_post − result_dot_printf_sdv_special_RETURN_VALUE_41_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_1 + result_dot_printf_sdv_special_RETURN_VALUE_41_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_1 − result_dot_printf_sdv_special_RETURN_VALUE_41_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_0 + result_dot_printf_sdv_special_RETURN_VALUE_41_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_0 − result_dot_printf_sdv_special_RETURN_VALUE_41_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_post + result_dot_printf_sdv_special_RETURN_VALUE_38_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_post − result_dot_printf_sdv_special_RETURN_VALUE_38_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_1 + result_dot_printf_sdv_special_RETURN_VALUE_38_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_1 − result_dot_printf_sdv_special_RETURN_VALUE_38_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_0 + result_dot_printf_sdv_special_RETURN_VALUE_38_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_0 − result_dot_printf_sdv_special_RETURN_VALUE_38_0 ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_1 + result_dot_nondet_sdv_special_RETURN_VALUE_13_1 ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_1 − result_dot_nondet_sdv_special_RETURN_VALUE_13_1 ≤ 0 ∧ − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post + result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post ≤ 0 ∧ result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post ≤ 0 ∧ − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 + result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 ≤ 0 ∧ result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 ≤ 0 ∧ − result_11_post + result_11_post ≤ 0 ∧ result_11_post − result_11_post ≤ 0 ∧ − result_11_6 + result_11_6 ≤ 0 ∧ result_11_6 − result_11_6 ≤ 0 ∧ − result_11_5 + result_11_5 ≤ 0 ∧ result_11_5 − result_11_5 ≤ 0 ∧ − result_11_4 + result_11_4 ≤ 0 ∧ result_11_4 − result_11_4 ≤ 0 ∧ − result_11_3 + result_11_3 ≤ 0 ∧ result_11_3 − result_11_3 ≤ 0 ∧ − result_11_2 + result_11_2 ≤ 0 ∧ result_11_2 − result_11_2 ≤ 0 ∧ − result_11_1 + result_11_1 ≤ 0 ∧ result_11_1 − result_11_1 ≤ 0 ∧ − result_11_0 + result_11_0 ≤ 0 ∧ result_11_0 − result_11_0 ≤ 0 ∧ − rcd_72_post + rcd_72_post ≤ 0 ∧ rcd_72_post − rcd_72_post ≤ 0 ∧ − rcd_72_0 + rcd_72_0 ≤ 0 ∧ rcd_72_0 − rcd_72_0 ≤ 0 ∧ − rcd_102_post + rcd_102_post ≤ 0 ∧ rcd_102_post − rcd_102_post ≤ 0 ∧ − rcd_102_0 + rcd_102_0 ≤ 0 ∧ rcd_102_0 − rcd_102_0 ≤ 0 ∧ − r_53_post + r_53_post ≤ 0 ∧ r_53_post − r_53_post ≤ 0 ∧ − r_53_0 + r_53_0 ≤ 0 ∧ r_53_0 − r_53_0 ≤ 0 ∧ − r_161_post + r_161_post ≤ 0 ∧ r_161_post − r_161_post ≤ 0 ∧ − r_161_0 + r_161_0 ≤ 0 ∧ r_161_0 − r_161_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 ≤ 0 ∧ − nondet_12_post + nondet_12_post ≤ 0 ∧ nondet_12_post − nondet_12_post ≤ 0 ∧ − nondet_12_1 + nondet_12_1 ≤ 0 ∧ nondet_12_1 − nondet_12_1 ≤ 0 ∧ − nondet_12_0 + nondet_12_0 ≤ 0 ∧ nondet_12_0 − nondet_12_0 ≤ 0 ∧ − lt_37_post + lt_37_post ≤ 0 ∧ lt_37_post − lt_37_post ≤ 0 ∧ − lt_37_1 + lt_37_1 ≤ 0 ∧ lt_37_1 − lt_37_1 ≤ 0 ∧ − lt_37_0 + lt_37_0 ≤ 0 ∧ lt_37_0 − lt_37_0 ≤ 0 ∧ − lt_36_post + lt_36_post ≤ 0 ∧ lt_36_post − lt_36_post ≤ 0 ∧ − lt_36_0 + lt_36_0 ≤ 0 ∧ lt_36_0 − lt_36_0 ≤ 0 ∧ − lt_237_post + lt_237_post ≤ 0 ∧ lt_237_post − lt_237_post ≤ 0 ∧ − lt_237_0 + lt_237_0 ≤ 0 ∧ lt_237_0 − lt_237_0 ≤ 0 ∧ − length_43_post + length_43_post ≤ 0 ∧ length_43_post − length_43_post ≤ 0 ∧ − length_43_0 + length_43_0 ≤ 0 ∧ length_43_0 − length_43_0 ≤ 0 ∧ − len_246_post + len_246_post ≤ 0 ∧ len_246_post − len_246_post ≤ 0 ∧ − len_246_0 + len_246_0 ≤ 0 ∧ len_246_0 − len_246_0 ≤ 0 ∧ − len_180_post + len_180_post ≤ 0 ∧ len_180_post − len_180_post ≤ 0 ∧ − len_180_0 + len_180_0 ≤ 0 ∧ len_180_0 − len_180_0 ≤ 0 ∧ − i_44_post + i_44_post ≤ 0 ∧ i_44_post − i_44_post ≤ 0 ∧ − i_44_0 + i_44_0 ≤ 0 ∧ i_44_0 − i_44_0 ≤ 0 ∧ − i_125_post + i_125_post ≤ 0 ∧ i_125_post − i_125_post ≤ 0 ∧ − i_125_0 + i_125_0 ≤ 0 ∧ i_125_0 − i_125_0 ≤ 0 ∧ − i_108_post + i_108_post ≤ 0 ∧ i_108_post − i_108_post ≤ 0 ∧ − i_108_0 + i_108_0 ≤ 0 ∧ i_108_0 − i_108_0 ≤ 0 ∧ − head_46_post + head_46_post ≤ 0 ∧ head_46_post − head_46_post ≤ 0 ∧ − head_46_0 + head_46_0 ≤ 0 ∧ head_46_0 − head_46_0 ≤ 0 ∧ − fmt_31_post + fmt_31_post ≤ 0 ∧ fmt_31_post − fmt_31_post ≤ 0 ∧ − fmt_31_4 + fmt_31_4 ≤ 0 ∧ fmt_31_4 − fmt_31_4 ≤ 0 ∧ − fmt_31_3 + fmt_31_3 ≤ 0 ∧ fmt_31_3 − fmt_31_3 ≤ 0 ∧ − fmt_31_2 + fmt_31_2 ≤ 0 ∧ fmt_31_2 − fmt_31_2 ≤ 0 ∧ − fmt_31_1 + fmt_31_1 ≤ 0 ∧ fmt_31_1 − fmt_31_1 ≤ 0 ∧ − fmt_31_0 + fmt_31_0 ≤ 0 ∧ fmt_31_0 − fmt_31_0 ≤ 0 ∧ − ct_17_2 + ct_17_2 ≤ 0 ∧ ct_17_2 − ct_17_2 ≤ 0 ∧ − ct_17_1 + ct_17_1 ≤ 0 ∧ ct_17_1 − ct_17_1 ≤ 0 ∧ − a_328_post + a_328_post ≤ 0 ∧ a_328_post − a_328_post ≤ 0 ∧ − a_328_0 + a_328_0 ≤ 0 ∧ a_328_0 − a_328_0 ≤ 0 ∧ − a_305_post + a_305_post ≤ 0 ∧ a_305_post − a_305_post ≤ 0 ∧ − a_305_0 + a_305_0 ≤ 0 ∧ a_305_0 − a_305_0 ≤ 0 ∧ − a_283_post + a_283_post ≤ 0 ∧ a_283_post − a_283_post ≤ 0 ∧ − a_283_0 + a_283_0 ≤ 0 ∧ a_283_0 − a_283_0 ≤ 0 ∧ − a_26_post + a_26_post ≤ 0 ∧ a_26_post − a_26_post ≤ 0 ∧ − a_26_1 + a_26_1 ≤ 0 ∧ a_26_1 − a_26_1 ≤ 0 ∧ − a_26_0 + a_26_0 ≤ 0 ∧ a_26_0 − a_26_0 ≤ 0 ∧ − a_247_post + a_247_post ≤ 0 ∧ a_247_post − a_247_post ≤ 0 ∧ − a_247_0 + a_247_0 ≤ 0 ∧ a_247_0 − a_247_0 ≤ 0 ∧ − a_197_post + a_197_post ≤ 0 ∧ a_197_post − a_197_post ≤ 0 ∧ − a_197_0 + a_197_0 ≤ 0 ∧ a_197_0 − a_197_0 ≤ 0 ∧ − a_146_0 + a_146_0 ≤ 0 ∧ a_146_0 − a_146_0 ≤ 0 | |
| 12 | 16 | 13: | 1 − x_20_0 + y_19_0 ≤ 0 ∧ − y_19_post + y_19_post ≤ 0 ∧ y_19_post − y_19_post ≤ 0 ∧ − y_19_2 + y_19_2 ≤ 0 ∧ y_19_2 − y_19_2 ≤ 0 ∧ − y_19_1 + y_19_1 ≤ 0 ∧ y_19_1 − y_19_1 ≤ 0 ∧ − y_19_0 + y_19_0 ≤ 0 ∧ y_19_0 − y_19_0 ≤ 0 ∧ − x_SLAM_f_18_post + x_SLAM_f_18_post ≤ 0 ∧ x_SLAM_f_18_post − x_SLAM_f_18_post ≤ 0 ∧ − x_SLAM_f_18_2 + x_SLAM_f_18_2 ≤ 0 ∧ x_SLAM_f_18_2 − x_SLAM_f_18_2 ≤ 0 ∧ − x_SLAM_f_18_1 + x_SLAM_f_18_1 ≤ 0 ∧ x_SLAM_f_18_1 − x_SLAM_f_18_1 ≤ 0 ∧ − x_SLAM_f_18_0 + x_SLAM_f_18_0 ≤ 0 ∧ x_SLAM_f_18_0 − x_SLAM_f_18_0 ≤ 0 ∧ − x_34_post + x_34_post ≤ 0 ∧ x_34_post − x_34_post ≤ 0 ∧ − x_34_1 + x_34_1 ≤ 0 ∧ x_34_1 − x_34_1 ≤ 0 ∧ − x_34_0 + x_34_0 ≤ 0 ∧ x_34_0 − x_34_0 ≤ 0 ∧ − x_28_post + x_28_post ≤ 0 ∧ x_28_post − x_28_post ≤ 0 ∧ − x_28_1 + x_28_1 ≤ 0 ∧ x_28_1 − x_28_1 ≤ 0 ∧ − x_28_0 + x_28_0 ≤ 0 ∧ x_28_0 − x_28_0 ≤ 0 ∧ − x_238_post + x_238_post ≤ 0 ∧ x_238_post − x_238_post ≤ 0 ∧ − x_238_0 + x_238_0 ≤ 0 ∧ x_238_0 − x_238_0 ≤ 0 ∧ − x_20_post + x_20_post ≤ 0 ∧ x_20_post − x_20_post ≤ 0 ∧ − x_20_2 + x_20_2 ≤ 0 ∧ x_20_2 − x_20_2 ≤ 0 ∧ − x_20_1 + x_20_1 ≤ 0 ∧ x_20_1 − x_20_1 ≤ 0 ∧ − x_20_0 + x_20_0 ≤ 0 ∧ x_20_0 − x_20_0 ≤ 0 ∧ − x_177_post + x_177_post ≤ 0 ∧ x_177_post − x_177_post ≤ 0 ∧ − x_177_0 + x_177_0 ≤ 0 ∧ x_177_0 − x_177_0 ≤ 0 ∧ − x_16_post + x_16_post ≤ 0 ∧ x_16_post − x_16_post ≤ 0 ∧ − x_16_1 + x_16_1 ≤ 0 ∧ x_16_1 − x_16_1 ≤ 0 ∧ − x_16_0 + x_16_0 ≤ 0 ∧ x_16_0 − x_16_0 ≤ 0 ∧ − x_14_post + x_14_post ≤ 0 ∧ x_14_post − x_14_post ≤ 0 ∧ − x_14_0 + x_14_0 ≤ 0 ∧ x_14_0 − x_14_0 ≤ 0 ∧ − tmp_48_post + tmp_48_post ≤ 0 ∧ tmp_48_post − tmp_48_post ≤ 0 ∧ − tmp_48_0 + tmp_48_0 ≤ 0 ∧ tmp_48_0 − tmp_48_0 ≤ 0 ∧ − temp_49_post + temp_49_post ≤ 0 ∧ temp_49_post − temp_49_post ≤ 0 ∧ − temp_49_0 + temp_49_0 ≤ 0 ∧ temp_49_0 − temp_49_0 ≤ 0 ∧ − temp0_45_post + temp0_45_post ≤ 0 ∧ temp0_45_post − temp0_45_post ≤ 0 ∧ − temp0_45_1 + temp0_45_1 ≤ 0 ∧ temp0_45_1 − temp0_45_1 ≤ 0 ∧ − temp0_45_0 + temp0_45_0 ≤ 0 ∧ temp0_45_0 − temp0_45_0 ≤ 0 ∧ − temp0_32_post + temp0_32_post ≤ 0 ∧ temp0_32_post − temp0_32_post ≤ 0 ∧ − temp0_32_4 + temp0_32_4 ≤ 0 ∧ temp0_32_4 − temp0_32_4 ≤ 0 ∧ − temp0_32_3 + temp0_32_3 ≤ 0 ∧ temp0_32_3 − temp0_32_3 ≤ 0 ∧ − temp0_32_2 + temp0_32_2 ≤ 0 ∧ temp0_32_2 − temp0_32_2 ≤ 0 ∧ − temp0_32_1 + temp0_32_1 ≤ 0 ∧ temp0_32_1 − temp0_32_1 ≤ 0 ∧ − temp0_32_0 + temp0_32_0 ≤ 0 ∧ temp0_32_0 − temp0_32_0 ≤ 0 ∧ − temp0_15_0 + temp0_15_0 ≤ 0 ∧ temp0_15_0 − temp0_15_0 ≤ 0 ∧ − t_23_post + t_23_post ≤ 0 ∧ t_23_post − t_23_post ≤ 0 ∧ − t_23_1 + t_23_1 ≤ 0 ∧ t_23_1 − t_23_1 ≤ 0 ∧ − t_23_0 + t_23_0 ≤ 0 ∧ t_23_0 − t_23_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_post + result_dot_printf_sdv_special_RETURN_VALUE_41_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_post − result_dot_printf_sdv_special_RETURN_VALUE_41_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_1 + result_dot_printf_sdv_special_RETURN_VALUE_41_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_1 − result_dot_printf_sdv_special_RETURN_VALUE_41_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_0 + result_dot_printf_sdv_special_RETURN_VALUE_41_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_0 − result_dot_printf_sdv_special_RETURN_VALUE_41_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_post + result_dot_printf_sdv_special_RETURN_VALUE_38_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_post − result_dot_printf_sdv_special_RETURN_VALUE_38_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_1 + result_dot_printf_sdv_special_RETURN_VALUE_38_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_1 − result_dot_printf_sdv_special_RETURN_VALUE_38_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_0 + result_dot_printf_sdv_special_RETURN_VALUE_38_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_0 − result_dot_printf_sdv_special_RETURN_VALUE_38_0 ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_post + result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_post − result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_1 + result_dot_nondet_sdv_special_RETURN_VALUE_13_1 ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_1 − result_dot_nondet_sdv_special_RETURN_VALUE_13_1 ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_0 + result_dot_nondet_sdv_special_RETURN_VALUE_13_0 ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_0 − result_dot_nondet_sdv_special_RETURN_VALUE_13_0 ≤ 0 ∧ − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post + result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post ≤ 0 ∧ result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post ≤ 0 ∧ − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 + result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 ≤ 0 ∧ result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 ≤ 0 ∧ − result_11_post + result_11_post ≤ 0 ∧ result_11_post − result_11_post ≤ 0 ∧ − result_11_6 + result_11_6 ≤ 0 ∧ result_11_6 − result_11_6 ≤ 0 ∧ − result_11_5 + result_11_5 ≤ 0 ∧ result_11_5 − result_11_5 ≤ 0 ∧ − result_11_4 + result_11_4 ≤ 0 ∧ result_11_4 − result_11_4 ≤ 0 ∧ − result_11_3 + result_11_3 ≤ 0 ∧ result_11_3 − result_11_3 ≤ 0 ∧ − result_11_2 + result_11_2 ≤ 0 ∧ result_11_2 − result_11_2 ≤ 0 ∧ − result_11_1 + result_11_1 ≤ 0 ∧ result_11_1 − result_11_1 ≤ 0 ∧ − result_11_0 + result_11_0 ≤ 0 ∧ result_11_0 − result_11_0 ≤ 0 ∧ − rcd_72_post + rcd_72_post ≤ 0 ∧ rcd_72_post − rcd_72_post ≤ 0 ∧ − rcd_72_0 + rcd_72_0 ≤ 0 ∧ rcd_72_0 − rcd_72_0 ≤ 0 ∧ − rcd_102_post + rcd_102_post ≤ 0 ∧ rcd_102_post − rcd_102_post ≤ 0 ∧ − rcd_102_0 + rcd_102_0 ≤ 0 ∧ rcd_102_0 − rcd_102_0 ≤ 0 ∧ − r_53_post + r_53_post ≤ 0 ∧ r_53_post − r_53_post ≤ 0 ∧ − r_53_0 + r_53_0 ≤ 0 ∧ r_53_0 − r_53_0 ≤ 0 ∧ − r_161_post + r_161_post ≤ 0 ∧ r_161_post − r_161_post ≤ 0 ∧ − r_161_0 + r_161_0 ≤ 0 ∧ r_161_0 − r_161_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 ≤ 0 ∧ − nondet_12_post + nondet_12_post ≤ 0 ∧ nondet_12_post − nondet_12_post ≤ 0 ∧ − nondet_12_1 + nondet_12_1 ≤ 0 ∧ nondet_12_1 − nondet_12_1 ≤ 0 ∧ − nondet_12_0 + nondet_12_0 ≤ 0 ∧ nondet_12_0 − nondet_12_0 ≤ 0 ∧ − lt_37_post + lt_37_post ≤ 0 ∧ lt_37_post − lt_37_post ≤ 0 ∧ − lt_37_1 + lt_37_1 ≤ 0 ∧ lt_37_1 − lt_37_1 ≤ 0 ∧ − lt_37_0 + lt_37_0 ≤ 0 ∧ lt_37_0 − lt_37_0 ≤ 0 ∧ − lt_36_post + lt_36_post ≤ 0 ∧ lt_36_post − lt_36_post ≤ 0 ∧ − lt_36_0 + lt_36_0 ≤ 0 ∧ lt_36_0 − lt_36_0 ≤ 0 ∧ − lt_237_post + lt_237_post ≤ 0 ∧ lt_237_post − lt_237_post ≤ 0 ∧ − lt_237_0 + lt_237_0 ≤ 0 ∧ lt_237_0 − lt_237_0 ≤ 0 ∧ − length_43_post + length_43_post ≤ 0 ∧ length_43_post − length_43_post ≤ 0 ∧ − length_43_0 + length_43_0 ≤ 0 ∧ length_43_0 − length_43_0 ≤ 0 ∧ − len_246_post + len_246_post ≤ 0 ∧ len_246_post − len_246_post ≤ 0 ∧ − len_246_0 + len_246_0 ≤ 0 ∧ len_246_0 − len_246_0 ≤ 0 ∧ − len_180_post + len_180_post ≤ 0 ∧ len_180_post − len_180_post ≤ 0 ∧ − len_180_0 + len_180_0 ≤ 0 ∧ len_180_0 − len_180_0 ≤ 0 ∧ − i_44_post + i_44_post ≤ 0 ∧ i_44_post − i_44_post ≤ 0 ∧ − i_44_0 + i_44_0 ≤ 0 ∧ i_44_0 − i_44_0 ≤ 0 ∧ − i_125_post + i_125_post ≤ 0 ∧ i_125_post − i_125_post ≤ 0 ∧ − i_125_0 + i_125_0 ≤ 0 ∧ i_125_0 − i_125_0 ≤ 0 ∧ − i_108_post + i_108_post ≤ 0 ∧ i_108_post − i_108_post ≤ 0 ∧ − i_108_0 + i_108_0 ≤ 0 ∧ i_108_0 − i_108_0 ≤ 0 ∧ − head_46_post + head_46_post ≤ 0 ∧ head_46_post − head_46_post ≤ 0 ∧ − head_46_0 + head_46_0 ≤ 0 ∧ head_46_0 − head_46_0 ≤ 0 ∧ − fmt_31_post + fmt_31_post ≤ 0 ∧ fmt_31_post − fmt_31_post ≤ 0 ∧ − fmt_31_4 + fmt_31_4 ≤ 0 ∧ fmt_31_4 − fmt_31_4 ≤ 0 ∧ − fmt_31_3 + fmt_31_3 ≤ 0 ∧ fmt_31_3 − fmt_31_3 ≤ 0 ∧ − fmt_31_2 + fmt_31_2 ≤ 0 ∧ fmt_31_2 − fmt_31_2 ≤ 0 ∧ − fmt_31_1 + fmt_31_1 ≤ 0 ∧ fmt_31_1 − fmt_31_1 ≤ 0 ∧ − fmt_31_0 + fmt_31_0 ≤ 0 ∧ fmt_31_0 − fmt_31_0 ≤ 0 ∧ − ct_17_post + ct_17_post ≤ 0 ∧ ct_17_post − ct_17_post ≤ 0 ∧ − ct_17_2 + ct_17_2 ≤ 0 ∧ ct_17_2 − ct_17_2 ≤ 0 ∧ − ct_17_1 + ct_17_1 ≤ 0 ∧ ct_17_1 − ct_17_1 ≤ 0 ∧ − ct_17_0 + ct_17_0 ≤ 0 ∧ ct_17_0 − ct_17_0 ≤ 0 ∧ − a_328_post + a_328_post ≤ 0 ∧ a_328_post − a_328_post ≤ 0 ∧ − a_328_0 + a_328_0 ≤ 0 ∧ a_328_0 − a_328_0 ≤ 0 ∧ − a_305_post + a_305_post ≤ 0 ∧ a_305_post − a_305_post ≤ 0 ∧ − a_305_0 + a_305_0 ≤ 0 ∧ a_305_0 − a_305_0 ≤ 0 ∧ − a_283_post + a_283_post ≤ 0 ∧ a_283_post − a_283_post ≤ 0 ∧ − a_283_0 + a_283_0 ≤ 0 ∧ a_283_0 − a_283_0 ≤ 0 ∧ − a_26_post + a_26_post ≤ 0 ∧ a_26_post − a_26_post ≤ 0 ∧ − a_26_1 + a_26_1 ≤ 0 ∧ a_26_1 − a_26_1 ≤ 0 ∧ − a_26_0 + a_26_0 ≤ 0 ∧ a_26_0 − a_26_0 ≤ 0 ∧ − a_247_post + a_247_post ≤ 0 ∧ a_247_post − a_247_post ≤ 0 ∧ − a_247_0 + a_247_0 ≤ 0 ∧ a_247_0 − a_247_0 ≤ 0 ∧ − a_197_post + a_197_post ≤ 0 ∧ a_197_post − a_197_post ≤ 0 ∧ − a_197_0 + a_197_0 ≤ 0 ∧ a_197_0 − a_197_0 ≤ 0 ∧ − a_146_0 + a_146_0 ≤ 0 ∧ a_146_0 − a_146_0 ≤ 0 | |
| 12 | 17 | 13: | 1 + x_20_0 − y_19_0 ≤ 0 ∧ − y_19_post + y_19_post ≤ 0 ∧ y_19_post − y_19_post ≤ 0 ∧ − y_19_2 + y_19_2 ≤ 0 ∧ y_19_2 − y_19_2 ≤ 0 ∧ − y_19_1 + y_19_1 ≤ 0 ∧ y_19_1 − y_19_1 ≤ 0 ∧ − y_19_0 + y_19_0 ≤ 0 ∧ y_19_0 − y_19_0 ≤ 0 ∧ − x_SLAM_f_18_post + x_SLAM_f_18_post ≤ 0 ∧ x_SLAM_f_18_post − x_SLAM_f_18_post ≤ 0 ∧ − x_SLAM_f_18_2 + x_SLAM_f_18_2 ≤ 0 ∧ x_SLAM_f_18_2 − x_SLAM_f_18_2 ≤ 0 ∧ − x_SLAM_f_18_1 + x_SLAM_f_18_1 ≤ 0 ∧ x_SLAM_f_18_1 − x_SLAM_f_18_1 ≤ 0 ∧ − x_SLAM_f_18_0 + x_SLAM_f_18_0 ≤ 0 ∧ x_SLAM_f_18_0 − x_SLAM_f_18_0 ≤ 0 ∧ − x_34_post + x_34_post ≤ 0 ∧ x_34_post − x_34_post ≤ 0 ∧ − x_34_1 + x_34_1 ≤ 0 ∧ x_34_1 − x_34_1 ≤ 0 ∧ − x_34_0 + x_34_0 ≤ 0 ∧ x_34_0 − x_34_0 ≤ 0 ∧ − x_28_post + x_28_post ≤ 0 ∧ x_28_post − x_28_post ≤ 0 ∧ − x_28_1 + x_28_1 ≤ 0 ∧ x_28_1 − x_28_1 ≤ 0 ∧ − x_28_0 + x_28_0 ≤ 0 ∧ x_28_0 − x_28_0 ≤ 0 ∧ − x_238_post + x_238_post ≤ 0 ∧ x_238_post − x_238_post ≤ 0 ∧ − x_238_0 + x_238_0 ≤ 0 ∧ x_238_0 − x_238_0 ≤ 0 ∧ − x_20_post + x_20_post ≤ 0 ∧ x_20_post − x_20_post ≤ 0 ∧ − x_20_2 + x_20_2 ≤ 0 ∧ x_20_2 − x_20_2 ≤ 0 ∧ − x_20_1 + x_20_1 ≤ 0 ∧ x_20_1 − x_20_1 ≤ 0 ∧ − x_20_0 + x_20_0 ≤ 0 ∧ x_20_0 − x_20_0 ≤ 0 ∧ − x_177_post + x_177_post ≤ 0 ∧ x_177_post − x_177_post ≤ 0 ∧ − x_177_0 + x_177_0 ≤ 0 ∧ x_177_0 − x_177_0 ≤ 0 ∧ − x_16_post + x_16_post ≤ 0 ∧ x_16_post − x_16_post ≤ 0 ∧ − x_16_1 + x_16_1 ≤ 0 ∧ x_16_1 − x_16_1 ≤ 0 ∧ − x_16_0 + x_16_0 ≤ 0 ∧ x_16_0 − x_16_0 ≤ 0 ∧ − x_14_post + x_14_post ≤ 0 ∧ x_14_post − x_14_post ≤ 0 ∧ − x_14_0 + x_14_0 ≤ 0 ∧ x_14_0 − x_14_0 ≤ 0 ∧ − tmp_48_post + tmp_48_post ≤ 0 ∧ tmp_48_post − tmp_48_post ≤ 0 ∧ − tmp_48_0 + tmp_48_0 ≤ 0 ∧ tmp_48_0 − tmp_48_0 ≤ 0 ∧ − temp_49_post + temp_49_post ≤ 0 ∧ temp_49_post − temp_49_post ≤ 0 ∧ − temp_49_0 + temp_49_0 ≤ 0 ∧ temp_49_0 − temp_49_0 ≤ 0 ∧ − temp0_45_post + temp0_45_post ≤ 0 ∧ temp0_45_post − temp0_45_post ≤ 0 ∧ − temp0_45_1 + temp0_45_1 ≤ 0 ∧ temp0_45_1 − temp0_45_1 ≤ 0 ∧ − temp0_45_0 + temp0_45_0 ≤ 0 ∧ temp0_45_0 − temp0_45_0 ≤ 0 ∧ − temp0_32_post + temp0_32_post ≤ 0 ∧ temp0_32_post − temp0_32_post ≤ 0 ∧ − temp0_32_4 + temp0_32_4 ≤ 0 ∧ temp0_32_4 − temp0_32_4 ≤ 0 ∧ − temp0_32_3 + temp0_32_3 ≤ 0 ∧ temp0_32_3 − temp0_32_3 ≤ 0 ∧ − temp0_32_2 + temp0_32_2 ≤ 0 ∧ temp0_32_2 − temp0_32_2 ≤ 0 ∧ − temp0_32_1 + temp0_32_1 ≤ 0 ∧ temp0_32_1 − temp0_32_1 ≤ 0 ∧ − temp0_32_0 + temp0_32_0 ≤ 0 ∧ temp0_32_0 − temp0_32_0 ≤ 0 ∧ − temp0_15_0 + temp0_15_0 ≤ 0 ∧ temp0_15_0 − temp0_15_0 ≤ 0 ∧ − t_23_post + t_23_post ≤ 0 ∧ t_23_post − t_23_post ≤ 0 ∧ − t_23_1 + t_23_1 ≤ 0 ∧ t_23_1 − t_23_1 ≤ 0 ∧ − t_23_0 + t_23_0 ≤ 0 ∧ t_23_0 − t_23_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_post + result_dot_printf_sdv_special_RETURN_VALUE_41_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_post − result_dot_printf_sdv_special_RETURN_VALUE_41_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_1 + result_dot_printf_sdv_special_RETURN_VALUE_41_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_1 − result_dot_printf_sdv_special_RETURN_VALUE_41_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_0 + result_dot_printf_sdv_special_RETURN_VALUE_41_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_0 − result_dot_printf_sdv_special_RETURN_VALUE_41_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_post + result_dot_printf_sdv_special_RETURN_VALUE_38_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_post − result_dot_printf_sdv_special_RETURN_VALUE_38_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_1 + result_dot_printf_sdv_special_RETURN_VALUE_38_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_1 − result_dot_printf_sdv_special_RETURN_VALUE_38_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_0 + result_dot_printf_sdv_special_RETURN_VALUE_38_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_0 − result_dot_printf_sdv_special_RETURN_VALUE_38_0 ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_post + result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_post − result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_1 + result_dot_nondet_sdv_special_RETURN_VALUE_13_1 ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_1 − result_dot_nondet_sdv_special_RETURN_VALUE_13_1 ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_0 + result_dot_nondet_sdv_special_RETURN_VALUE_13_0 ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_0 − result_dot_nondet_sdv_special_RETURN_VALUE_13_0 ≤ 0 ∧ − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post + result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post ≤ 0 ∧ result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post ≤ 0 ∧ − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 + result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 ≤ 0 ∧ result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 ≤ 0 ∧ − result_11_post + result_11_post ≤ 0 ∧ result_11_post − result_11_post ≤ 0 ∧ − result_11_6 + result_11_6 ≤ 0 ∧ result_11_6 − result_11_6 ≤ 0 ∧ − result_11_5 + result_11_5 ≤ 0 ∧ result_11_5 − result_11_5 ≤ 0 ∧ − result_11_4 + result_11_4 ≤ 0 ∧ result_11_4 − result_11_4 ≤ 0 ∧ − result_11_3 + result_11_3 ≤ 0 ∧ result_11_3 − result_11_3 ≤ 0 ∧ − result_11_2 + result_11_2 ≤ 0 ∧ result_11_2 − result_11_2 ≤ 0 ∧ − result_11_1 + result_11_1 ≤ 0 ∧ result_11_1 − result_11_1 ≤ 0 ∧ − result_11_0 + result_11_0 ≤ 0 ∧ result_11_0 − result_11_0 ≤ 0 ∧ − rcd_72_post + rcd_72_post ≤ 0 ∧ rcd_72_post − rcd_72_post ≤ 0 ∧ − rcd_72_0 + rcd_72_0 ≤ 0 ∧ rcd_72_0 − rcd_72_0 ≤ 0 ∧ − rcd_102_post + rcd_102_post ≤ 0 ∧ rcd_102_post − rcd_102_post ≤ 0 ∧ − rcd_102_0 + rcd_102_0 ≤ 0 ∧ rcd_102_0 − rcd_102_0 ≤ 0 ∧ − r_53_post + r_53_post ≤ 0 ∧ r_53_post − r_53_post ≤ 0 ∧ − r_53_0 + r_53_0 ≤ 0 ∧ r_53_0 − r_53_0 ≤ 0 ∧ − r_161_post + r_161_post ≤ 0 ∧ r_161_post − r_161_post ≤ 0 ∧ − r_161_0 + r_161_0 ≤ 0 ∧ r_161_0 − r_161_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 ≤ 0 ∧ − nondet_12_post + nondet_12_post ≤ 0 ∧ nondet_12_post − nondet_12_post ≤ 0 ∧ − nondet_12_1 + nondet_12_1 ≤ 0 ∧ nondet_12_1 − nondet_12_1 ≤ 0 ∧ − nondet_12_0 + nondet_12_0 ≤ 0 ∧ nondet_12_0 − nondet_12_0 ≤ 0 ∧ − lt_37_post + lt_37_post ≤ 0 ∧ lt_37_post − lt_37_post ≤ 0 ∧ − lt_37_1 + lt_37_1 ≤ 0 ∧ lt_37_1 − lt_37_1 ≤ 0 ∧ − lt_37_0 + lt_37_0 ≤ 0 ∧ lt_37_0 − lt_37_0 ≤ 0 ∧ − lt_36_post + lt_36_post ≤ 0 ∧ lt_36_post − lt_36_post ≤ 0 ∧ − lt_36_0 + lt_36_0 ≤ 0 ∧ lt_36_0 − lt_36_0 ≤ 0 ∧ − lt_237_post + lt_237_post ≤ 0 ∧ lt_237_post − lt_237_post ≤ 0 ∧ − lt_237_0 + lt_237_0 ≤ 0 ∧ lt_237_0 − lt_237_0 ≤ 0 ∧ − length_43_post + length_43_post ≤ 0 ∧ length_43_post − length_43_post ≤ 0 ∧ − length_43_0 + length_43_0 ≤ 0 ∧ length_43_0 − length_43_0 ≤ 0 ∧ − len_246_post + len_246_post ≤ 0 ∧ len_246_post − len_246_post ≤ 0 ∧ − len_246_0 + len_246_0 ≤ 0 ∧ len_246_0 − len_246_0 ≤ 0 ∧ − len_180_post + len_180_post ≤ 0 ∧ len_180_post − len_180_post ≤ 0 ∧ − len_180_0 + len_180_0 ≤ 0 ∧ len_180_0 − len_180_0 ≤ 0 ∧ − i_44_post + i_44_post ≤ 0 ∧ i_44_post − i_44_post ≤ 0 ∧ − i_44_0 + i_44_0 ≤ 0 ∧ i_44_0 − i_44_0 ≤ 0 ∧ − i_125_post + i_125_post ≤ 0 ∧ i_125_post − i_125_post ≤ 0 ∧ − i_125_0 + i_125_0 ≤ 0 ∧ i_125_0 − i_125_0 ≤ 0 ∧ − i_108_post + i_108_post ≤ 0 ∧ i_108_post − i_108_post ≤ 0 ∧ − i_108_0 + i_108_0 ≤ 0 ∧ i_108_0 − i_108_0 ≤ 0 ∧ − head_46_post + head_46_post ≤ 0 ∧ head_46_post − head_46_post ≤ 0 ∧ − head_46_0 + head_46_0 ≤ 0 ∧ head_46_0 − head_46_0 ≤ 0 ∧ − fmt_31_post + fmt_31_post ≤ 0 ∧ fmt_31_post − fmt_31_post ≤ 0 ∧ − fmt_31_4 + fmt_31_4 ≤ 0 ∧ fmt_31_4 − fmt_31_4 ≤ 0 ∧ − fmt_31_3 + fmt_31_3 ≤ 0 ∧ fmt_31_3 − fmt_31_3 ≤ 0 ∧ − fmt_31_2 + fmt_31_2 ≤ 0 ∧ fmt_31_2 − fmt_31_2 ≤ 0 ∧ − fmt_31_1 + fmt_31_1 ≤ 0 ∧ fmt_31_1 − fmt_31_1 ≤ 0 ∧ − fmt_31_0 + fmt_31_0 ≤ 0 ∧ fmt_31_0 − fmt_31_0 ≤ 0 ∧ − ct_17_post + ct_17_post ≤ 0 ∧ ct_17_post − ct_17_post ≤ 0 ∧ − ct_17_2 + ct_17_2 ≤ 0 ∧ ct_17_2 − ct_17_2 ≤ 0 ∧ − ct_17_1 + ct_17_1 ≤ 0 ∧ ct_17_1 − ct_17_1 ≤ 0 ∧ − ct_17_0 + ct_17_0 ≤ 0 ∧ ct_17_0 − ct_17_0 ≤ 0 ∧ − a_328_post + a_328_post ≤ 0 ∧ a_328_post − a_328_post ≤ 0 ∧ − a_328_0 + a_328_0 ≤ 0 ∧ a_328_0 − a_328_0 ≤ 0 ∧ − a_305_post + a_305_post ≤ 0 ∧ a_305_post − a_305_post ≤ 0 ∧ − a_305_0 + a_305_0 ≤ 0 ∧ a_305_0 − a_305_0 ≤ 0 ∧ − a_283_post + a_283_post ≤ 0 ∧ a_283_post − a_283_post ≤ 0 ∧ − a_283_0 + a_283_0 ≤ 0 ∧ a_283_0 − a_283_0 ≤ 0 ∧ − a_26_post + a_26_post ≤ 0 ∧ a_26_post − a_26_post ≤ 0 ∧ − a_26_1 + a_26_1 ≤ 0 ∧ a_26_1 − a_26_1 ≤ 0 ∧ − a_26_0 + a_26_0 ≤ 0 ∧ a_26_0 − a_26_0 ≤ 0 ∧ − a_247_post + a_247_post ≤ 0 ∧ a_247_post − a_247_post ≤ 0 ∧ − a_247_0 + a_247_0 ≤ 0 ∧ a_247_0 − a_247_0 ≤ 0 ∧ − a_197_post + a_197_post ≤ 0 ∧ a_197_post − a_197_post ≤ 0 ∧ − a_197_0 + a_197_0 ≤ 0 ∧ a_197_0 − a_197_0 ≤ 0 ∧ − a_146_0 + a_146_0 ≤ 0 ∧ a_146_0 − a_146_0 ≤ 0 | |
| 13 | 18 | 14: | 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ t_23_post − x_20_0 ≤ 0 ∧ − t_23_post + x_20_0 ≤ 0 ∧ − ct_17_0 ≤ 0 ∧ ct_17_0 ≤ 0 ∧ − y_19_0 ≤ 0 ∧ y_19_0 ≤ 0 ∧ a_283_post − a_305_0 ≤ 0 ∧ − a_283_post + a_305_0 ≤ 0 ∧ x_14_0 − x_16_0 ≤ 0 ∧ − x_14_0 + x_16_0 ≤ 0 ∧ x_14_0 − x_SLAM_f_18_0 ≤ 0 ∧ − x_14_0 + x_SLAM_f_18_0 ≤ 0 ∧ − t_23_post + x_14_0 ≤ 0 ∧ t_23_post − x_14_0 ≤ 0 ∧ x_16_0 − x_SLAM_f_18_0 ≤ 0 ∧ − x_16_0 + x_SLAM_f_18_0 ≤ 0 ∧ ct_17_0 − y_19_0 ≤ 0 ∧ − ct_17_0 + y_19_0 ≤ 0 ∧ a_283_post − a_305_0 ≤ 0 ∧ − a_283_post + a_305_0 ≤ 0 ∧ a_283_0 − a_283_post ≤ 0 ∧ − a_283_0 + a_283_post ≤ 0 ∧ t_23_0 − t_23_post ≤ 0 ∧ − t_23_0 + t_23_post ≤ 0 ∧ − y_19_post + y_19_post ≤ 0 ∧ y_19_post − y_19_post ≤ 0 ∧ − y_19_2 + y_19_2 ≤ 0 ∧ y_19_2 − y_19_2 ≤ 0 ∧ − y_19_1 + y_19_1 ≤ 0 ∧ y_19_1 − y_19_1 ≤ 0 ∧ − y_19_0 + y_19_0 ≤ 0 ∧ y_19_0 − y_19_0 ≤ 0 ∧ − x_SLAM_f_18_post + x_SLAM_f_18_post ≤ 0 ∧ x_SLAM_f_18_post − x_SLAM_f_18_post ≤ 0 ∧ − x_SLAM_f_18_2 + x_SLAM_f_18_2 ≤ 0 ∧ x_SLAM_f_18_2 − x_SLAM_f_18_2 ≤ 0 ∧ − x_SLAM_f_18_1 + x_SLAM_f_18_1 ≤ 0 ∧ x_SLAM_f_18_1 − x_SLAM_f_18_1 ≤ 0 ∧ − x_SLAM_f_18_0 + x_SLAM_f_18_0 ≤ 0 ∧ x_SLAM_f_18_0 − x_SLAM_f_18_0 ≤ 0 ∧ − x_34_post + x_34_post ≤ 0 ∧ x_34_post − x_34_post ≤ 0 ∧ − x_34_1 + x_34_1 ≤ 0 ∧ x_34_1 − x_34_1 ≤ 0 ∧ − x_34_0 + x_34_0 ≤ 0 ∧ x_34_0 − x_34_0 ≤ 0 ∧ − x_28_post + x_28_post ≤ 0 ∧ x_28_post − x_28_post ≤ 0 ∧ − x_28_1 + x_28_1 ≤ 0 ∧ x_28_1 − x_28_1 ≤ 0 ∧ − x_28_0 + x_28_0 ≤ 0 ∧ x_28_0 − x_28_0 ≤ 0 ∧ − x_238_post + x_238_post ≤ 0 ∧ x_238_post − x_238_post ≤ 0 ∧ − x_238_0 + x_238_0 ≤ 0 ∧ x_238_0 − x_238_0 ≤ 0 ∧ − x_20_post + x_20_post ≤ 0 ∧ x_20_post − x_20_post ≤ 0 ∧ − x_20_2 + x_20_2 ≤ 0 ∧ x_20_2 − x_20_2 ≤ 0 ∧ − x_20_1 + x_20_1 ≤ 0 ∧ x_20_1 − x_20_1 ≤ 0 ∧ − x_20_0 + x_20_0 ≤ 0 ∧ x_20_0 − x_20_0 ≤ 0 ∧ − x_177_post + x_177_post ≤ 0 ∧ x_177_post − x_177_post ≤ 0 ∧ − x_177_0 + x_177_0 ≤ 0 ∧ x_177_0 − x_177_0 ≤ 0 ∧ − x_16_post + x_16_post ≤ 0 ∧ x_16_post − x_16_post ≤ 0 ∧ − x_16_1 + x_16_1 ≤ 0 ∧ x_16_1 − x_16_1 ≤ 0 ∧ − x_16_0 + x_16_0 ≤ 0 ∧ x_16_0 − x_16_0 ≤ 0 ∧ − x_14_post + x_14_post ≤ 0 ∧ x_14_post − x_14_post ≤ 0 ∧ − x_14_0 + x_14_0 ≤ 0 ∧ x_14_0 − x_14_0 ≤ 0 ∧ − tmp_48_post + tmp_48_post ≤ 0 ∧ tmp_48_post − tmp_48_post ≤ 0 ∧ − tmp_48_0 + tmp_48_0 ≤ 0 ∧ tmp_48_0 − tmp_48_0 ≤ 0 ∧ − temp_49_post + temp_49_post ≤ 0 ∧ temp_49_post − temp_49_post ≤ 0 ∧ − temp_49_0 + temp_49_0 ≤ 0 ∧ temp_49_0 − temp_49_0 ≤ 0 ∧ − temp0_45_post + temp0_45_post ≤ 0 ∧ temp0_45_post − temp0_45_post ≤ 0 ∧ − temp0_45_1 + temp0_45_1 ≤ 0 ∧ temp0_45_1 − temp0_45_1 ≤ 0 ∧ − temp0_45_0 + temp0_45_0 ≤ 0 ∧ temp0_45_0 − temp0_45_0 ≤ 0 ∧ − temp0_32_post + temp0_32_post ≤ 0 ∧ temp0_32_post − temp0_32_post ≤ 0 ∧ − temp0_32_4 + temp0_32_4 ≤ 0 ∧ temp0_32_4 − temp0_32_4 ≤ 0 ∧ − temp0_32_3 + temp0_32_3 ≤ 0 ∧ temp0_32_3 − temp0_32_3 ≤ 0 ∧ − temp0_32_2 + temp0_32_2 ≤ 0 ∧ temp0_32_2 − temp0_32_2 ≤ 0 ∧ − temp0_32_1 + temp0_32_1 ≤ 0 ∧ temp0_32_1 − temp0_32_1 ≤ 0 ∧ − temp0_32_0 + temp0_32_0 ≤ 0 ∧ temp0_32_0 − temp0_32_0 ≤ 0 ∧ − temp0_15_0 + temp0_15_0 ≤ 0 ∧ temp0_15_0 − temp0_15_0 ≤ 0 ∧ − t_23_1 + t_23_1 ≤ 0 ∧ t_23_1 − t_23_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_post + result_dot_printf_sdv_special_RETURN_VALUE_41_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_post − result_dot_printf_sdv_special_RETURN_VALUE_41_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_1 + result_dot_printf_sdv_special_RETURN_VALUE_41_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_1 − result_dot_printf_sdv_special_RETURN_VALUE_41_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_0 + result_dot_printf_sdv_special_RETURN_VALUE_41_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_0 − result_dot_printf_sdv_special_RETURN_VALUE_41_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_post + result_dot_printf_sdv_special_RETURN_VALUE_38_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_post − result_dot_printf_sdv_special_RETURN_VALUE_38_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_1 + result_dot_printf_sdv_special_RETURN_VALUE_38_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_1 − result_dot_printf_sdv_special_RETURN_VALUE_38_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_0 + result_dot_printf_sdv_special_RETURN_VALUE_38_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_0 − result_dot_printf_sdv_special_RETURN_VALUE_38_0 ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_post + result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_post − result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_1 + result_dot_nondet_sdv_special_RETURN_VALUE_13_1 ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_1 − result_dot_nondet_sdv_special_RETURN_VALUE_13_1 ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_0 + result_dot_nondet_sdv_special_RETURN_VALUE_13_0 ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_0 − result_dot_nondet_sdv_special_RETURN_VALUE_13_0 ≤ 0 ∧ − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post + result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post ≤ 0 ∧ result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post ≤ 0 ∧ − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 + result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 ≤ 0 ∧ result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 ≤ 0 ∧ − result_11_post + result_11_post ≤ 0 ∧ result_11_post − result_11_post ≤ 0 ∧ − result_11_6 + result_11_6 ≤ 0 ∧ result_11_6 − result_11_6 ≤ 0 ∧ − result_11_5 + result_11_5 ≤ 0 ∧ result_11_5 − result_11_5 ≤ 0 ∧ − result_11_4 + result_11_4 ≤ 0 ∧ result_11_4 − result_11_4 ≤ 0 ∧ − result_11_3 + result_11_3 ≤ 0 ∧ result_11_3 − result_11_3 ≤ 0 ∧ − result_11_2 + result_11_2 ≤ 0 ∧ result_11_2 − result_11_2 ≤ 0 ∧ − result_11_1 + result_11_1 ≤ 0 ∧ result_11_1 − result_11_1 ≤ 0 ∧ − result_11_0 + result_11_0 ≤ 0 ∧ result_11_0 − result_11_0 ≤ 0 ∧ − rcd_72_post + rcd_72_post ≤ 0 ∧ rcd_72_post − rcd_72_post ≤ 0 ∧ − rcd_72_0 + rcd_72_0 ≤ 0 ∧ rcd_72_0 − rcd_72_0 ≤ 0 ∧ − rcd_102_post + rcd_102_post ≤ 0 ∧ rcd_102_post − rcd_102_post ≤ 0 ∧ − rcd_102_0 + rcd_102_0 ≤ 0 ∧ rcd_102_0 − rcd_102_0 ≤ 0 ∧ − r_53_post + r_53_post ≤ 0 ∧ r_53_post − r_53_post ≤ 0 ∧ − r_53_0 + r_53_0 ≤ 0 ∧ r_53_0 − r_53_0 ≤ 0 ∧ − r_161_post + r_161_post ≤ 0 ∧ r_161_post − r_161_post ≤ 0 ∧ − r_161_0 + r_161_0 ≤ 0 ∧ r_161_0 − r_161_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 ≤ 0 ∧ − nondet_12_post + nondet_12_post ≤ 0 ∧ nondet_12_post − nondet_12_post ≤ 0 ∧ − nondet_12_1 + nondet_12_1 ≤ 0 ∧ nondet_12_1 − nondet_12_1 ≤ 0 ∧ − nondet_12_0 + nondet_12_0 ≤ 0 ∧ nondet_12_0 − nondet_12_0 ≤ 0 ∧ − lt_37_post + lt_37_post ≤ 0 ∧ lt_37_post − lt_37_post ≤ 0 ∧ − lt_37_1 + lt_37_1 ≤ 0 ∧ lt_37_1 − lt_37_1 ≤ 0 ∧ − lt_37_0 + lt_37_0 ≤ 0 ∧ lt_37_0 − lt_37_0 ≤ 0 ∧ − lt_36_post + lt_36_post ≤ 0 ∧ lt_36_post − lt_36_post ≤ 0 ∧ − lt_36_0 + lt_36_0 ≤ 0 ∧ lt_36_0 − lt_36_0 ≤ 0 ∧ − lt_237_post + lt_237_post ≤ 0 ∧ lt_237_post − lt_237_post ≤ 0 ∧ − lt_237_0 + lt_237_0 ≤ 0 ∧ lt_237_0 − lt_237_0 ≤ 0 ∧ − length_43_post + length_43_post ≤ 0 ∧ length_43_post − length_43_post ≤ 0 ∧ − length_43_0 + length_43_0 ≤ 0 ∧ length_43_0 − length_43_0 ≤ 0 ∧ − len_246_post + len_246_post ≤ 0 ∧ len_246_post − len_246_post ≤ 0 ∧ − len_246_0 + len_246_0 ≤ 0 ∧ len_246_0 − len_246_0 ≤ 0 ∧ − len_180_post + len_180_post ≤ 0 ∧ len_180_post − len_180_post ≤ 0 ∧ − len_180_0 + len_180_0 ≤ 0 ∧ len_180_0 − len_180_0 ≤ 0 ∧ − i_44_post + i_44_post ≤ 0 ∧ i_44_post − i_44_post ≤ 0 ∧ − i_44_0 + i_44_0 ≤ 0 ∧ i_44_0 − i_44_0 ≤ 0 ∧ − i_125_post + i_125_post ≤ 0 ∧ i_125_post − i_125_post ≤ 0 ∧ − i_125_0 + i_125_0 ≤ 0 ∧ i_125_0 − i_125_0 ≤ 0 ∧ − i_108_post + i_108_post ≤ 0 ∧ i_108_post − i_108_post ≤ 0 ∧ − i_108_0 + i_108_0 ≤ 0 ∧ i_108_0 − i_108_0 ≤ 0 ∧ − head_46_post + head_46_post ≤ 0 ∧ head_46_post − head_46_post ≤ 0 ∧ − head_46_0 + head_46_0 ≤ 0 ∧ head_46_0 − head_46_0 ≤ 0 ∧ − fmt_31_post + fmt_31_post ≤ 0 ∧ fmt_31_post − fmt_31_post ≤ 0 ∧ − fmt_31_4 + fmt_31_4 ≤ 0 ∧ fmt_31_4 − fmt_31_4 ≤ 0 ∧ − fmt_31_3 + fmt_31_3 ≤ 0 ∧ fmt_31_3 − fmt_31_3 ≤ 0 ∧ − fmt_31_2 + fmt_31_2 ≤ 0 ∧ fmt_31_2 − fmt_31_2 ≤ 0 ∧ − fmt_31_1 + fmt_31_1 ≤ 0 ∧ fmt_31_1 − fmt_31_1 ≤ 0 ∧ − fmt_31_0 + fmt_31_0 ≤ 0 ∧ fmt_31_0 − fmt_31_0 ≤ 0 ∧ − ct_17_post + ct_17_post ≤ 0 ∧ ct_17_post − ct_17_post ≤ 0 ∧ − ct_17_2 + ct_17_2 ≤ 0 ∧ ct_17_2 − ct_17_2 ≤ 0 ∧ − ct_17_1 + ct_17_1 ≤ 0 ∧ ct_17_1 − ct_17_1 ≤ 0 ∧ − ct_17_0 + ct_17_0 ≤ 0 ∧ ct_17_0 − ct_17_0 ≤ 0 ∧ − a_328_post + a_328_post ≤ 0 ∧ a_328_post − a_328_post ≤ 0 ∧ − a_328_0 + a_328_0 ≤ 0 ∧ a_328_0 − a_328_0 ≤ 0 ∧ − a_305_post + a_305_post ≤ 0 ∧ a_305_post − a_305_post ≤ 0 ∧ − a_305_0 + a_305_0 ≤ 0 ∧ a_305_0 − a_305_0 ≤ 0 ∧ − a_26_post + a_26_post ≤ 0 ∧ a_26_post − a_26_post ≤ 0 ∧ − a_26_1 + a_26_1 ≤ 0 ∧ a_26_1 − a_26_1 ≤ 0 ∧ − a_26_0 + a_26_0 ≤ 0 ∧ a_26_0 − a_26_0 ≤ 0 ∧ − a_247_post + a_247_post ≤ 0 ∧ a_247_post − a_247_post ≤ 0 ∧ − a_247_0 + a_247_0 ≤ 0 ∧ a_247_0 − a_247_0 ≤ 0 ∧ − a_197_post + a_197_post ≤ 0 ∧ a_197_post − a_197_post ≤ 0 ∧ − a_197_0 + a_197_0 ≤ 0 ∧ a_197_0 − a_197_0 ≤ 0 ∧ − a_146_0 + a_146_0 ≤ 0 ∧ a_146_0 − a_146_0 ≤ 0 | |
| 14 | 19 | 15: | 1 − x_14_0 ≤ 0 ∧ − y_19_post + y_19_post ≤ 0 ∧ y_19_post − y_19_post ≤ 0 ∧ − y_19_2 + y_19_2 ≤ 0 ∧ y_19_2 − y_19_2 ≤ 0 ∧ − y_19_1 + y_19_1 ≤ 0 ∧ y_19_1 − y_19_1 ≤ 0 ∧ − y_19_0 + y_19_0 ≤ 0 ∧ y_19_0 − y_19_0 ≤ 0 ∧ − x_SLAM_f_18_post + x_SLAM_f_18_post ≤ 0 ∧ x_SLAM_f_18_post − x_SLAM_f_18_post ≤ 0 ∧ − x_SLAM_f_18_2 + x_SLAM_f_18_2 ≤ 0 ∧ x_SLAM_f_18_2 − x_SLAM_f_18_2 ≤ 0 ∧ − x_SLAM_f_18_1 + x_SLAM_f_18_1 ≤ 0 ∧ x_SLAM_f_18_1 − x_SLAM_f_18_1 ≤ 0 ∧ − x_SLAM_f_18_0 + x_SLAM_f_18_0 ≤ 0 ∧ x_SLAM_f_18_0 − x_SLAM_f_18_0 ≤ 0 ∧ − x_34_post + x_34_post ≤ 0 ∧ x_34_post − x_34_post ≤ 0 ∧ − x_34_1 + x_34_1 ≤ 0 ∧ x_34_1 − x_34_1 ≤ 0 ∧ − x_34_0 + x_34_0 ≤ 0 ∧ x_34_0 − x_34_0 ≤ 0 ∧ − x_28_post + x_28_post ≤ 0 ∧ x_28_post − x_28_post ≤ 0 ∧ − x_28_1 + x_28_1 ≤ 0 ∧ x_28_1 − x_28_1 ≤ 0 ∧ − x_28_0 + x_28_0 ≤ 0 ∧ x_28_0 − x_28_0 ≤ 0 ∧ − x_238_post + x_238_post ≤ 0 ∧ x_238_post − x_238_post ≤ 0 ∧ − x_238_0 + x_238_0 ≤ 0 ∧ x_238_0 − x_238_0 ≤ 0 ∧ − x_20_post + x_20_post ≤ 0 ∧ x_20_post − x_20_post ≤ 0 ∧ − x_20_2 + x_20_2 ≤ 0 ∧ x_20_2 − x_20_2 ≤ 0 ∧ − x_20_1 + x_20_1 ≤ 0 ∧ x_20_1 − x_20_1 ≤ 0 ∧ − x_20_0 + x_20_0 ≤ 0 ∧ x_20_0 − x_20_0 ≤ 0 ∧ − x_177_post + x_177_post ≤ 0 ∧ x_177_post − x_177_post ≤ 0 ∧ − x_177_0 + x_177_0 ≤ 0 ∧ x_177_0 − x_177_0 ≤ 0 ∧ − x_16_post + x_16_post ≤ 0 ∧ x_16_post − x_16_post ≤ 0 ∧ − x_16_1 + x_16_1 ≤ 0 ∧ x_16_1 − x_16_1 ≤ 0 ∧ − x_16_0 + x_16_0 ≤ 0 ∧ x_16_0 − x_16_0 ≤ 0 ∧ − x_14_post + x_14_post ≤ 0 ∧ x_14_post − x_14_post ≤ 0 ∧ − x_14_0 + x_14_0 ≤ 0 ∧ x_14_0 − x_14_0 ≤ 0 ∧ − tmp_48_post + tmp_48_post ≤ 0 ∧ tmp_48_post − tmp_48_post ≤ 0 ∧ − tmp_48_0 + tmp_48_0 ≤ 0 ∧ tmp_48_0 − tmp_48_0 ≤ 0 ∧ − temp_49_post + temp_49_post ≤ 0 ∧ temp_49_post − temp_49_post ≤ 0 ∧ − temp_49_0 + temp_49_0 ≤ 0 ∧ temp_49_0 − temp_49_0 ≤ 0 ∧ − temp0_45_post + temp0_45_post ≤ 0 ∧ temp0_45_post − temp0_45_post ≤ 0 ∧ − temp0_45_1 + temp0_45_1 ≤ 0 ∧ temp0_45_1 − temp0_45_1 ≤ 0 ∧ − temp0_45_0 + temp0_45_0 ≤ 0 ∧ temp0_45_0 − temp0_45_0 ≤ 0 ∧ − temp0_32_post + temp0_32_post ≤ 0 ∧ temp0_32_post − temp0_32_post ≤ 0 ∧ − temp0_32_4 + temp0_32_4 ≤ 0 ∧ temp0_32_4 − temp0_32_4 ≤ 0 ∧ − temp0_32_3 + temp0_32_3 ≤ 0 ∧ temp0_32_3 − temp0_32_3 ≤ 0 ∧ − temp0_32_2 + temp0_32_2 ≤ 0 ∧ temp0_32_2 − temp0_32_2 ≤ 0 ∧ − temp0_32_1 + temp0_32_1 ≤ 0 ∧ temp0_32_1 − temp0_32_1 ≤ 0 ∧ − temp0_32_0 + temp0_32_0 ≤ 0 ∧ temp0_32_0 − temp0_32_0 ≤ 0 ∧ − temp0_15_0 + temp0_15_0 ≤ 0 ∧ temp0_15_0 − temp0_15_0 ≤ 0 ∧ − t_23_post + t_23_post ≤ 0 ∧ t_23_post − t_23_post ≤ 0 ∧ − t_23_1 + t_23_1 ≤ 0 ∧ t_23_1 − t_23_1 ≤ 0 ∧ − t_23_0 + t_23_0 ≤ 0 ∧ t_23_0 − t_23_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_post + result_dot_printf_sdv_special_RETURN_VALUE_41_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_post − result_dot_printf_sdv_special_RETURN_VALUE_41_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_1 + result_dot_printf_sdv_special_RETURN_VALUE_41_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_1 − result_dot_printf_sdv_special_RETURN_VALUE_41_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_0 + result_dot_printf_sdv_special_RETURN_VALUE_41_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_0 − result_dot_printf_sdv_special_RETURN_VALUE_41_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_post + result_dot_printf_sdv_special_RETURN_VALUE_38_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_post − result_dot_printf_sdv_special_RETURN_VALUE_38_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_1 + result_dot_printf_sdv_special_RETURN_VALUE_38_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_1 − result_dot_printf_sdv_special_RETURN_VALUE_38_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_0 + result_dot_printf_sdv_special_RETURN_VALUE_38_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_0 − result_dot_printf_sdv_special_RETURN_VALUE_38_0 ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_post + result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_post − result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_1 + result_dot_nondet_sdv_special_RETURN_VALUE_13_1 ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_1 − result_dot_nondet_sdv_special_RETURN_VALUE_13_1 ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_0 + result_dot_nondet_sdv_special_RETURN_VALUE_13_0 ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_0 − result_dot_nondet_sdv_special_RETURN_VALUE_13_0 ≤ 0 ∧ − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post + result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post ≤ 0 ∧ result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post ≤ 0 ∧ − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 + result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 ≤ 0 ∧ result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 ≤ 0 ∧ − result_11_post + result_11_post ≤ 0 ∧ result_11_post − result_11_post ≤ 0 ∧ − result_11_6 + result_11_6 ≤ 0 ∧ result_11_6 − result_11_6 ≤ 0 ∧ − result_11_5 + result_11_5 ≤ 0 ∧ result_11_5 − result_11_5 ≤ 0 ∧ − result_11_4 + result_11_4 ≤ 0 ∧ result_11_4 − result_11_4 ≤ 0 ∧ − result_11_3 + result_11_3 ≤ 0 ∧ result_11_3 − result_11_3 ≤ 0 ∧ − result_11_2 + result_11_2 ≤ 0 ∧ result_11_2 − result_11_2 ≤ 0 ∧ − result_11_1 + result_11_1 ≤ 0 ∧ result_11_1 − result_11_1 ≤ 0 ∧ − result_11_0 + result_11_0 ≤ 0 ∧ result_11_0 − result_11_0 ≤ 0 ∧ − rcd_72_post + rcd_72_post ≤ 0 ∧ rcd_72_post − rcd_72_post ≤ 0 ∧ − rcd_72_0 + rcd_72_0 ≤ 0 ∧ rcd_72_0 − rcd_72_0 ≤ 0 ∧ − rcd_102_post + rcd_102_post ≤ 0 ∧ rcd_102_post − rcd_102_post ≤ 0 ∧ − rcd_102_0 + rcd_102_0 ≤ 0 ∧ rcd_102_0 − rcd_102_0 ≤ 0 ∧ − r_53_post + r_53_post ≤ 0 ∧ r_53_post − r_53_post ≤ 0 ∧ − r_53_0 + r_53_0 ≤ 0 ∧ r_53_0 − r_53_0 ≤ 0 ∧ − r_161_post + r_161_post ≤ 0 ∧ r_161_post − r_161_post ≤ 0 ∧ − r_161_0 + r_161_0 ≤ 0 ∧ r_161_0 − r_161_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 ≤ 0 ∧ − nondet_12_post + nondet_12_post ≤ 0 ∧ nondet_12_post − nondet_12_post ≤ 0 ∧ − nondet_12_1 + nondet_12_1 ≤ 0 ∧ nondet_12_1 − nondet_12_1 ≤ 0 ∧ − nondet_12_0 + nondet_12_0 ≤ 0 ∧ nondet_12_0 − nondet_12_0 ≤ 0 ∧ − lt_37_post + lt_37_post ≤ 0 ∧ lt_37_post − lt_37_post ≤ 0 ∧ − lt_37_1 + lt_37_1 ≤ 0 ∧ lt_37_1 − lt_37_1 ≤ 0 ∧ − lt_37_0 + lt_37_0 ≤ 0 ∧ lt_37_0 − lt_37_0 ≤ 0 ∧ − lt_36_post + lt_36_post ≤ 0 ∧ lt_36_post − lt_36_post ≤ 0 ∧ − lt_36_0 + lt_36_0 ≤ 0 ∧ lt_36_0 − lt_36_0 ≤ 0 ∧ − lt_237_post + lt_237_post ≤ 0 ∧ lt_237_post − lt_237_post ≤ 0 ∧ − lt_237_0 + lt_237_0 ≤ 0 ∧ lt_237_0 − lt_237_0 ≤ 0 ∧ − length_43_post + length_43_post ≤ 0 ∧ length_43_post − length_43_post ≤ 0 ∧ − length_43_0 + length_43_0 ≤ 0 ∧ length_43_0 − length_43_0 ≤ 0 ∧ − len_246_post + len_246_post ≤ 0 ∧ len_246_post − len_246_post ≤ 0 ∧ − len_246_0 + len_246_0 ≤ 0 ∧ len_246_0 − len_246_0 ≤ 0 ∧ − len_180_post + len_180_post ≤ 0 ∧ len_180_post − len_180_post ≤ 0 ∧ − len_180_0 + len_180_0 ≤ 0 ∧ len_180_0 − len_180_0 ≤ 0 ∧ − i_44_post + i_44_post ≤ 0 ∧ i_44_post − i_44_post ≤ 0 ∧ − i_44_0 + i_44_0 ≤ 0 ∧ i_44_0 − i_44_0 ≤ 0 ∧ − i_125_post + i_125_post ≤ 0 ∧ i_125_post − i_125_post ≤ 0 ∧ − i_125_0 + i_125_0 ≤ 0 ∧ i_125_0 − i_125_0 ≤ 0 ∧ − i_108_post + i_108_post ≤ 0 ∧ i_108_post − i_108_post ≤ 0 ∧ − i_108_0 + i_108_0 ≤ 0 ∧ i_108_0 − i_108_0 ≤ 0 ∧ − head_46_post + head_46_post ≤ 0 ∧ head_46_post − head_46_post ≤ 0 ∧ − head_46_0 + head_46_0 ≤ 0 ∧ head_46_0 − head_46_0 ≤ 0 ∧ − fmt_31_post + fmt_31_post ≤ 0 ∧ fmt_31_post − fmt_31_post ≤ 0 ∧ − fmt_31_4 + fmt_31_4 ≤ 0 ∧ fmt_31_4 − fmt_31_4 ≤ 0 ∧ − fmt_31_3 + fmt_31_3 ≤ 0 ∧ fmt_31_3 − fmt_31_3 ≤ 0 ∧ − fmt_31_2 + fmt_31_2 ≤ 0 ∧ fmt_31_2 − fmt_31_2 ≤ 0 ∧ − fmt_31_1 + fmt_31_1 ≤ 0 ∧ fmt_31_1 − fmt_31_1 ≤ 0 ∧ − fmt_31_0 + fmt_31_0 ≤ 0 ∧ fmt_31_0 − fmt_31_0 ≤ 0 ∧ − ct_17_post + ct_17_post ≤ 0 ∧ ct_17_post − ct_17_post ≤ 0 ∧ − ct_17_2 + ct_17_2 ≤ 0 ∧ ct_17_2 − ct_17_2 ≤ 0 ∧ − ct_17_1 + ct_17_1 ≤ 0 ∧ ct_17_1 − ct_17_1 ≤ 0 ∧ − ct_17_0 + ct_17_0 ≤ 0 ∧ ct_17_0 − ct_17_0 ≤ 0 ∧ − a_328_post + a_328_post ≤ 0 ∧ a_328_post − a_328_post ≤ 0 ∧ − a_328_0 + a_328_0 ≤ 0 ∧ a_328_0 − a_328_0 ≤ 0 ∧ − a_305_post + a_305_post ≤ 0 ∧ a_305_post − a_305_post ≤ 0 ∧ − a_305_0 + a_305_0 ≤ 0 ∧ a_305_0 − a_305_0 ≤ 0 ∧ − a_283_post + a_283_post ≤ 0 ∧ a_283_post − a_283_post ≤ 0 ∧ − a_283_0 + a_283_0 ≤ 0 ∧ a_283_0 − a_283_0 ≤ 0 ∧ − a_26_post + a_26_post ≤ 0 ∧ a_26_post − a_26_post ≤ 0 ∧ − a_26_1 + a_26_1 ≤ 0 ∧ a_26_1 − a_26_1 ≤ 0 ∧ − a_26_0 + a_26_0 ≤ 0 ∧ a_26_0 − a_26_0 ≤ 0 ∧ − a_247_post + a_247_post ≤ 0 ∧ a_247_post − a_247_post ≤ 0 ∧ − a_247_0 + a_247_0 ≤ 0 ∧ a_247_0 − a_247_0 ≤ 0 ∧ − a_197_post + a_197_post ≤ 0 ∧ a_197_post − a_197_post ≤ 0 ∧ − a_197_0 + a_197_0 ≤ 0 ∧ a_197_0 − a_197_0 ≤ 0 ∧ − a_146_0 + a_146_0 ≤ 0 ∧ a_146_0 − a_146_0 ≤ 0 | |
| 14 | 20 | 15: | 1 + x_14_0 ≤ 0 ∧ − y_19_post + y_19_post ≤ 0 ∧ y_19_post − y_19_post ≤ 0 ∧ − y_19_2 + y_19_2 ≤ 0 ∧ y_19_2 − y_19_2 ≤ 0 ∧ − y_19_1 + y_19_1 ≤ 0 ∧ y_19_1 − y_19_1 ≤ 0 ∧ − y_19_0 + y_19_0 ≤ 0 ∧ y_19_0 − y_19_0 ≤ 0 ∧ − x_SLAM_f_18_post + x_SLAM_f_18_post ≤ 0 ∧ x_SLAM_f_18_post − x_SLAM_f_18_post ≤ 0 ∧ − x_SLAM_f_18_2 + x_SLAM_f_18_2 ≤ 0 ∧ x_SLAM_f_18_2 − x_SLAM_f_18_2 ≤ 0 ∧ − x_SLAM_f_18_1 + x_SLAM_f_18_1 ≤ 0 ∧ x_SLAM_f_18_1 − x_SLAM_f_18_1 ≤ 0 ∧ − x_SLAM_f_18_0 + x_SLAM_f_18_0 ≤ 0 ∧ x_SLAM_f_18_0 − x_SLAM_f_18_0 ≤ 0 ∧ − x_34_post + x_34_post ≤ 0 ∧ x_34_post − x_34_post ≤ 0 ∧ − x_34_1 + x_34_1 ≤ 0 ∧ x_34_1 − x_34_1 ≤ 0 ∧ − x_34_0 + x_34_0 ≤ 0 ∧ x_34_0 − x_34_0 ≤ 0 ∧ − x_28_post + x_28_post ≤ 0 ∧ x_28_post − x_28_post ≤ 0 ∧ − x_28_1 + x_28_1 ≤ 0 ∧ x_28_1 − x_28_1 ≤ 0 ∧ − x_28_0 + x_28_0 ≤ 0 ∧ x_28_0 − x_28_0 ≤ 0 ∧ − x_238_post + x_238_post ≤ 0 ∧ x_238_post − x_238_post ≤ 0 ∧ − x_238_0 + x_238_0 ≤ 0 ∧ x_238_0 − x_238_0 ≤ 0 ∧ − x_20_post + x_20_post ≤ 0 ∧ x_20_post − x_20_post ≤ 0 ∧ − x_20_2 + x_20_2 ≤ 0 ∧ x_20_2 − x_20_2 ≤ 0 ∧ − x_20_1 + x_20_1 ≤ 0 ∧ x_20_1 − x_20_1 ≤ 0 ∧ − x_20_0 + x_20_0 ≤ 0 ∧ x_20_0 − x_20_0 ≤ 0 ∧ − x_177_post + x_177_post ≤ 0 ∧ x_177_post − x_177_post ≤ 0 ∧ − x_177_0 + x_177_0 ≤ 0 ∧ x_177_0 − x_177_0 ≤ 0 ∧ − x_16_post + x_16_post ≤ 0 ∧ x_16_post − x_16_post ≤ 0 ∧ − x_16_1 + x_16_1 ≤ 0 ∧ x_16_1 − x_16_1 ≤ 0 ∧ − x_16_0 + x_16_0 ≤ 0 ∧ x_16_0 − x_16_0 ≤ 0 ∧ − x_14_post + x_14_post ≤ 0 ∧ x_14_post − x_14_post ≤ 0 ∧ − x_14_0 + x_14_0 ≤ 0 ∧ x_14_0 − x_14_0 ≤ 0 ∧ − tmp_48_post + tmp_48_post ≤ 0 ∧ tmp_48_post − tmp_48_post ≤ 0 ∧ − tmp_48_0 + tmp_48_0 ≤ 0 ∧ tmp_48_0 − tmp_48_0 ≤ 0 ∧ − temp_49_post + temp_49_post ≤ 0 ∧ temp_49_post − temp_49_post ≤ 0 ∧ − temp_49_0 + temp_49_0 ≤ 0 ∧ temp_49_0 − temp_49_0 ≤ 0 ∧ − temp0_45_post + temp0_45_post ≤ 0 ∧ temp0_45_post − temp0_45_post ≤ 0 ∧ − temp0_45_1 + temp0_45_1 ≤ 0 ∧ temp0_45_1 − temp0_45_1 ≤ 0 ∧ − temp0_45_0 + temp0_45_0 ≤ 0 ∧ temp0_45_0 − temp0_45_0 ≤ 0 ∧ − temp0_32_post + temp0_32_post ≤ 0 ∧ temp0_32_post − temp0_32_post ≤ 0 ∧ − temp0_32_4 + temp0_32_4 ≤ 0 ∧ temp0_32_4 − temp0_32_4 ≤ 0 ∧ − temp0_32_3 + temp0_32_3 ≤ 0 ∧ temp0_32_3 − temp0_32_3 ≤ 0 ∧ − temp0_32_2 + temp0_32_2 ≤ 0 ∧ temp0_32_2 − temp0_32_2 ≤ 0 ∧ − temp0_32_1 + temp0_32_1 ≤ 0 ∧ temp0_32_1 − temp0_32_1 ≤ 0 ∧ − temp0_32_0 + temp0_32_0 ≤ 0 ∧ temp0_32_0 − temp0_32_0 ≤ 0 ∧ − temp0_15_0 + temp0_15_0 ≤ 0 ∧ temp0_15_0 − temp0_15_0 ≤ 0 ∧ − t_23_post + t_23_post ≤ 0 ∧ t_23_post − t_23_post ≤ 0 ∧ − t_23_1 + t_23_1 ≤ 0 ∧ t_23_1 − t_23_1 ≤ 0 ∧ − t_23_0 + t_23_0 ≤ 0 ∧ t_23_0 − t_23_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_post + result_dot_printf_sdv_special_RETURN_VALUE_41_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_post − result_dot_printf_sdv_special_RETURN_VALUE_41_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_1 + result_dot_printf_sdv_special_RETURN_VALUE_41_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_1 − result_dot_printf_sdv_special_RETURN_VALUE_41_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_0 + result_dot_printf_sdv_special_RETURN_VALUE_41_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_0 − result_dot_printf_sdv_special_RETURN_VALUE_41_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_post + result_dot_printf_sdv_special_RETURN_VALUE_38_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_post − result_dot_printf_sdv_special_RETURN_VALUE_38_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_1 + result_dot_printf_sdv_special_RETURN_VALUE_38_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_1 − result_dot_printf_sdv_special_RETURN_VALUE_38_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_0 + result_dot_printf_sdv_special_RETURN_VALUE_38_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_0 − result_dot_printf_sdv_special_RETURN_VALUE_38_0 ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_post + result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_post − result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_1 + result_dot_nondet_sdv_special_RETURN_VALUE_13_1 ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_1 − result_dot_nondet_sdv_special_RETURN_VALUE_13_1 ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_0 + result_dot_nondet_sdv_special_RETURN_VALUE_13_0 ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_0 − result_dot_nondet_sdv_special_RETURN_VALUE_13_0 ≤ 0 ∧ − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post + result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post ≤ 0 ∧ result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post ≤ 0 ∧ − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 + result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 ≤ 0 ∧ result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 ≤ 0 ∧ − result_11_post + result_11_post ≤ 0 ∧ result_11_post − result_11_post ≤ 0 ∧ − result_11_6 + result_11_6 ≤ 0 ∧ result_11_6 − result_11_6 ≤ 0 ∧ − result_11_5 + result_11_5 ≤ 0 ∧ result_11_5 − result_11_5 ≤ 0 ∧ − result_11_4 + result_11_4 ≤ 0 ∧ result_11_4 − result_11_4 ≤ 0 ∧ − result_11_3 + result_11_3 ≤ 0 ∧ result_11_3 − result_11_3 ≤ 0 ∧ − result_11_2 + result_11_2 ≤ 0 ∧ result_11_2 − result_11_2 ≤ 0 ∧ − result_11_1 + result_11_1 ≤ 0 ∧ result_11_1 − result_11_1 ≤ 0 ∧ − result_11_0 + result_11_0 ≤ 0 ∧ result_11_0 − result_11_0 ≤ 0 ∧ − rcd_72_post + rcd_72_post ≤ 0 ∧ rcd_72_post − rcd_72_post ≤ 0 ∧ − rcd_72_0 + rcd_72_0 ≤ 0 ∧ rcd_72_0 − rcd_72_0 ≤ 0 ∧ − rcd_102_post + rcd_102_post ≤ 0 ∧ rcd_102_post − rcd_102_post ≤ 0 ∧ − rcd_102_0 + rcd_102_0 ≤ 0 ∧ rcd_102_0 − rcd_102_0 ≤ 0 ∧ − r_53_post + r_53_post ≤ 0 ∧ r_53_post − r_53_post ≤ 0 ∧ − r_53_0 + r_53_0 ≤ 0 ∧ r_53_0 − r_53_0 ≤ 0 ∧ − r_161_post + r_161_post ≤ 0 ∧ r_161_post − r_161_post ≤ 0 ∧ − r_161_0 + r_161_0 ≤ 0 ∧ r_161_0 − r_161_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 ≤ 0 ∧ − nondet_12_post + nondet_12_post ≤ 0 ∧ nondet_12_post − nondet_12_post ≤ 0 ∧ − nondet_12_1 + nondet_12_1 ≤ 0 ∧ nondet_12_1 − nondet_12_1 ≤ 0 ∧ − nondet_12_0 + nondet_12_0 ≤ 0 ∧ nondet_12_0 − nondet_12_0 ≤ 0 ∧ − lt_37_post + lt_37_post ≤ 0 ∧ lt_37_post − lt_37_post ≤ 0 ∧ − lt_37_1 + lt_37_1 ≤ 0 ∧ lt_37_1 − lt_37_1 ≤ 0 ∧ − lt_37_0 + lt_37_0 ≤ 0 ∧ lt_37_0 − lt_37_0 ≤ 0 ∧ − lt_36_post + lt_36_post ≤ 0 ∧ lt_36_post − lt_36_post ≤ 0 ∧ − lt_36_0 + lt_36_0 ≤ 0 ∧ lt_36_0 − lt_36_0 ≤ 0 ∧ − lt_237_post + lt_237_post ≤ 0 ∧ lt_237_post − lt_237_post ≤ 0 ∧ − lt_237_0 + lt_237_0 ≤ 0 ∧ lt_237_0 − lt_237_0 ≤ 0 ∧ − length_43_post + length_43_post ≤ 0 ∧ length_43_post − length_43_post ≤ 0 ∧ − length_43_0 + length_43_0 ≤ 0 ∧ length_43_0 − length_43_0 ≤ 0 ∧ − len_246_post + len_246_post ≤ 0 ∧ len_246_post − len_246_post ≤ 0 ∧ − len_246_0 + len_246_0 ≤ 0 ∧ len_246_0 − len_246_0 ≤ 0 ∧ − len_180_post + len_180_post ≤ 0 ∧ len_180_post − len_180_post ≤ 0 ∧ − len_180_0 + len_180_0 ≤ 0 ∧ len_180_0 − len_180_0 ≤ 0 ∧ − i_44_post + i_44_post ≤ 0 ∧ i_44_post − i_44_post ≤ 0 ∧ − i_44_0 + i_44_0 ≤ 0 ∧ i_44_0 − i_44_0 ≤ 0 ∧ − i_125_post + i_125_post ≤ 0 ∧ i_125_post − i_125_post ≤ 0 ∧ − i_125_0 + i_125_0 ≤ 0 ∧ i_125_0 − i_125_0 ≤ 0 ∧ − i_108_post + i_108_post ≤ 0 ∧ i_108_post − i_108_post ≤ 0 ∧ − i_108_0 + i_108_0 ≤ 0 ∧ i_108_0 − i_108_0 ≤ 0 ∧ − head_46_post + head_46_post ≤ 0 ∧ head_46_post − head_46_post ≤ 0 ∧ − head_46_0 + head_46_0 ≤ 0 ∧ head_46_0 − head_46_0 ≤ 0 ∧ − fmt_31_post + fmt_31_post ≤ 0 ∧ fmt_31_post − fmt_31_post ≤ 0 ∧ − fmt_31_4 + fmt_31_4 ≤ 0 ∧ fmt_31_4 − fmt_31_4 ≤ 0 ∧ − fmt_31_3 + fmt_31_3 ≤ 0 ∧ fmt_31_3 − fmt_31_3 ≤ 0 ∧ − fmt_31_2 + fmt_31_2 ≤ 0 ∧ fmt_31_2 − fmt_31_2 ≤ 0 ∧ − fmt_31_1 + fmt_31_1 ≤ 0 ∧ fmt_31_1 − fmt_31_1 ≤ 0 ∧ − fmt_31_0 + fmt_31_0 ≤ 0 ∧ fmt_31_0 − fmt_31_0 ≤ 0 ∧ − ct_17_post + ct_17_post ≤ 0 ∧ ct_17_post − ct_17_post ≤ 0 ∧ − ct_17_2 + ct_17_2 ≤ 0 ∧ ct_17_2 − ct_17_2 ≤ 0 ∧ − ct_17_1 + ct_17_1 ≤ 0 ∧ ct_17_1 − ct_17_1 ≤ 0 ∧ − ct_17_0 + ct_17_0 ≤ 0 ∧ ct_17_0 − ct_17_0 ≤ 0 ∧ − a_328_post + a_328_post ≤ 0 ∧ a_328_post − a_328_post ≤ 0 ∧ − a_328_0 + a_328_0 ≤ 0 ∧ a_328_0 − a_328_0 ≤ 0 ∧ − a_305_post + a_305_post ≤ 0 ∧ a_305_post − a_305_post ≤ 0 ∧ − a_305_0 + a_305_0 ≤ 0 ∧ a_305_0 − a_305_0 ≤ 0 ∧ − a_283_post + a_283_post ≤ 0 ∧ a_283_post − a_283_post ≤ 0 ∧ − a_283_0 + a_283_0 ≤ 0 ∧ a_283_0 − a_283_0 ≤ 0 ∧ − a_26_post + a_26_post ≤ 0 ∧ a_26_post − a_26_post ≤ 0 ∧ − a_26_1 + a_26_1 ≤ 0 ∧ a_26_1 − a_26_1 ≤ 0 ∧ − a_26_0 + a_26_0 ≤ 0 ∧ a_26_0 − a_26_0 ≤ 0 ∧ − a_247_post + a_247_post ≤ 0 ∧ a_247_post − a_247_post ≤ 0 ∧ − a_247_0 + a_247_0 ≤ 0 ∧ a_247_0 − a_247_0 ≤ 0 ∧ − a_197_post + a_197_post ≤ 0 ∧ a_197_post − a_197_post ≤ 0 ∧ − a_197_0 + a_197_0 ≤ 0 ∧ a_197_0 − a_197_0 ≤ 0 ∧ − a_146_0 + a_146_0 ≤ 0 ∧ a_146_0 − a_146_0 ≤ 0 | |
| 15 | 21 | 16: | 1 + x_14_0 − y_19_0 ≤ 0 ∧ − y_19_post + y_19_post ≤ 0 ∧ y_19_post − y_19_post ≤ 0 ∧ − y_19_2 + y_19_2 ≤ 0 ∧ y_19_2 − y_19_2 ≤ 0 ∧ − y_19_1 + y_19_1 ≤ 0 ∧ y_19_1 − y_19_1 ≤ 0 ∧ − y_19_0 + y_19_0 ≤ 0 ∧ y_19_0 − y_19_0 ≤ 0 ∧ − x_SLAM_f_18_post + x_SLAM_f_18_post ≤ 0 ∧ x_SLAM_f_18_post − x_SLAM_f_18_post ≤ 0 ∧ − x_SLAM_f_18_2 + x_SLAM_f_18_2 ≤ 0 ∧ x_SLAM_f_18_2 − x_SLAM_f_18_2 ≤ 0 ∧ − x_SLAM_f_18_1 + x_SLAM_f_18_1 ≤ 0 ∧ x_SLAM_f_18_1 − x_SLAM_f_18_1 ≤ 0 ∧ − x_SLAM_f_18_0 + x_SLAM_f_18_0 ≤ 0 ∧ x_SLAM_f_18_0 − x_SLAM_f_18_0 ≤ 0 ∧ − x_34_post + x_34_post ≤ 0 ∧ x_34_post − x_34_post ≤ 0 ∧ − x_34_1 + x_34_1 ≤ 0 ∧ x_34_1 − x_34_1 ≤ 0 ∧ − x_34_0 + x_34_0 ≤ 0 ∧ x_34_0 − x_34_0 ≤ 0 ∧ − x_28_post + x_28_post ≤ 0 ∧ x_28_post − x_28_post ≤ 0 ∧ − x_28_1 + x_28_1 ≤ 0 ∧ x_28_1 − x_28_1 ≤ 0 ∧ − x_28_0 + x_28_0 ≤ 0 ∧ x_28_0 − x_28_0 ≤ 0 ∧ − x_238_post + x_238_post ≤ 0 ∧ x_238_post − x_238_post ≤ 0 ∧ − x_238_0 + x_238_0 ≤ 0 ∧ x_238_0 − x_238_0 ≤ 0 ∧ − x_20_post + x_20_post ≤ 0 ∧ x_20_post − x_20_post ≤ 0 ∧ − x_20_2 + x_20_2 ≤ 0 ∧ x_20_2 − x_20_2 ≤ 0 ∧ − x_20_1 + x_20_1 ≤ 0 ∧ x_20_1 − x_20_1 ≤ 0 ∧ − x_20_0 + x_20_0 ≤ 0 ∧ x_20_0 − x_20_0 ≤ 0 ∧ − x_177_post + x_177_post ≤ 0 ∧ x_177_post − x_177_post ≤ 0 ∧ − x_177_0 + x_177_0 ≤ 0 ∧ x_177_0 − x_177_0 ≤ 0 ∧ − x_16_post + x_16_post ≤ 0 ∧ x_16_post − x_16_post ≤ 0 ∧ − x_16_1 + x_16_1 ≤ 0 ∧ x_16_1 − x_16_1 ≤ 0 ∧ − x_16_0 + x_16_0 ≤ 0 ∧ x_16_0 − x_16_0 ≤ 0 ∧ − x_14_post + x_14_post ≤ 0 ∧ x_14_post − x_14_post ≤ 0 ∧ − x_14_0 + x_14_0 ≤ 0 ∧ x_14_0 − x_14_0 ≤ 0 ∧ − tmp_48_post + tmp_48_post ≤ 0 ∧ tmp_48_post − tmp_48_post ≤ 0 ∧ − tmp_48_0 + tmp_48_0 ≤ 0 ∧ tmp_48_0 − tmp_48_0 ≤ 0 ∧ − temp_49_post + temp_49_post ≤ 0 ∧ temp_49_post − temp_49_post ≤ 0 ∧ − temp_49_0 + temp_49_0 ≤ 0 ∧ temp_49_0 − temp_49_0 ≤ 0 ∧ − temp0_45_post + temp0_45_post ≤ 0 ∧ temp0_45_post − temp0_45_post ≤ 0 ∧ − temp0_45_1 + temp0_45_1 ≤ 0 ∧ temp0_45_1 − temp0_45_1 ≤ 0 ∧ − temp0_45_0 + temp0_45_0 ≤ 0 ∧ temp0_45_0 − temp0_45_0 ≤ 0 ∧ − temp0_32_post + temp0_32_post ≤ 0 ∧ temp0_32_post − temp0_32_post ≤ 0 ∧ − temp0_32_4 + temp0_32_4 ≤ 0 ∧ temp0_32_4 − temp0_32_4 ≤ 0 ∧ − temp0_32_3 + temp0_32_3 ≤ 0 ∧ temp0_32_3 − temp0_32_3 ≤ 0 ∧ − temp0_32_2 + temp0_32_2 ≤ 0 ∧ temp0_32_2 − temp0_32_2 ≤ 0 ∧ − temp0_32_1 + temp0_32_1 ≤ 0 ∧ temp0_32_1 − temp0_32_1 ≤ 0 ∧ − temp0_32_0 + temp0_32_0 ≤ 0 ∧ temp0_32_0 − temp0_32_0 ≤ 0 ∧ − temp0_15_0 + temp0_15_0 ≤ 0 ∧ temp0_15_0 − temp0_15_0 ≤ 0 ∧ − t_23_post + t_23_post ≤ 0 ∧ t_23_post − t_23_post ≤ 0 ∧ − t_23_1 + t_23_1 ≤ 0 ∧ t_23_1 − t_23_1 ≤ 0 ∧ − t_23_0 + t_23_0 ≤ 0 ∧ t_23_0 − t_23_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_post + result_dot_printf_sdv_special_RETURN_VALUE_41_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_post − result_dot_printf_sdv_special_RETURN_VALUE_41_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_1 + result_dot_printf_sdv_special_RETURN_VALUE_41_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_1 − result_dot_printf_sdv_special_RETURN_VALUE_41_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_0 + result_dot_printf_sdv_special_RETURN_VALUE_41_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_0 − result_dot_printf_sdv_special_RETURN_VALUE_41_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_post + result_dot_printf_sdv_special_RETURN_VALUE_38_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_post − result_dot_printf_sdv_special_RETURN_VALUE_38_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_1 + result_dot_printf_sdv_special_RETURN_VALUE_38_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_1 − result_dot_printf_sdv_special_RETURN_VALUE_38_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_0 + result_dot_printf_sdv_special_RETURN_VALUE_38_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_0 − result_dot_printf_sdv_special_RETURN_VALUE_38_0 ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_post + result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_post − result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_1 + result_dot_nondet_sdv_special_RETURN_VALUE_13_1 ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_1 − result_dot_nondet_sdv_special_RETURN_VALUE_13_1 ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_0 + result_dot_nondet_sdv_special_RETURN_VALUE_13_0 ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_0 − result_dot_nondet_sdv_special_RETURN_VALUE_13_0 ≤ 0 ∧ − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post + result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post ≤ 0 ∧ result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post ≤ 0 ∧ − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 + result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 ≤ 0 ∧ result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 ≤ 0 ∧ − result_11_post + result_11_post ≤ 0 ∧ result_11_post − result_11_post ≤ 0 ∧ − result_11_6 + result_11_6 ≤ 0 ∧ result_11_6 − result_11_6 ≤ 0 ∧ − result_11_5 + result_11_5 ≤ 0 ∧ result_11_5 − result_11_5 ≤ 0 ∧ − result_11_4 + result_11_4 ≤ 0 ∧ result_11_4 − result_11_4 ≤ 0 ∧ − result_11_3 + result_11_3 ≤ 0 ∧ result_11_3 − result_11_3 ≤ 0 ∧ − result_11_2 + result_11_2 ≤ 0 ∧ result_11_2 − result_11_2 ≤ 0 ∧ − result_11_1 + result_11_1 ≤ 0 ∧ result_11_1 − result_11_1 ≤ 0 ∧ − result_11_0 + result_11_0 ≤ 0 ∧ result_11_0 − result_11_0 ≤ 0 ∧ − rcd_72_post + rcd_72_post ≤ 0 ∧ rcd_72_post − rcd_72_post ≤ 0 ∧ − rcd_72_0 + rcd_72_0 ≤ 0 ∧ rcd_72_0 − rcd_72_0 ≤ 0 ∧ − rcd_102_post + rcd_102_post ≤ 0 ∧ rcd_102_post − rcd_102_post ≤ 0 ∧ − rcd_102_0 + rcd_102_0 ≤ 0 ∧ rcd_102_0 − rcd_102_0 ≤ 0 ∧ − r_53_post + r_53_post ≤ 0 ∧ r_53_post − r_53_post ≤ 0 ∧ − r_53_0 + r_53_0 ≤ 0 ∧ r_53_0 − r_53_0 ≤ 0 ∧ − r_161_post + r_161_post ≤ 0 ∧ r_161_post − r_161_post ≤ 0 ∧ − r_161_0 + r_161_0 ≤ 0 ∧ r_161_0 − r_161_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 ≤ 0 ∧ − nondet_12_post + nondet_12_post ≤ 0 ∧ nondet_12_post − nondet_12_post ≤ 0 ∧ − nondet_12_1 + nondet_12_1 ≤ 0 ∧ nondet_12_1 − nondet_12_1 ≤ 0 ∧ − nondet_12_0 + nondet_12_0 ≤ 0 ∧ nondet_12_0 − nondet_12_0 ≤ 0 ∧ − lt_37_post + lt_37_post ≤ 0 ∧ lt_37_post − lt_37_post ≤ 0 ∧ − lt_37_1 + lt_37_1 ≤ 0 ∧ lt_37_1 − lt_37_1 ≤ 0 ∧ − lt_37_0 + lt_37_0 ≤ 0 ∧ lt_37_0 − lt_37_0 ≤ 0 ∧ − lt_36_post + lt_36_post ≤ 0 ∧ lt_36_post − lt_36_post ≤ 0 ∧ − lt_36_0 + lt_36_0 ≤ 0 ∧ lt_36_0 − lt_36_0 ≤ 0 ∧ − lt_237_post + lt_237_post ≤ 0 ∧ lt_237_post − lt_237_post ≤ 0 ∧ − lt_237_0 + lt_237_0 ≤ 0 ∧ lt_237_0 − lt_237_0 ≤ 0 ∧ − length_43_post + length_43_post ≤ 0 ∧ length_43_post − length_43_post ≤ 0 ∧ − length_43_0 + length_43_0 ≤ 0 ∧ length_43_0 − length_43_0 ≤ 0 ∧ − len_246_post + len_246_post ≤ 0 ∧ len_246_post − len_246_post ≤ 0 ∧ − len_246_0 + len_246_0 ≤ 0 ∧ len_246_0 − len_246_0 ≤ 0 ∧ − len_180_post + len_180_post ≤ 0 ∧ len_180_post − len_180_post ≤ 0 ∧ − len_180_0 + len_180_0 ≤ 0 ∧ len_180_0 − len_180_0 ≤ 0 ∧ − i_44_post + i_44_post ≤ 0 ∧ i_44_post − i_44_post ≤ 0 ∧ − i_44_0 + i_44_0 ≤ 0 ∧ i_44_0 − i_44_0 ≤ 0 ∧ − i_125_post + i_125_post ≤ 0 ∧ i_125_post − i_125_post ≤ 0 ∧ − i_125_0 + i_125_0 ≤ 0 ∧ i_125_0 − i_125_0 ≤ 0 ∧ − i_108_post + i_108_post ≤ 0 ∧ i_108_post − i_108_post ≤ 0 ∧ − i_108_0 + i_108_0 ≤ 0 ∧ i_108_0 − i_108_0 ≤ 0 ∧ − head_46_post + head_46_post ≤ 0 ∧ head_46_post − head_46_post ≤ 0 ∧ − head_46_0 + head_46_0 ≤ 0 ∧ head_46_0 − head_46_0 ≤ 0 ∧ − fmt_31_post + fmt_31_post ≤ 0 ∧ fmt_31_post − fmt_31_post ≤ 0 ∧ − fmt_31_4 + fmt_31_4 ≤ 0 ∧ fmt_31_4 − fmt_31_4 ≤ 0 ∧ − fmt_31_3 + fmt_31_3 ≤ 0 ∧ fmt_31_3 − fmt_31_3 ≤ 0 ∧ − fmt_31_2 + fmt_31_2 ≤ 0 ∧ fmt_31_2 − fmt_31_2 ≤ 0 ∧ − fmt_31_1 + fmt_31_1 ≤ 0 ∧ fmt_31_1 − fmt_31_1 ≤ 0 ∧ − fmt_31_0 + fmt_31_0 ≤ 0 ∧ fmt_31_0 − fmt_31_0 ≤ 0 ∧ − ct_17_post + ct_17_post ≤ 0 ∧ ct_17_post − ct_17_post ≤ 0 ∧ − ct_17_2 + ct_17_2 ≤ 0 ∧ ct_17_2 − ct_17_2 ≤ 0 ∧ − ct_17_1 + ct_17_1 ≤ 0 ∧ ct_17_1 − ct_17_1 ≤ 0 ∧ − ct_17_0 + ct_17_0 ≤ 0 ∧ ct_17_0 − ct_17_0 ≤ 0 ∧ − a_328_post + a_328_post ≤ 0 ∧ a_328_post − a_328_post ≤ 0 ∧ − a_328_0 + a_328_0 ≤ 0 ∧ a_328_0 − a_328_0 ≤ 0 ∧ − a_305_post + a_305_post ≤ 0 ∧ a_305_post − a_305_post ≤ 0 ∧ − a_305_0 + a_305_0 ≤ 0 ∧ a_305_0 − a_305_0 ≤ 0 ∧ − a_283_post + a_283_post ≤ 0 ∧ a_283_post − a_283_post ≤ 0 ∧ − a_283_0 + a_283_0 ≤ 0 ∧ a_283_0 − a_283_0 ≤ 0 ∧ − a_26_post + a_26_post ≤ 0 ∧ a_26_post − a_26_post ≤ 0 ∧ − a_26_1 + a_26_1 ≤ 0 ∧ a_26_1 − a_26_1 ≤ 0 ∧ − a_26_0 + a_26_0 ≤ 0 ∧ a_26_0 − a_26_0 ≤ 0 ∧ − a_247_post + a_247_post ≤ 0 ∧ a_247_post − a_247_post ≤ 0 ∧ − a_247_0 + a_247_0 ≤ 0 ∧ a_247_0 − a_247_0 ≤ 0 ∧ − a_197_post + a_197_post ≤ 0 ∧ a_197_post − a_197_post ≤ 0 ∧ − a_197_0 + a_197_0 ≤ 0 ∧ a_197_0 − a_197_0 ≤ 0 ∧ − a_146_0 + a_146_0 ≤ 0 ∧ a_146_0 − a_146_0 ≤ 0 | |
| 15 | 22 | 16: | 1 − x_14_0 + y_19_0 ≤ 0 ∧ − y_19_post + y_19_post ≤ 0 ∧ y_19_post − y_19_post ≤ 0 ∧ − y_19_2 + y_19_2 ≤ 0 ∧ y_19_2 − y_19_2 ≤ 0 ∧ − y_19_1 + y_19_1 ≤ 0 ∧ y_19_1 − y_19_1 ≤ 0 ∧ − y_19_0 + y_19_0 ≤ 0 ∧ y_19_0 − y_19_0 ≤ 0 ∧ − x_SLAM_f_18_post + x_SLAM_f_18_post ≤ 0 ∧ x_SLAM_f_18_post − x_SLAM_f_18_post ≤ 0 ∧ − x_SLAM_f_18_2 + x_SLAM_f_18_2 ≤ 0 ∧ x_SLAM_f_18_2 − x_SLAM_f_18_2 ≤ 0 ∧ − x_SLAM_f_18_1 + x_SLAM_f_18_1 ≤ 0 ∧ x_SLAM_f_18_1 − x_SLAM_f_18_1 ≤ 0 ∧ − x_SLAM_f_18_0 + x_SLAM_f_18_0 ≤ 0 ∧ x_SLAM_f_18_0 − x_SLAM_f_18_0 ≤ 0 ∧ − x_34_post + x_34_post ≤ 0 ∧ x_34_post − x_34_post ≤ 0 ∧ − x_34_1 + x_34_1 ≤ 0 ∧ x_34_1 − x_34_1 ≤ 0 ∧ − x_34_0 + x_34_0 ≤ 0 ∧ x_34_0 − x_34_0 ≤ 0 ∧ − x_28_post + x_28_post ≤ 0 ∧ x_28_post − x_28_post ≤ 0 ∧ − x_28_1 + x_28_1 ≤ 0 ∧ x_28_1 − x_28_1 ≤ 0 ∧ − x_28_0 + x_28_0 ≤ 0 ∧ x_28_0 − x_28_0 ≤ 0 ∧ − x_238_post + x_238_post ≤ 0 ∧ x_238_post − x_238_post ≤ 0 ∧ − x_238_0 + x_238_0 ≤ 0 ∧ x_238_0 − x_238_0 ≤ 0 ∧ − x_20_post + x_20_post ≤ 0 ∧ x_20_post − x_20_post ≤ 0 ∧ − x_20_2 + x_20_2 ≤ 0 ∧ x_20_2 − x_20_2 ≤ 0 ∧ − x_20_1 + x_20_1 ≤ 0 ∧ x_20_1 − x_20_1 ≤ 0 ∧ − x_20_0 + x_20_0 ≤ 0 ∧ x_20_0 − x_20_0 ≤ 0 ∧ − x_177_post + x_177_post ≤ 0 ∧ x_177_post − x_177_post ≤ 0 ∧ − x_177_0 + x_177_0 ≤ 0 ∧ x_177_0 − x_177_0 ≤ 0 ∧ − x_16_post + x_16_post ≤ 0 ∧ x_16_post − x_16_post ≤ 0 ∧ − x_16_1 + x_16_1 ≤ 0 ∧ x_16_1 − x_16_1 ≤ 0 ∧ − x_16_0 + x_16_0 ≤ 0 ∧ x_16_0 − x_16_0 ≤ 0 ∧ − x_14_post + x_14_post ≤ 0 ∧ x_14_post − x_14_post ≤ 0 ∧ − x_14_0 + x_14_0 ≤ 0 ∧ x_14_0 − x_14_0 ≤ 0 ∧ − tmp_48_post + tmp_48_post ≤ 0 ∧ tmp_48_post − tmp_48_post ≤ 0 ∧ − tmp_48_0 + tmp_48_0 ≤ 0 ∧ tmp_48_0 − tmp_48_0 ≤ 0 ∧ − temp_49_post + temp_49_post ≤ 0 ∧ temp_49_post − temp_49_post ≤ 0 ∧ − temp_49_0 + temp_49_0 ≤ 0 ∧ temp_49_0 − temp_49_0 ≤ 0 ∧ − temp0_45_post + temp0_45_post ≤ 0 ∧ temp0_45_post − temp0_45_post ≤ 0 ∧ − temp0_45_1 + temp0_45_1 ≤ 0 ∧ temp0_45_1 − temp0_45_1 ≤ 0 ∧ − temp0_45_0 + temp0_45_0 ≤ 0 ∧ temp0_45_0 − temp0_45_0 ≤ 0 ∧ − temp0_32_post + temp0_32_post ≤ 0 ∧ temp0_32_post − temp0_32_post ≤ 0 ∧ − temp0_32_4 + temp0_32_4 ≤ 0 ∧ temp0_32_4 − temp0_32_4 ≤ 0 ∧ − temp0_32_3 + temp0_32_3 ≤ 0 ∧ temp0_32_3 − temp0_32_3 ≤ 0 ∧ − temp0_32_2 + temp0_32_2 ≤ 0 ∧ temp0_32_2 − temp0_32_2 ≤ 0 ∧ − temp0_32_1 + temp0_32_1 ≤ 0 ∧ temp0_32_1 − temp0_32_1 ≤ 0 ∧ − temp0_32_0 + temp0_32_0 ≤ 0 ∧ temp0_32_0 − temp0_32_0 ≤ 0 ∧ − temp0_15_0 + temp0_15_0 ≤ 0 ∧ temp0_15_0 − temp0_15_0 ≤ 0 ∧ − t_23_post + t_23_post ≤ 0 ∧ t_23_post − t_23_post ≤ 0 ∧ − t_23_1 + t_23_1 ≤ 0 ∧ t_23_1 − t_23_1 ≤ 0 ∧ − t_23_0 + t_23_0 ≤ 0 ∧ t_23_0 − t_23_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_post + result_dot_printf_sdv_special_RETURN_VALUE_41_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_post − result_dot_printf_sdv_special_RETURN_VALUE_41_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_1 + result_dot_printf_sdv_special_RETURN_VALUE_41_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_1 − result_dot_printf_sdv_special_RETURN_VALUE_41_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_0 + result_dot_printf_sdv_special_RETURN_VALUE_41_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_0 − result_dot_printf_sdv_special_RETURN_VALUE_41_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_post + result_dot_printf_sdv_special_RETURN_VALUE_38_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_post − result_dot_printf_sdv_special_RETURN_VALUE_38_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_1 + result_dot_printf_sdv_special_RETURN_VALUE_38_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_1 − result_dot_printf_sdv_special_RETURN_VALUE_38_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_0 + result_dot_printf_sdv_special_RETURN_VALUE_38_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_0 − result_dot_printf_sdv_special_RETURN_VALUE_38_0 ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_post + result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_post − result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_1 + result_dot_nondet_sdv_special_RETURN_VALUE_13_1 ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_1 − result_dot_nondet_sdv_special_RETURN_VALUE_13_1 ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_0 + result_dot_nondet_sdv_special_RETURN_VALUE_13_0 ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_0 − result_dot_nondet_sdv_special_RETURN_VALUE_13_0 ≤ 0 ∧ − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post + result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post ≤ 0 ∧ result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post ≤ 0 ∧ − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 + result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 ≤ 0 ∧ result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 ≤ 0 ∧ − result_11_post + result_11_post ≤ 0 ∧ result_11_post − result_11_post ≤ 0 ∧ − result_11_6 + result_11_6 ≤ 0 ∧ result_11_6 − result_11_6 ≤ 0 ∧ − result_11_5 + result_11_5 ≤ 0 ∧ result_11_5 − result_11_5 ≤ 0 ∧ − result_11_4 + result_11_4 ≤ 0 ∧ result_11_4 − result_11_4 ≤ 0 ∧ − result_11_3 + result_11_3 ≤ 0 ∧ result_11_3 − result_11_3 ≤ 0 ∧ − result_11_2 + result_11_2 ≤ 0 ∧ result_11_2 − result_11_2 ≤ 0 ∧ − result_11_1 + result_11_1 ≤ 0 ∧ result_11_1 − result_11_1 ≤ 0 ∧ − result_11_0 + result_11_0 ≤ 0 ∧ result_11_0 − result_11_0 ≤ 0 ∧ − rcd_72_post + rcd_72_post ≤ 0 ∧ rcd_72_post − rcd_72_post ≤ 0 ∧ − rcd_72_0 + rcd_72_0 ≤ 0 ∧ rcd_72_0 − rcd_72_0 ≤ 0 ∧ − rcd_102_post + rcd_102_post ≤ 0 ∧ rcd_102_post − rcd_102_post ≤ 0 ∧ − rcd_102_0 + rcd_102_0 ≤ 0 ∧ rcd_102_0 − rcd_102_0 ≤ 0 ∧ − r_53_post + r_53_post ≤ 0 ∧ r_53_post − r_53_post ≤ 0 ∧ − r_53_0 + r_53_0 ≤ 0 ∧ r_53_0 − r_53_0 ≤ 0 ∧ − r_161_post + r_161_post ≤ 0 ∧ r_161_post − r_161_post ≤ 0 ∧ − r_161_0 + r_161_0 ≤ 0 ∧ r_161_0 − r_161_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 ≤ 0 ∧ − nondet_12_post + nondet_12_post ≤ 0 ∧ nondet_12_post − nondet_12_post ≤ 0 ∧ − nondet_12_1 + nondet_12_1 ≤ 0 ∧ nondet_12_1 − nondet_12_1 ≤ 0 ∧ − nondet_12_0 + nondet_12_0 ≤ 0 ∧ nondet_12_0 − nondet_12_0 ≤ 0 ∧ − lt_37_post + lt_37_post ≤ 0 ∧ lt_37_post − lt_37_post ≤ 0 ∧ − lt_37_1 + lt_37_1 ≤ 0 ∧ lt_37_1 − lt_37_1 ≤ 0 ∧ − lt_37_0 + lt_37_0 ≤ 0 ∧ lt_37_0 − lt_37_0 ≤ 0 ∧ − lt_36_post + lt_36_post ≤ 0 ∧ lt_36_post − lt_36_post ≤ 0 ∧ − lt_36_0 + lt_36_0 ≤ 0 ∧ lt_36_0 − lt_36_0 ≤ 0 ∧ − lt_237_post + lt_237_post ≤ 0 ∧ lt_237_post − lt_237_post ≤ 0 ∧ − lt_237_0 + lt_237_0 ≤ 0 ∧ lt_237_0 − lt_237_0 ≤ 0 ∧ − length_43_post + length_43_post ≤ 0 ∧ length_43_post − length_43_post ≤ 0 ∧ − length_43_0 + length_43_0 ≤ 0 ∧ length_43_0 − length_43_0 ≤ 0 ∧ − len_246_post + len_246_post ≤ 0 ∧ len_246_post − len_246_post ≤ 0 ∧ − len_246_0 + len_246_0 ≤ 0 ∧ len_246_0 − len_246_0 ≤ 0 ∧ − len_180_post + len_180_post ≤ 0 ∧ len_180_post − len_180_post ≤ 0 ∧ − len_180_0 + len_180_0 ≤ 0 ∧ len_180_0 − len_180_0 ≤ 0 ∧ − i_44_post + i_44_post ≤ 0 ∧ i_44_post − i_44_post ≤ 0 ∧ − i_44_0 + i_44_0 ≤ 0 ∧ i_44_0 − i_44_0 ≤ 0 ∧ − i_125_post + i_125_post ≤ 0 ∧ i_125_post − i_125_post ≤ 0 ∧ − i_125_0 + i_125_0 ≤ 0 ∧ i_125_0 − i_125_0 ≤ 0 ∧ − i_108_post + i_108_post ≤ 0 ∧ i_108_post − i_108_post ≤ 0 ∧ − i_108_0 + i_108_0 ≤ 0 ∧ i_108_0 − i_108_0 ≤ 0 ∧ − head_46_post + head_46_post ≤ 0 ∧ head_46_post − head_46_post ≤ 0 ∧ − head_46_0 + head_46_0 ≤ 0 ∧ head_46_0 − head_46_0 ≤ 0 ∧ − fmt_31_post + fmt_31_post ≤ 0 ∧ fmt_31_post − fmt_31_post ≤ 0 ∧ − fmt_31_4 + fmt_31_4 ≤ 0 ∧ fmt_31_4 − fmt_31_4 ≤ 0 ∧ − fmt_31_3 + fmt_31_3 ≤ 0 ∧ fmt_31_3 − fmt_31_3 ≤ 0 ∧ − fmt_31_2 + fmt_31_2 ≤ 0 ∧ fmt_31_2 − fmt_31_2 ≤ 0 ∧ − fmt_31_1 + fmt_31_1 ≤ 0 ∧ fmt_31_1 − fmt_31_1 ≤ 0 ∧ − fmt_31_0 + fmt_31_0 ≤ 0 ∧ fmt_31_0 − fmt_31_0 ≤ 0 ∧ − ct_17_post + ct_17_post ≤ 0 ∧ ct_17_post − ct_17_post ≤ 0 ∧ − ct_17_2 + ct_17_2 ≤ 0 ∧ ct_17_2 − ct_17_2 ≤ 0 ∧ − ct_17_1 + ct_17_1 ≤ 0 ∧ ct_17_1 − ct_17_1 ≤ 0 ∧ − ct_17_0 + ct_17_0 ≤ 0 ∧ ct_17_0 − ct_17_0 ≤ 0 ∧ − a_328_post + a_328_post ≤ 0 ∧ a_328_post − a_328_post ≤ 0 ∧ − a_328_0 + a_328_0 ≤ 0 ∧ a_328_0 − a_328_0 ≤ 0 ∧ − a_305_post + a_305_post ≤ 0 ∧ a_305_post − a_305_post ≤ 0 ∧ − a_305_0 + a_305_0 ≤ 0 ∧ a_305_0 − a_305_0 ≤ 0 ∧ − a_283_post + a_283_post ≤ 0 ∧ a_283_post − a_283_post ≤ 0 ∧ − a_283_0 + a_283_0 ≤ 0 ∧ a_283_0 − a_283_0 ≤ 0 ∧ − a_26_post + a_26_post ≤ 0 ∧ a_26_post − a_26_post ≤ 0 ∧ − a_26_1 + a_26_1 ≤ 0 ∧ a_26_1 − a_26_1 ≤ 0 ∧ − a_26_0 + a_26_0 ≤ 0 ∧ a_26_0 − a_26_0 ≤ 0 ∧ − a_247_post + a_247_post ≤ 0 ∧ a_247_post − a_247_post ≤ 0 ∧ − a_247_0 + a_247_0 ≤ 0 ∧ a_247_0 − a_247_0 ≤ 0 ∧ − a_197_post + a_197_post ≤ 0 ∧ a_197_post − a_197_post ≤ 0 ∧ − a_197_0 + a_197_0 ≤ 0 ∧ a_197_0 − a_197_0 ≤ 0 ∧ − a_146_0 + a_146_0 ≤ 0 ∧ a_146_0 − a_146_0 ≤ 0 | |
| 16 | 23 | 17: | 1 − t_23_0 + y_19_0 ≤ 0 ∧ − y_19_post + y_19_post ≤ 0 ∧ y_19_post − y_19_post ≤ 0 ∧ − y_19_2 + y_19_2 ≤ 0 ∧ y_19_2 − y_19_2 ≤ 0 ∧ − y_19_1 + y_19_1 ≤ 0 ∧ y_19_1 − y_19_1 ≤ 0 ∧ − y_19_0 + y_19_0 ≤ 0 ∧ y_19_0 − y_19_0 ≤ 0 ∧ − x_SLAM_f_18_post + x_SLAM_f_18_post ≤ 0 ∧ x_SLAM_f_18_post − x_SLAM_f_18_post ≤ 0 ∧ − x_SLAM_f_18_2 + x_SLAM_f_18_2 ≤ 0 ∧ x_SLAM_f_18_2 − x_SLAM_f_18_2 ≤ 0 ∧ − x_SLAM_f_18_1 + x_SLAM_f_18_1 ≤ 0 ∧ x_SLAM_f_18_1 − x_SLAM_f_18_1 ≤ 0 ∧ − x_SLAM_f_18_0 + x_SLAM_f_18_0 ≤ 0 ∧ x_SLAM_f_18_0 − x_SLAM_f_18_0 ≤ 0 ∧ − x_34_post + x_34_post ≤ 0 ∧ x_34_post − x_34_post ≤ 0 ∧ − x_34_1 + x_34_1 ≤ 0 ∧ x_34_1 − x_34_1 ≤ 0 ∧ − x_34_0 + x_34_0 ≤ 0 ∧ x_34_0 − x_34_0 ≤ 0 ∧ − x_28_post + x_28_post ≤ 0 ∧ x_28_post − x_28_post ≤ 0 ∧ − x_28_1 + x_28_1 ≤ 0 ∧ x_28_1 − x_28_1 ≤ 0 ∧ − x_28_0 + x_28_0 ≤ 0 ∧ x_28_0 − x_28_0 ≤ 0 ∧ − x_238_post + x_238_post ≤ 0 ∧ x_238_post − x_238_post ≤ 0 ∧ − x_238_0 + x_238_0 ≤ 0 ∧ x_238_0 − x_238_0 ≤ 0 ∧ − x_20_post + x_20_post ≤ 0 ∧ x_20_post − x_20_post ≤ 0 ∧ − x_20_2 + x_20_2 ≤ 0 ∧ x_20_2 − x_20_2 ≤ 0 ∧ − x_20_1 + x_20_1 ≤ 0 ∧ x_20_1 − x_20_1 ≤ 0 ∧ − x_20_0 + x_20_0 ≤ 0 ∧ x_20_0 − x_20_0 ≤ 0 ∧ − x_177_post + x_177_post ≤ 0 ∧ x_177_post − x_177_post ≤ 0 ∧ − x_177_0 + x_177_0 ≤ 0 ∧ x_177_0 − x_177_0 ≤ 0 ∧ − x_16_post + x_16_post ≤ 0 ∧ x_16_post − x_16_post ≤ 0 ∧ − x_16_1 + x_16_1 ≤ 0 ∧ x_16_1 − x_16_1 ≤ 0 ∧ − x_16_0 + x_16_0 ≤ 0 ∧ x_16_0 − x_16_0 ≤ 0 ∧ − x_14_post + x_14_post ≤ 0 ∧ x_14_post − x_14_post ≤ 0 ∧ − x_14_0 + x_14_0 ≤ 0 ∧ x_14_0 − x_14_0 ≤ 0 ∧ − tmp_48_post + tmp_48_post ≤ 0 ∧ tmp_48_post − tmp_48_post ≤ 0 ∧ − tmp_48_0 + tmp_48_0 ≤ 0 ∧ tmp_48_0 − tmp_48_0 ≤ 0 ∧ − temp_49_post + temp_49_post ≤ 0 ∧ temp_49_post − temp_49_post ≤ 0 ∧ − temp_49_0 + temp_49_0 ≤ 0 ∧ temp_49_0 − temp_49_0 ≤ 0 ∧ − temp0_45_post + temp0_45_post ≤ 0 ∧ temp0_45_post − temp0_45_post ≤ 0 ∧ − temp0_45_1 + temp0_45_1 ≤ 0 ∧ temp0_45_1 − temp0_45_1 ≤ 0 ∧ − temp0_45_0 + temp0_45_0 ≤ 0 ∧ temp0_45_0 − temp0_45_0 ≤ 0 ∧ − temp0_32_post + temp0_32_post ≤ 0 ∧ temp0_32_post − temp0_32_post ≤ 0 ∧ − temp0_32_4 + temp0_32_4 ≤ 0 ∧ temp0_32_4 − temp0_32_4 ≤ 0 ∧ − temp0_32_3 + temp0_32_3 ≤ 0 ∧ temp0_32_3 − temp0_32_3 ≤ 0 ∧ − temp0_32_2 + temp0_32_2 ≤ 0 ∧ temp0_32_2 − temp0_32_2 ≤ 0 ∧ − temp0_32_1 + temp0_32_1 ≤ 0 ∧ temp0_32_1 − temp0_32_1 ≤ 0 ∧ − temp0_32_0 + temp0_32_0 ≤ 0 ∧ temp0_32_0 − temp0_32_0 ≤ 0 ∧ − temp0_15_0 + temp0_15_0 ≤ 0 ∧ temp0_15_0 − temp0_15_0 ≤ 0 ∧ − t_23_post + t_23_post ≤ 0 ∧ t_23_post − t_23_post ≤ 0 ∧ − t_23_1 + t_23_1 ≤ 0 ∧ t_23_1 − t_23_1 ≤ 0 ∧ − t_23_0 + t_23_0 ≤ 0 ∧ t_23_0 − t_23_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_post + result_dot_printf_sdv_special_RETURN_VALUE_41_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_post − result_dot_printf_sdv_special_RETURN_VALUE_41_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_1 + result_dot_printf_sdv_special_RETURN_VALUE_41_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_1 − result_dot_printf_sdv_special_RETURN_VALUE_41_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_0 + result_dot_printf_sdv_special_RETURN_VALUE_41_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_0 − result_dot_printf_sdv_special_RETURN_VALUE_41_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_post + result_dot_printf_sdv_special_RETURN_VALUE_38_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_post − result_dot_printf_sdv_special_RETURN_VALUE_38_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_1 + result_dot_printf_sdv_special_RETURN_VALUE_38_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_1 − result_dot_printf_sdv_special_RETURN_VALUE_38_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_0 + result_dot_printf_sdv_special_RETURN_VALUE_38_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_0 − result_dot_printf_sdv_special_RETURN_VALUE_38_0 ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_post + result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_post − result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_1 + result_dot_nondet_sdv_special_RETURN_VALUE_13_1 ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_1 − result_dot_nondet_sdv_special_RETURN_VALUE_13_1 ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_0 + result_dot_nondet_sdv_special_RETURN_VALUE_13_0 ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_0 − result_dot_nondet_sdv_special_RETURN_VALUE_13_0 ≤ 0 ∧ − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post + result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post ≤ 0 ∧ result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post ≤ 0 ∧ − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 + result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 ≤ 0 ∧ result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 ≤ 0 ∧ − result_11_post + result_11_post ≤ 0 ∧ result_11_post − result_11_post ≤ 0 ∧ − result_11_6 + result_11_6 ≤ 0 ∧ result_11_6 − result_11_6 ≤ 0 ∧ − result_11_5 + result_11_5 ≤ 0 ∧ result_11_5 − result_11_5 ≤ 0 ∧ − result_11_4 + result_11_4 ≤ 0 ∧ result_11_4 − result_11_4 ≤ 0 ∧ − result_11_3 + result_11_3 ≤ 0 ∧ result_11_3 − result_11_3 ≤ 0 ∧ − result_11_2 + result_11_2 ≤ 0 ∧ result_11_2 − result_11_2 ≤ 0 ∧ − result_11_1 + result_11_1 ≤ 0 ∧ result_11_1 − result_11_1 ≤ 0 ∧ − result_11_0 + result_11_0 ≤ 0 ∧ result_11_0 − result_11_0 ≤ 0 ∧ − rcd_72_post + rcd_72_post ≤ 0 ∧ rcd_72_post − rcd_72_post ≤ 0 ∧ − rcd_72_0 + rcd_72_0 ≤ 0 ∧ rcd_72_0 − rcd_72_0 ≤ 0 ∧ − rcd_102_post + rcd_102_post ≤ 0 ∧ rcd_102_post − rcd_102_post ≤ 0 ∧ − rcd_102_0 + rcd_102_0 ≤ 0 ∧ rcd_102_0 − rcd_102_0 ≤ 0 ∧ − r_53_post + r_53_post ≤ 0 ∧ r_53_post − r_53_post ≤ 0 ∧ − r_53_0 + r_53_0 ≤ 0 ∧ r_53_0 − r_53_0 ≤ 0 ∧ − r_161_post + r_161_post ≤ 0 ∧ r_161_post − r_161_post ≤ 0 ∧ − r_161_0 + r_161_0 ≤ 0 ∧ r_161_0 − r_161_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 ≤ 0 ∧ − nondet_12_post + nondet_12_post ≤ 0 ∧ nondet_12_post − nondet_12_post ≤ 0 ∧ − nondet_12_1 + nondet_12_1 ≤ 0 ∧ nondet_12_1 − nondet_12_1 ≤ 0 ∧ − nondet_12_0 + nondet_12_0 ≤ 0 ∧ nondet_12_0 − nondet_12_0 ≤ 0 ∧ − lt_37_post + lt_37_post ≤ 0 ∧ lt_37_post − lt_37_post ≤ 0 ∧ − lt_37_1 + lt_37_1 ≤ 0 ∧ lt_37_1 − lt_37_1 ≤ 0 ∧ − lt_37_0 + lt_37_0 ≤ 0 ∧ lt_37_0 − lt_37_0 ≤ 0 ∧ − lt_36_post + lt_36_post ≤ 0 ∧ lt_36_post − lt_36_post ≤ 0 ∧ − lt_36_0 + lt_36_0 ≤ 0 ∧ lt_36_0 − lt_36_0 ≤ 0 ∧ − lt_237_post + lt_237_post ≤ 0 ∧ lt_237_post − lt_237_post ≤ 0 ∧ − lt_237_0 + lt_237_0 ≤ 0 ∧ lt_237_0 − lt_237_0 ≤ 0 ∧ − length_43_post + length_43_post ≤ 0 ∧ length_43_post − length_43_post ≤ 0 ∧ − length_43_0 + length_43_0 ≤ 0 ∧ length_43_0 − length_43_0 ≤ 0 ∧ − len_246_post + len_246_post ≤ 0 ∧ len_246_post − len_246_post ≤ 0 ∧ − len_246_0 + len_246_0 ≤ 0 ∧ len_246_0 − len_246_0 ≤ 0 ∧ − len_180_post + len_180_post ≤ 0 ∧ len_180_post − len_180_post ≤ 0 ∧ − len_180_0 + len_180_0 ≤ 0 ∧ len_180_0 − len_180_0 ≤ 0 ∧ − i_44_post + i_44_post ≤ 0 ∧ i_44_post − i_44_post ≤ 0 ∧ − i_44_0 + i_44_0 ≤ 0 ∧ i_44_0 − i_44_0 ≤ 0 ∧ − i_125_post + i_125_post ≤ 0 ∧ i_125_post − i_125_post ≤ 0 ∧ − i_125_0 + i_125_0 ≤ 0 ∧ i_125_0 − i_125_0 ≤ 0 ∧ − i_108_post + i_108_post ≤ 0 ∧ i_108_post − i_108_post ≤ 0 ∧ − i_108_0 + i_108_0 ≤ 0 ∧ i_108_0 − i_108_0 ≤ 0 ∧ − head_46_post + head_46_post ≤ 0 ∧ head_46_post − head_46_post ≤ 0 ∧ − head_46_0 + head_46_0 ≤ 0 ∧ head_46_0 − head_46_0 ≤ 0 ∧ − fmt_31_post + fmt_31_post ≤ 0 ∧ fmt_31_post − fmt_31_post ≤ 0 ∧ − fmt_31_4 + fmt_31_4 ≤ 0 ∧ fmt_31_4 − fmt_31_4 ≤ 0 ∧ − fmt_31_3 + fmt_31_3 ≤ 0 ∧ fmt_31_3 − fmt_31_3 ≤ 0 ∧ − fmt_31_2 + fmt_31_2 ≤ 0 ∧ fmt_31_2 − fmt_31_2 ≤ 0 ∧ − fmt_31_1 + fmt_31_1 ≤ 0 ∧ fmt_31_1 − fmt_31_1 ≤ 0 ∧ − fmt_31_0 + fmt_31_0 ≤ 0 ∧ fmt_31_0 − fmt_31_0 ≤ 0 ∧ − ct_17_post + ct_17_post ≤ 0 ∧ ct_17_post − ct_17_post ≤ 0 ∧ − ct_17_2 + ct_17_2 ≤ 0 ∧ ct_17_2 − ct_17_2 ≤ 0 ∧ − ct_17_1 + ct_17_1 ≤ 0 ∧ ct_17_1 − ct_17_1 ≤ 0 ∧ − ct_17_0 + ct_17_0 ≤ 0 ∧ ct_17_0 − ct_17_0 ≤ 0 ∧ − a_328_post + a_328_post ≤ 0 ∧ a_328_post − a_328_post ≤ 0 ∧ − a_328_0 + a_328_0 ≤ 0 ∧ a_328_0 − a_328_0 ≤ 0 ∧ − a_305_post + a_305_post ≤ 0 ∧ a_305_post − a_305_post ≤ 0 ∧ − a_305_0 + a_305_0 ≤ 0 ∧ a_305_0 − a_305_0 ≤ 0 ∧ − a_283_post + a_283_post ≤ 0 ∧ a_283_post − a_283_post ≤ 0 ∧ − a_283_0 + a_283_0 ≤ 0 ∧ a_283_0 − a_283_0 ≤ 0 ∧ − a_26_post + a_26_post ≤ 0 ∧ a_26_post − a_26_post ≤ 0 ∧ − a_26_1 + a_26_1 ≤ 0 ∧ a_26_1 − a_26_1 ≤ 0 ∧ − a_26_0 + a_26_0 ≤ 0 ∧ a_26_0 − a_26_0 ≤ 0 ∧ − a_247_post + a_247_post ≤ 0 ∧ a_247_post − a_247_post ≤ 0 ∧ − a_247_0 + a_247_0 ≤ 0 ∧ a_247_0 − a_247_0 ≤ 0 ∧ − a_197_post + a_197_post ≤ 0 ∧ a_197_post − a_197_post ≤ 0 ∧ − a_197_0 + a_197_0 ≤ 0 ∧ a_197_0 − a_197_0 ≤ 0 ∧ − a_146_0 + a_146_0 ≤ 0 ∧ a_146_0 − a_146_0 ≤ 0 | |
| 16 | 24 | 17: | 1 + t_23_0 − y_19_0 ≤ 0 ∧ − y_19_post + y_19_post ≤ 0 ∧ y_19_post − y_19_post ≤ 0 ∧ − y_19_2 + y_19_2 ≤ 0 ∧ y_19_2 − y_19_2 ≤ 0 ∧ − y_19_1 + y_19_1 ≤ 0 ∧ y_19_1 − y_19_1 ≤ 0 ∧ − y_19_0 + y_19_0 ≤ 0 ∧ y_19_0 − y_19_0 ≤ 0 ∧ − x_SLAM_f_18_post + x_SLAM_f_18_post ≤ 0 ∧ x_SLAM_f_18_post − x_SLAM_f_18_post ≤ 0 ∧ − x_SLAM_f_18_2 + x_SLAM_f_18_2 ≤ 0 ∧ x_SLAM_f_18_2 − x_SLAM_f_18_2 ≤ 0 ∧ − x_SLAM_f_18_1 + x_SLAM_f_18_1 ≤ 0 ∧ x_SLAM_f_18_1 − x_SLAM_f_18_1 ≤ 0 ∧ − x_SLAM_f_18_0 + x_SLAM_f_18_0 ≤ 0 ∧ x_SLAM_f_18_0 − x_SLAM_f_18_0 ≤ 0 ∧ − x_34_post + x_34_post ≤ 0 ∧ x_34_post − x_34_post ≤ 0 ∧ − x_34_1 + x_34_1 ≤ 0 ∧ x_34_1 − x_34_1 ≤ 0 ∧ − x_34_0 + x_34_0 ≤ 0 ∧ x_34_0 − x_34_0 ≤ 0 ∧ − x_28_post + x_28_post ≤ 0 ∧ x_28_post − x_28_post ≤ 0 ∧ − x_28_1 + x_28_1 ≤ 0 ∧ x_28_1 − x_28_1 ≤ 0 ∧ − x_28_0 + x_28_0 ≤ 0 ∧ x_28_0 − x_28_0 ≤ 0 ∧ − x_238_post + x_238_post ≤ 0 ∧ x_238_post − x_238_post ≤ 0 ∧ − x_238_0 + x_238_0 ≤ 0 ∧ x_238_0 − x_238_0 ≤ 0 ∧ − x_20_post + x_20_post ≤ 0 ∧ x_20_post − x_20_post ≤ 0 ∧ − x_20_2 + x_20_2 ≤ 0 ∧ x_20_2 − x_20_2 ≤ 0 ∧ − x_20_1 + x_20_1 ≤ 0 ∧ x_20_1 − x_20_1 ≤ 0 ∧ − x_20_0 + x_20_0 ≤ 0 ∧ x_20_0 − x_20_0 ≤ 0 ∧ − x_177_post + x_177_post ≤ 0 ∧ x_177_post − x_177_post ≤ 0 ∧ − x_177_0 + x_177_0 ≤ 0 ∧ x_177_0 − x_177_0 ≤ 0 ∧ − x_16_post + x_16_post ≤ 0 ∧ x_16_post − x_16_post ≤ 0 ∧ − x_16_1 + x_16_1 ≤ 0 ∧ x_16_1 − x_16_1 ≤ 0 ∧ − x_16_0 + x_16_0 ≤ 0 ∧ x_16_0 − x_16_0 ≤ 0 ∧ − x_14_post + x_14_post ≤ 0 ∧ x_14_post − x_14_post ≤ 0 ∧ − x_14_0 + x_14_0 ≤ 0 ∧ x_14_0 − x_14_0 ≤ 0 ∧ − tmp_48_post + tmp_48_post ≤ 0 ∧ tmp_48_post − tmp_48_post ≤ 0 ∧ − tmp_48_0 + tmp_48_0 ≤ 0 ∧ tmp_48_0 − tmp_48_0 ≤ 0 ∧ − temp_49_post + temp_49_post ≤ 0 ∧ temp_49_post − temp_49_post ≤ 0 ∧ − temp_49_0 + temp_49_0 ≤ 0 ∧ temp_49_0 − temp_49_0 ≤ 0 ∧ − temp0_45_post + temp0_45_post ≤ 0 ∧ temp0_45_post − temp0_45_post ≤ 0 ∧ − temp0_45_1 + temp0_45_1 ≤ 0 ∧ temp0_45_1 − temp0_45_1 ≤ 0 ∧ − temp0_45_0 + temp0_45_0 ≤ 0 ∧ temp0_45_0 − temp0_45_0 ≤ 0 ∧ − temp0_32_post + temp0_32_post ≤ 0 ∧ temp0_32_post − temp0_32_post ≤ 0 ∧ − temp0_32_4 + temp0_32_4 ≤ 0 ∧ temp0_32_4 − temp0_32_4 ≤ 0 ∧ − temp0_32_3 + temp0_32_3 ≤ 0 ∧ temp0_32_3 − temp0_32_3 ≤ 0 ∧ − temp0_32_2 + temp0_32_2 ≤ 0 ∧ temp0_32_2 − temp0_32_2 ≤ 0 ∧ − temp0_32_1 + temp0_32_1 ≤ 0 ∧ temp0_32_1 − temp0_32_1 ≤ 0 ∧ − temp0_32_0 + temp0_32_0 ≤ 0 ∧ temp0_32_0 − temp0_32_0 ≤ 0 ∧ − temp0_15_0 + temp0_15_0 ≤ 0 ∧ temp0_15_0 − temp0_15_0 ≤ 0 ∧ − t_23_post + t_23_post ≤ 0 ∧ t_23_post − t_23_post ≤ 0 ∧ − t_23_1 + t_23_1 ≤ 0 ∧ t_23_1 − t_23_1 ≤ 0 ∧ − t_23_0 + t_23_0 ≤ 0 ∧ t_23_0 − t_23_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_post + result_dot_printf_sdv_special_RETURN_VALUE_41_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_post − result_dot_printf_sdv_special_RETURN_VALUE_41_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_1 + result_dot_printf_sdv_special_RETURN_VALUE_41_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_1 − result_dot_printf_sdv_special_RETURN_VALUE_41_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_0 + result_dot_printf_sdv_special_RETURN_VALUE_41_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_0 − result_dot_printf_sdv_special_RETURN_VALUE_41_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_post + result_dot_printf_sdv_special_RETURN_VALUE_38_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_post − result_dot_printf_sdv_special_RETURN_VALUE_38_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_1 + result_dot_printf_sdv_special_RETURN_VALUE_38_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_1 − result_dot_printf_sdv_special_RETURN_VALUE_38_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_0 + result_dot_printf_sdv_special_RETURN_VALUE_38_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_0 − result_dot_printf_sdv_special_RETURN_VALUE_38_0 ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_post + result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_post − result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_1 + result_dot_nondet_sdv_special_RETURN_VALUE_13_1 ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_1 − result_dot_nondet_sdv_special_RETURN_VALUE_13_1 ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_0 + result_dot_nondet_sdv_special_RETURN_VALUE_13_0 ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_0 − result_dot_nondet_sdv_special_RETURN_VALUE_13_0 ≤ 0 ∧ − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post + result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post ≤ 0 ∧ result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post ≤ 0 ∧ − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 + result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 ≤ 0 ∧ result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 ≤ 0 ∧ − result_11_post + result_11_post ≤ 0 ∧ result_11_post − result_11_post ≤ 0 ∧ − result_11_6 + result_11_6 ≤ 0 ∧ result_11_6 − result_11_6 ≤ 0 ∧ − result_11_5 + result_11_5 ≤ 0 ∧ result_11_5 − result_11_5 ≤ 0 ∧ − result_11_4 + result_11_4 ≤ 0 ∧ result_11_4 − result_11_4 ≤ 0 ∧ − result_11_3 + result_11_3 ≤ 0 ∧ result_11_3 − result_11_3 ≤ 0 ∧ − result_11_2 + result_11_2 ≤ 0 ∧ result_11_2 − result_11_2 ≤ 0 ∧ − result_11_1 + result_11_1 ≤ 0 ∧ result_11_1 − result_11_1 ≤ 0 ∧ − result_11_0 + result_11_0 ≤ 0 ∧ result_11_0 − result_11_0 ≤ 0 ∧ − rcd_72_post + rcd_72_post ≤ 0 ∧ rcd_72_post − rcd_72_post ≤ 0 ∧ − rcd_72_0 + rcd_72_0 ≤ 0 ∧ rcd_72_0 − rcd_72_0 ≤ 0 ∧ − rcd_102_post + rcd_102_post ≤ 0 ∧ rcd_102_post − rcd_102_post ≤ 0 ∧ − rcd_102_0 + rcd_102_0 ≤ 0 ∧ rcd_102_0 − rcd_102_0 ≤ 0 ∧ − r_53_post + r_53_post ≤ 0 ∧ r_53_post − r_53_post ≤ 0 ∧ − r_53_0 + r_53_0 ≤ 0 ∧ r_53_0 − r_53_0 ≤ 0 ∧ − r_161_post + r_161_post ≤ 0 ∧ r_161_post − r_161_post ≤ 0 ∧ − r_161_0 + r_161_0 ≤ 0 ∧ r_161_0 − r_161_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 ≤ 0 ∧ − nondet_12_post + nondet_12_post ≤ 0 ∧ nondet_12_post − nondet_12_post ≤ 0 ∧ − nondet_12_1 + nondet_12_1 ≤ 0 ∧ nondet_12_1 − nondet_12_1 ≤ 0 ∧ − nondet_12_0 + nondet_12_0 ≤ 0 ∧ nondet_12_0 − nondet_12_0 ≤ 0 ∧ − lt_37_post + lt_37_post ≤ 0 ∧ lt_37_post − lt_37_post ≤ 0 ∧ − lt_37_1 + lt_37_1 ≤ 0 ∧ lt_37_1 − lt_37_1 ≤ 0 ∧ − lt_37_0 + lt_37_0 ≤ 0 ∧ lt_37_0 − lt_37_0 ≤ 0 ∧ − lt_36_post + lt_36_post ≤ 0 ∧ lt_36_post − lt_36_post ≤ 0 ∧ − lt_36_0 + lt_36_0 ≤ 0 ∧ lt_36_0 − lt_36_0 ≤ 0 ∧ − lt_237_post + lt_237_post ≤ 0 ∧ lt_237_post − lt_237_post ≤ 0 ∧ − lt_237_0 + lt_237_0 ≤ 0 ∧ lt_237_0 − lt_237_0 ≤ 0 ∧ − length_43_post + length_43_post ≤ 0 ∧ length_43_post − length_43_post ≤ 0 ∧ − length_43_0 + length_43_0 ≤ 0 ∧ length_43_0 − length_43_0 ≤ 0 ∧ − len_246_post + len_246_post ≤ 0 ∧ len_246_post − len_246_post ≤ 0 ∧ − len_246_0 + len_246_0 ≤ 0 ∧ len_246_0 − len_246_0 ≤ 0 ∧ − len_180_post + len_180_post ≤ 0 ∧ len_180_post − len_180_post ≤ 0 ∧ − len_180_0 + len_180_0 ≤ 0 ∧ len_180_0 − len_180_0 ≤ 0 ∧ − i_44_post + i_44_post ≤ 0 ∧ i_44_post − i_44_post ≤ 0 ∧ − i_44_0 + i_44_0 ≤ 0 ∧ i_44_0 − i_44_0 ≤ 0 ∧ − i_125_post + i_125_post ≤ 0 ∧ i_125_post − i_125_post ≤ 0 ∧ − i_125_0 + i_125_0 ≤ 0 ∧ i_125_0 − i_125_0 ≤ 0 ∧ − i_108_post + i_108_post ≤ 0 ∧ i_108_post − i_108_post ≤ 0 ∧ − i_108_0 + i_108_0 ≤ 0 ∧ i_108_0 − i_108_0 ≤ 0 ∧ − head_46_post + head_46_post ≤ 0 ∧ head_46_post − head_46_post ≤ 0 ∧ − head_46_0 + head_46_0 ≤ 0 ∧ head_46_0 − head_46_0 ≤ 0 ∧ − fmt_31_post + fmt_31_post ≤ 0 ∧ fmt_31_post − fmt_31_post ≤ 0 ∧ − fmt_31_4 + fmt_31_4 ≤ 0 ∧ fmt_31_4 − fmt_31_4 ≤ 0 ∧ − fmt_31_3 + fmt_31_3 ≤ 0 ∧ fmt_31_3 − fmt_31_3 ≤ 0 ∧ − fmt_31_2 + fmt_31_2 ≤ 0 ∧ fmt_31_2 − fmt_31_2 ≤ 0 ∧ − fmt_31_1 + fmt_31_1 ≤ 0 ∧ fmt_31_1 − fmt_31_1 ≤ 0 ∧ − fmt_31_0 + fmt_31_0 ≤ 0 ∧ fmt_31_0 − fmt_31_0 ≤ 0 ∧ − ct_17_post + ct_17_post ≤ 0 ∧ ct_17_post − ct_17_post ≤ 0 ∧ − ct_17_2 + ct_17_2 ≤ 0 ∧ ct_17_2 − ct_17_2 ≤ 0 ∧ − ct_17_1 + ct_17_1 ≤ 0 ∧ ct_17_1 − ct_17_1 ≤ 0 ∧ − ct_17_0 + ct_17_0 ≤ 0 ∧ ct_17_0 − ct_17_0 ≤ 0 ∧ − a_328_post + a_328_post ≤ 0 ∧ a_328_post − a_328_post ≤ 0 ∧ − a_328_0 + a_328_0 ≤ 0 ∧ a_328_0 − a_328_0 ≤ 0 ∧ − a_305_post + a_305_post ≤ 0 ∧ a_305_post − a_305_post ≤ 0 ∧ − a_305_0 + a_305_0 ≤ 0 ∧ a_305_0 − a_305_0 ≤ 0 ∧ − a_283_post + a_283_post ≤ 0 ∧ a_283_post − a_283_post ≤ 0 ∧ − a_283_0 + a_283_0 ≤ 0 ∧ a_283_0 − a_283_0 ≤ 0 ∧ − a_26_post + a_26_post ≤ 0 ∧ a_26_post − a_26_post ≤ 0 ∧ − a_26_1 + a_26_1 ≤ 0 ∧ a_26_1 − a_26_1 ≤ 0 ∧ − a_26_0 + a_26_0 ≤ 0 ∧ a_26_0 − a_26_0 ≤ 0 ∧ − a_247_post + a_247_post ≤ 0 ∧ a_247_post − a_247_post ≤ 0 ∧ − a_247_0 + a_247_0 ≤ 0 ∧ a_247_0 − a_247_0 ≤ 0 ∧ − a_197_post + a_197_post ≤ 0 ∧ a_197_post − a_197_post ≤ 0 ∧ − a_197_0 + a_197_0 ≤ 0 ∧ a_197_0 − a_197_0 ≤ 0 ∧ − a_146_0 + a_146_0 ≤ 0 ∧ a_146_0 − a_146_0 ≤ 0 | |
| 17 | 25 | 10: | 0 ≤ 0 ∧ 0 ≤ 0 ∧ 1 − result_dot_nondet_sdv_special_RETURN_VALUE_13_0 ≤ 0 ∧ 2 − result_dot_nondet_sdv_special_RETURN_VALUE_13_0 ≤ 0 ∧ −1 − a_283_0 + len_180_post ≤ 0 ∧ 1 + a_283_0 − len_180_post ≤ 0 ∧ len_180_0 − len_180_post ≤ 0 ∧ − len_180_0 + len_180_post ≤ 0 ∧ − y_19_post + y_19_post ≤ 0 ∧ y_19_post − y_19_post ≤ 0 ∧ − y_19_2 + y_19_2 ≤ 0 ∧ y_19_2 − y_19_2 ≤ 0 ∧ − y_19_1 + y_19_1 ≤ 0 ∧ y_19_1 − y_19_1 ≤ 0 ∧ − y_19_0 + y_19_0 ≤ 0 ∧ y_19_0 − y_19_0 ≤ 0 ∧ − x_SLAM_f_18_post + x_SLAM_f_18_post ≤ 0 ∧ x_SLAM_f_18_post − x_SLAM_f_18_post ≤ 0 ∧ − x_SLAM_f_18_2 + x_SLAM_f_18_2 ≤ 0 ∧ x_SLAM_f_18_2 − x_SLAM_f_18_2 ≤ 0 ∧ − x_SLAM_f_18_1 + x_SLAM_f_18_1 ≤ 0 ∧ x_SLAM_f_18_1 − x_SLAM_f_18_1 ≤ 0 ∧ − x_SLAM_f_18_0 + x_SLAM_f_18_0 ≤ 0 ∧ x_SLAM_f_18_0 − x_SLAM_f_18_0 ≤ 0 ∧ − x_34_post + x_34_post ≤ 0 ∧ x_34_post − x_34_post ≤ 0 ∧ − x_34_1 + x_34_1 ≤ 0 ∧ x_34_1 − x_34_1 ≤ 0 ∧ − x_34_0 + x_34_0 ≤ 0 ∧ x_34_0 − x_34_0 ≤ 0 ∧ − x_28_post + x_28_post ≤ 0 ∧ x_28_post − x_28_post ≤ 0 ∧ − x_28_1 + x_28_1 ≤ 0 ∧ x_28_1 − x_28_1 ≤ 0 ∧ − x_28_0 + x_28_0 ≤ 0 ∧ x_28_0 − x_28_0 ≤ 0 ∧ − x_238_post + x_238_post ≤ 0 ∧ x_238_post − x_238_post ≤ 0 ∧ − x_238_0 + x_238_0 ≤ 0 ∧ x_238_0 − x_238_0 ≤ 0 ∧ − x_20_post + x_20_post ≤ 0 ∧ x_20_post − x_20_post ≤ 0 ∧ − x_20_2 + x_20_2 ≤ 0 ∧ x_20_2 − x_20_2 ≤ 0 ∧ − x_20_1 + x_20_1 ≤ 0 ∧ x_20_1 − x_20_1 ≤ 0 ∧ − x_20_0 + x_20_0 ≤ 0 ∧ x_20_0 − x_20_0 ≤ 0 ∧ − x_177_post + x_177_post ≤ 0 ∧ x_177_post − x_177_post ≤ 0 ∧ − x_177_0 + x_177_0 ≤ 0 ∧ x_177_0 − x_177_0 ≤ 0 ∧ − x_16_post + x_16_post ≤ 0 ∧ x_16_post − x_16_post ≤ 0 ∧ − x_16_1 + x_16_1 ≤ 0 ∧ x_16_1 − x_16_1 ≤ 0 ∧ − x_16_0 + x_16_0 ≤ 0 ∧ x_16_0 − x_16_0 ≤ 0 ∧ − x_14_post + x_14_post ≤ 0 ∧ x_14_post − x_14_post ≤ 0 ∧ − x_14_0 + x_14_0 ≤ 0 ∧ x_14_0 − x_14_0 ≤ 0 ∧ − tmp_48_post + tmp_48_post ≤ 0 ∧ tmp_48_post − tmp_48_post ≤ 0 ∧ − tmp_48_0 + tmp_48_0 ≤ 0 ∧ tmp_48_0 − tmp_48_0 ≤ 0 ∧ − temp_49_post + temp_49_post ≤ 0 ∧ temp_49_post − temp_49_post ≤ 0 ∧ − temp_49_0 + temp_49_0 ≤ 0 ∧ temp_49_0 − temp_49_0 ≤ 0 ∧ − temp0_45_post + temp0_45_post ≤ 0 ∧ temp0_45_post − temp0_45_post ≤ 0 ∧ − temp0_45_1 + temp0_45_1 ≤ 0 ∧ temp0_45_1 − temp0_45_1 ≤ 0 ∧ − temp0_45_0 + temp0_45_0 ≤ 0 ∧ temp0_45_0 − temp0_45_0 ≤ 0 ∧ − temp0_32_post + temp0_32_post ≤ 0 ∧ temp0_32_post − temp0_32_post ≤ 0 ∧ − temp0_32_4 + temp0_32_4 ≤ 0 ∧ temp0_32_4 − temp0_32_4 ≤ 0 ∧ − temp0_32_3 + temp0_32_3 ≤ 0 ∧ temp0_32_3 − temp0_32_3 ≤ 0 ∧ − temp0_32_2 + temp0_32_2 ≤ 0 ∧ temp0_32_2 − temp0_32_2 ≤ 0 ∧ − temp0_32_1 + temp0_32_1 ≤ 0 ∧ temp0_32_1 − temp0_32_1 ≤ 0 ∧ − temp0_32_0 + temp0_32_0 ≤ 0 ∧ temp0_32_0 − temp0_32_0 ≤ 0 ∧ − temp0_15_0 + temp0_15_0 ≤ 0 ∧ temp0_15_0 − temp0_15_0 ≤ 0 ∧ − t_23_post + t_23_post ≤ 0 ∧ t_23_post − t_23_post ≤ 0 ∧ − t_23_1 + t_23_1 ≤ 0 ∧ t_23_1 − t_23_1 ≤ 0 ∧ − t_23_0 + t_23_0 ≤ 0 ∧ t_23_0 − t_23_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_post + result_dot_printf_sdv_special_RETURN_VALUE_41_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_post − result_dot_printf_sdv_special_RETURN_VALUE_41_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_1 + result_dot_printf_sdv_special_RETURN_VALUE_41_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_1 − result_dot_printf_sdv_special_RETURN_VALUE_41_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_0 + result_dot_printf_sdv_special_RETURN_VALUE_41_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_0 − result_dot_printf_sdv_special_RETURN_VALUE_41_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_post + result_dot_printf_sdv_special_RETURN_VALUE_38_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_post − result_dot_printf_sdv_special_RETURN_VALUE_38_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_1 + result_dot_printf_sdv_special_RETURN_VALUE_38_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_1 − result_dot_printf_sdv_special_RETURN_VALUE_38_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_0 + result_dot_printf_sdv_special_RETURN_VALUE_38_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_0 − result_dot_printf_sdv_special_RETURN_VALUE_38_0 ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_post + result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_post − result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_1 + result_dot_nondet_sdv_special_RETURN_VALUE_13_1 ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_1 − result_dot_nondet_sdv_special_RETURN_VALUE_13_1 ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_0 + result_dot_nondet_sdv_special_RETURN_VALUE_13_0 ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_0 − result_dot_nondet_sdv_special_RETURN_VALUE_13_0 ≤ 0 ∧ − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post + result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post ≤ 0 ∧ result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post ≤ 0 ∧ − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 + result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 ≤ 0 ∧ result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 ≤ 0 ∧ − result_11_post + result_11_post ≤ 0 ∧ result_11_post − result_11_post ≤ 0 ∧ − result_11_6 + result_11_6 ≤ 0 ∧ result_11_6 − result_11_6 ≤ 0 ∧ − result_11_5 + result_11_5 ≤ 0 ∧ result_11_5 − result_11_5 ≤ 0 ∧ − result_11_4 + result_11_4 ≤ 0 ∧ result_11_4 − result_11_4 ≤ 0 ∧ − result_11_3 + result_11_3 ≤ 0 ∧ result_11_3 − result_11_3 ≤ 0 ∧ − result_11_2 + result_11_2 ≤ 0 ∧ result_11_2 − result_11_2 ≤ 0 ∧ − result_11_1 + result_11_1 ≤ 0 ∧ result_11_1 − result_11_1 ≤ 0 ∧ − result_11_0 + result_11_0 ≤ 0 ∧ result_11_0 − result_11_0 ≤ 0 ∧ − rcd_72_post + rcd_72_post ≤ 0 ∧ rcd_72_post − rcd_72_post ≤ 0 ∧ − rcd_72_0 + rcd_72_0 ≤ 0 ∧ rcd_72_0 − rcd_72_0 ≤ 0 ∧ − rcd_102_post + rcd_102_post ≤ 0 ∧ rcd_102_post − rcd_102_post ≤ 0 ∧ − rcd_102_0 + rcd_102_0 ≤ 0 ∧ rcd_102_0 − rcd_102_0 ≤ 0 ∧ − r_53_post + r_53_post ≤ 0 ∧ r_53_post − r_53_post ≤ 0 ∧ − r_53_0 + r_53_0 ≤ 0 ∧ r_53_0 − r_53_0 ≤ 0 ∧ − r_161_post + r_161_post ≤ 0 ∧ r_161_post − r_161_post ≤ 0 ∧ − r_161_0 + r_161_0 ≤ 0 ∧ r_161_0 − r_161_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 ≤ 0 ∧ − nondet_12_post + nondet_12_post ≤ 0 ∧ nondet_12_post − nondet_12_post ≤ 0 ∧ − nondet_12_1 + nondet_12_1 ≤ 0 ∧ nondet_12_1 − nondet_12_1 ≤ 0 ∧ − nondet_12_0 + nondet_12_0 ≤ 0 ∧ nondet_12_0 − nondet_12_0 ≤ 0 ∧ − lt_37_post + lt_37_post ≤ 0 ∧ lt_37_post − lt_37_post ≤ 0 ∧ − lt_37_1 + lt_37_1 ≤ 0 ∧ lt_37_1 − lt_37_1 ≤ 0 ∧ − lt_37_0 + lt_37_0 ≤ 0 ∧ lt_37_0 − lt_37_0 ≤ 0 ∧ − lt_36_post + lt_36_post ≤ 0 ∧ lt_36_post − lt_36_post ≤ 0 ∧ − lt_36_0 + lt_36_0 ≤ 0 ∧ lt_36_0 − lt_36_0 ≤ 0 ∧ − lt_237_post + lt_237_post ≤ 0 ∧ lt_237_post − lt_237_post ≤ 0 ∧ − lt_237_0 + lt_237_0 ≤ 0 ∧ lt_237_0 − lt_237_0 ≤ 0 ∧ − length_43_post + length_43_post ≤ 0 ∧ length_43_post − length_43_post ≤ 0 ∧ − length_43_0 + length_43_0 ≤ 0 ∧ length_43_0 − length_43_0 ≤ 0 ∧ − len_246_post + len_246_post ≤ 0 ∧ len_246_post − len_246_post ≤ 0 ∧ − len_246_0 + len_246_0 ≤ 0 ∧ len_246_0 − len_246_0 ≤ 0 ∧ − i_44_post + i_44_post ≤ 0 ∧ i_44_post − i_44_post ≤ 0 ∧ − i_44_0 + i_44_0 ≤ 0 ∧ i_44_0 − i_44_0 ≤ 0 ∧ − i_125_post + i_125_post ≤ 0 ∧ i_125_post − i_125_post ≤ 0 ∧ − i_125_0 + i_125_0 ≤ 0 ∧ i_125_0 − i_125_0 ≤ 0 ∧ − i_108_post + i_108_post ≤ 0 ∧ i_108_post − i_108_post ≤ 0 ∧ − i_108_0 + i_108_0 ≤ 0 ∧ i_108_0 − i_108_0 ≤ 0 ∧ − head_46_post + head_46_post ≤ 0 ∧ head_46_post − head_46_post ≤ 0 ∧ − head_46_0 + head_46_0 ≤ 0 ∧ head_46_0 − head_46_0 ≤ 0 ∧ − fmt_31_post + fmt_31_post ≤ 0 ∧ fmt_31_post − fmt_31_post ≤ 0 ∧ − fmt_31_4 + fmt_31_4 ≤ 0 ∧ fmt_31_4 − fmt_31_4 ≤ 0 ∧ − fmt_31_3 + fmt_31_3 ≤ 0 ∧ fmt_31_3 − fmt_31_3 ≤ 0 ∧ − fmt_31_2 + fmt_31_2 ≤ 0 ∧ fmt_31_2 − fmt_31_2 ≤ 0 ∧ − fmt_31_1 + fmt_31_1 ≤ 0 ∧ fmt_31_1 − fmt_31_1 ≤ 0 ∧ − fmt_31_0 + fmt_31_0 ≤ 0 ∧ fmt_31_0 − fmt_31_0 ≤ 0 ∧ − ct_17_post + ct_17_post ≤ 0 ∧ ct_17_post − ct_17_post ≤ 0 ∧ − ct_17_2 + ct_17_2 ≤ 0 ∧ ct_17_2 − ct_17_2 ≤ 0 ∧ − ct_17_1 + ct_17_1 ≤ 0 ∧ ct_17_1 − ct_17_1 ≤ 0 ∧ − ct_17_0 + ct_17_0 ≤ 0 ∧ ct_17_0 − ct_17_0 ≤ 0 ∧ − a_328_post + a_328_post ≤ 0 ∧ a_328_post − a_328_post ≤ 0 ∧ − a_328_0 + a_328_0 ≤ 0 ∧ a_328_0 − a_328_0 ≤ 0 ∧ − a_305_post + a_305_post ≤ 0 ∧ a_305_post − a_305_post ≤ 0 ∧ − a_305_0 + a_305_0 ≤ 0 ∧ a_305_0 − a_305_0 ≤ 0 ∧ − a_283_post + a_283_post ≤ 0 ∧ a_283_post − a_283_post ≤ 0 ∧ − a_283_0 + a_283_0 ≤ 0 ∧ a_283_0 − a_283_0 ≤ 0 ∧ − a_26_post + a_26_post ≤ 0 ∧ a_26_post − a_26_post ≤ 0 ∧ − a_26_1 + a_26_1 ≤ 0 ∧ a_26_1 − a_26_1 ≤ 0 ∧ − a_26_0 + a_26_0 ≤ 0 ∧ a_26_0 − a_26_0 ≤ 0 ∧ − a_247_post + a_247_post ≤ 0 ∧ a_247_post − a_247_post ≤ 0 ∧ − a_247_0 + a_247_0 ≤ 0 ∧ a_247_0 − a_247_0 ≤ 0 ∧ − a_197_post + a_197_post ≤ 0 ∧ a_197_post − a_197_post ≤ 0 ∧ − a_197_0 + a_197_0 ≤ 0 ∧ a_197_0 − a_197_0 ≤ 0 ∧ − a_146_0 + a_146_0 ≤ 0 ∧ a_146_0 − a_146_0 ≤ 0 | |
| 18 | 26 | 19: | 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ − nondet_12_1 + result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ nondet_12_1 − result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ length_43_post − result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ − length_43_post + result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ head_46_post ≤ 0 ∧ − head_46_post ≤ 0 ∧ i_44_post ≤ 0 ∧ − i_44_post ≤ 0 ∧ − i_44_post ≤ 0 ∧ i_44_post ≤ 0 ∧ − head_46_post ≤ 0 ∧ head_46_post ≤ 0 ∧ − length_43_post + result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ length_43_post − result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ head_46_0 − head_46_post ≤ 0 ∧ − head_46_0 + head_46_post ≤ 0 ∧ i_44_0 − i_44_post ≤ 0 ∧ − i_44_0 + i_44_post ≤ 0 ∧ length_43_0 − length_43_post ≤ 0 ∧ − length_43_0 + length_43_post ≤ 0 ∧ nondet_12_0 − nondet_12_post ≤ 0 ∧ − nondet_12_0 + nondet_12_post ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_0 − result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_0 + result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ − y_19_post + y_19_post ≤ 0 ∧ y_19_post − y_19_post ≤ 0 ∧ − y_19_2 + y_19_2 ≤ 0 ∧ y_19_2 − y_19_2 ≤ 0 ∧ − y_19_1 + y_19_1 ≤ 0 ∧ y_19_1 − y_19_1 ≤ 0 ∧ − y_19_0 + y_19_0 ≤ 0 ∧ y_19_0 − y_19_0 ≤ 0 ∧ − x_SLAM_f_18_post + x_SLAM_f_18_post ≤ 0 ∧ x_SLAM_f_18_post − x_SLAM_f_18_post ≤ 0 ∧ − x_SLAM_f_18_2 + x_SLAM_f_18_2 ≤ 0 ∧ x_SLAM_f_18_2 − x_SLAM_f_18_2 ≤ 0 ∧ − x_SLAM_f_18_1 + x_SLAM_f_18_1 ≤ 0 ∧ x_SLAM_f_18_1 − x_SLAM_f_18_1 ≤ 0 ∧ − x_SLAM_f_18_0 + x_SLAM_f_18_0 ≤ 0 ∧ x_SLAM_f_18_0 − x_SLAM_f_18_0 ≤ 0 ∧ − x_34_post + x_34_post ≤ 0 ∧ x_34_post − x_34_post ≤ 0 ∧ − x_34_1 + x_34_1 ≤ 0 ∧ x_34_1 − x_34_1 ≤ 0 ∧ − x_34_0 + x_34_0 ≤ 0 ∧ x_34_0 − x_34_0 ≤ 0 ∧ − x_28_post + x_28_post ≤ 0 ∧ x_28_post − x_28_post ≤ 0 ∧ − x_28_1 + x_28_1 ≤ 0 ∧ x_28_1 − x_28_1 ≤ 0 ∧ − x_28_0 + x_28_0 ≤ 0 ∧ x_28_0 − x_28_0 ≤ 0 ∧ − x_238_post + x_238_post ≤ 0 ∧ x_238_post − x_238_post ≤ 0 ∧ − x_238_0 + x_238_0 ≤ 0 ∧ x_238_0 − x_238_0 ≤ 0 ∧ − x_20_post + x_20_post ≤ 0 ∧ x_20_post − x_20_post ≤ 0 ∧ − x_20_2 + x_20_2 ≤ 0 ∧ x_20_2 − x_20_2 ≤ 0 ∧ − x_20_1 + x_20_1 ≤ 0 ∧ x_20_1 − x_20_1 ≤ 0 ∧ − x_20_0 + x_20_0 ≤ 0 ∧ x_20_0 − x_20_0 ≤ 0 ∧ − x_177_post + x_177_post ≤ 0 ∧ x_177_post − x_177_post ≤ 0 ∧ − x_177_0 + x_177_0 ≤ 0 ∧ x_177_0 − x_177_0 ≤ 0 ∧ − x_16_post + x_16_post ≤ 0 ∧ x_16_post − x_16_post ≤ 0 ∧ − x_16_1 + x_16_1 ≤ 0 ∧ x_16_1 − x_16_1 ≤ 0 ∧ − x_16_0 + x_16_0 ≤ 0 ∧ x_16_0 − x_16_0 ≤ 0 ∧ − x_14_post + x_14_post ≤ 0 ∧ x_14_post − x_14_post ≤ 0 ∧ − x_14_0 + x_14_0 ≤ 0 ∧ x_14_0 − x_14_0 ≤ 0 ∧ − tmp_48_post + tmp_48_post ≤ 0 ∧ tmp_48_post − tmp_48_post ≤ 0 ∧ − tmp_48_0 + tmp_48_0 ≤ 0 ∧ tmp_48_0 − tmp_48_0 ≤ 0 ∧ − temp_49_post + temp_49_post ≤ 0 ∧ temp_49_post − temp_49_post ≤ 0 ∧ − temp_49_0 + temp_49_0 ≤ 0 ∧ temp_49_0 − temp_49_0 ≤ 0 ∧ − temp0_45_post + temp0_45_post ≤ 0 ∧ temp0_45_post − temp0_45_post ≤ 0 ∧ − temp0_45_1 + temp0_45_1 ≤ 0 ∧ temp0_45_1 − temp0_45_1 ≤ 0 ∧ − temp0_45_0 + temp0_45_0 ≤ 0 ∧ temp0_45_0 − temp0_45_0 ≤ 0 ∧ − temp0_32_post + temp0_32_post ≤ 0 ∧ temp0_32_post − temp0_32_post ≤ 0 ∧ − temp0_32_4 + temp0_32_4 ≤ 0 ∧ temp0_32_4 − temp0_32_4 ≤ 0 ∧ − temp0_32_3 + temp0_32_3 ≤ 0 ∧ temp0_32_3 − temp0_32_3 ≤ 0 ∧ − temp0_32_2 + temp0_32_2 ≤ 0 ∧ temp0_32_2 − temp0_32_2 ≤ 0 ∧ − temp0_32_1 + temp0_32_1 ≤ 0 ∧ temp0_32_1 − temp0_32_1 ≤ 0 ∧ − temp0_32_0 + temp0_32_0 ≤ 0 ∧ temp0_32_0 − temp0_32_0 ≤ 0 ∧ − temp0_15_0 + temp0_15_0 ≤ 0 ∧ temp0_15_0 − temp0_15_0 ≤ 0 ∧ − t_23_post + t_23_post ≤ 0 ∧ t_23_post − t_23_post ≤ 0 ∧ − t_23_1 + t_23_1 ≤ 0 ∧ t_23_1 − t_23_1 ≤ 0 ∧ − t_23_0 + t_23_0 ≤ 0 ∧ t_23_0 − t_23_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_post + result_dot_printf_sdv_special_RETURN_VALUE_41_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_post − result_dot_printf_sdv_special_RETURN_VALUE_41_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_1 + result_dot_printf_sdv_special_RETURN_VALUE_41_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_1 − result_dot_printf_sdv_special_RETURN_VALUE_41_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_0 + result_dot_printf_sdv_special_RETURN_VALUE_41_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_0 − result_dot_printf_sdv_special_RETURN_VALUE_41_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_post + result_dot_printf_sdv_special_RETURN_VALUE_38_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_post − result_dot_printf_sdv_special_RETURN_VALUE_38_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_1 + result_dot_printf_sdv_special_RETURN_VALUE_38_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_1 − result_dot_printf_sdv_special_RETURN_VALUE_38_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_0 + result_dot_printf_sdv_special_RETURN_VALUE_38_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_0 − result_dot_printf_sdv_special_RETURN_VALUE_38_0 ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_1 + result_dot_nondet_sdv_special_RETURN_VALUE_13_1 ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_1 − result_dot_nondet_sdv_special_RETURN_VALUE_13_1 ≤ 0 ∧ − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post + result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post ≤ 0 ∧ result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post ≤ 0 ∧ − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 + result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 ≤ 0 ∧ result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 ≤ 0 ∧ − result_11_post + result_11_post ≤ 0 ∧ result_11_post − result_11_post ≤ 0 ∧ − result_11_6 + result_11_6 ≤ 0 ∧ result_11_6 − result_11_6 ≤ 0 ∧ − result_11_5 + result_11_5 ≤ 0 ∧ result_11_5 − result_11_5 ≤ 0 ∧ − result_11_4 + result_11_4 ≤ 0 ∧ result_11_4 − result_11_4 ≤ 0 ∧ − result_11_3 + result_11_3 ≤ 0 ∧ result_11_3 − result_11_3 ≤ 0 ∧ − result_11_2 + result_11_2 ≤ 0 ∧ result_11_2 − result_11_2 ≤ 0 ∧ − result_11_1 + result_11_1 ≤ 0 ∧ result_11_1 − result_11_1 ≤ 0 ∧ − result_11_0 + result_11_0 ≤ 0 ∧ result_11_0 − result_11_0 ≤ 0 ∧ − rcd_72_post + rcd_72_post ≤ 0 ∧ rcd_72_post − rcd_72_post ≤ 0 ∧ − rcd_72_0 + rcd_72_0 ≤ 0 ∧ rcd_72_0 − rcd_72_0 ≤ 0 ∧ − rcd_102_post + rcd_102_post ≤ 0 ∧ rcd_102_post − rcd_102_post ≤ 0 ∧ − rcd_102_0 + rcd_102_0 ≤ 0 ∧ rcd_102_0 − rcd_102_0 ≤ 0 ∧ − r_53_post + r_53_post ≤ 0 ∧ r_53_post − r_53_post ≤ 0 ∧ − r_53_0 + r_53_0 ≤ 0 ∧ r_53_0 − r_53_0 ≤ 0 ∧ − r_161_post + r_161_post ≤ 0 ∧ r_161_post − r_161_post ≤ 0 ∧ − r_161_0 + r_161_0 ≤ 0 ∧ r_161_0 − r_161_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 ≤ 0 ∧ − lt_37_post + lt_37_post ≤ 0 ∧ lt_37_post − lt_37_post ≤ 0 ∧ − lt_37_1 + lt_37_1 ≤ 0 ∧ lt_37_1 − lt_37_1 ≤ 0 ∧ − lt_37_0 + lt_37_0 ≤ 0 ∧ lt_37_0 − lt_37_0 ≤ 0 ∧ − lt_36_post + lt_36_post ≤ 0 ∧ lt_36_post − lt_36_post ≤ 0 ∧ − lt_36_0 + lt_36_0 ≤ 0 ∧ lt_36_0 − lt_36_0 ≤ 0 ∧ − lt_237_post + lt_237_post ≤ 0 ∧ lt_237_post − lt_237_post ≤ 0 ∧ − lt_237_0 + lt_237_0 ≤ 0 ∧ lt_237_0 − lt_237_0 ≤ 0 ∧ − len_246_post + len_246_post ≤ 0 ∧ len_246_post − len_246_post ≤ 0 ∧ − len_246_0 + len_246_0 ≤ 0 ∧ len_246_0 − len_246_0 ≤ 0 ∧ − len_180_post + len_180_post ≤ 0 ∧ len_180_post − len_180_post ≤ 0 ∧ − len_180_0 + len_180_0 ≤ 0 ∧ len_180_0 − len_180_0 ≤ 0 ∧ − i_125_post + i_125_post ≤ 0 ∧ i_125_post − i_125_post ≤ 0 ∧ − i_125_0 + i_125_0 ≤ 0 ∧ i_125_0 − i_125_0 ≤ 0 ∧ − i_108_post + i_108_post ≤ 0 ∧ i_108_post − i_108_post ≤ 0 ∧ − i_108_0 + i_108_0 ≤ 0 ∧ i_108_0 − i_108_0 ≤ 0 ∧ − fmt_31_post + fmt_31_post ≤ 0 ∧ fmt_31_post − fmt_31_post ≤ 0 ∧ − fmt_31_4 + fmt_31_4 ≤ 0 ∧ fmt_31_4 − fmt_31_4 ≤ 0 ∧ − fmt_31_3 + fmt_31_3 ≤ 0 ∧ fmt_31_3 − fmt_31_3 ≤ 0 ∧ − fmt_31_2 + fmt_31_2 ≤ 0 ∧ fmt_31_2 − fmt_31_2 ≤ 0 ∧ − fmt_31_1 + fmt_31_1 ≤ 0 ∧ fmt_31_1 − fmt_31_1 ≤ 0 ∧ − fmt_31_0 + fmt_31_0 ≤ 0 ∧ fmt_31_0 − fmt_31_0 ≤ 0 ∧ − ct_17_post + ct_17_post ≤ 0 ∧ ct_17_post − ct_17_post ≤ 0 ∧ − ct_17_2 + ct_17_2 ≤ 0 ∧ ct_17_2 − ct_17_2 ≤ 0 ∧ − ct_17_1 + ct_17_1 ≤ 0 ∧ ct_17_1 − ct_17_1 ≤ 0 ∧ − ct_17_0 + ct_17_0 ≤ 0 ∧ ct_17_0 − ct_17_0 ≤ 0 ∧ − a_328_post + a_328_post ≤ 0 ∧ a_328_post − a_328_post ≤ 0 ∧ − a_328_0 + a_328_0 ≤ 0 ∧ a_328_0 − a_328_0 ≤ 0 ∧ − a_305_post + a_305_post ≤ 0 ∧ a_305_post − a_305_post ≤ 0 ∧ − a_305_0 + a_305_0 ≤ 0 ∧ a_305_0 − a_305_0 ≤ 0 ∧ − a_283_post + a_283_post ≤ 0 ∧ a_283_post − a_283_post ≤ 0 ∧ − a_283_0 + a_283_0 ≤ 0 ∧ a_283_0 − a_283_0 ≤ 0 ∧ − a_26_post + a_26_post ≤ 0 ∧ a_26_post − a_26_post ≤ 0 ∧ − a_26_1 + a_26_1 ≤ 0 ∧ a_26_1 − a_26_1 ≤ 0 ∧ − a_26_0 + a_26_0 ≤ 0 ∧ a_26_0 − a_26_0 ≤ 0 ∧ − a_247_post + a_247_post ≤ 0 ∧ a_247_post − a_247_post ≤ 0 ∧ − a_247_0 + a_247_0 ≤ 0 ∧ a_247_0 − a_247_0 ≤ 0 ∧ − a_197_post + a_197_post ≤ 0 ∧ a_197_post − a_197_post ≤ 0 ∧ − a_197_0 + a_197_0 ≤ 0 ∧ a_197_0 − a_197_0 ≤ 0 ∧ − a_146_0 + a_146_0 ≤ 0 ∧ a_146_0 − a_146_0 ≤ 0 | |
| 20 | 27 | 21: | 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ − i_44_0 + length_43_0 ≤ 0 ∧ − head_46_0 + temp0_45_1 ≤ 0 ∧ head_46_0 − temp0_45_1 ≤ 0 ∧ result_11_1 − temp0_45_1 ≤ 0 ∧ − result_11_1 + temp0_45_1 ≤ 0 ∧ − result_11_1 + x_14_post ≤ 0 ∧ result_11_1 − x_14_post ≤ 0 ∧ a_26_post − x_14_post ≤ 0 ∧ − a_26_post + x_14_post ≤ 0 ∧ − a_26_post + x_28_post ≤ 0 ∧ a_26_post − x_28_post ≤ 0 ∧ fmt_31_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post ≤ 0 ∧ − fmt_31_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post ≤ 0 ∧ temp0_32_1 ≤ 0 ∧ − temp0_32_1 ≤ 0 ∧ result_11_3 − temp0_32_1 ≤ 0 ∧ − result_11_3 + temp0_32_1 ≤ 0 ∧ − result_11_3 + result_dot_printf_sdv_special_RETURN_VALUE_41_post ≤ 0 ∧ result_11_3 − result_dot_printf_sdv_special_RETURN_VALUE_41_post ≤ 0 ∧ a_26_0 − a_26_post ≤ 0 ∧ − a_26_0 + a_26_post ≤ 0 ∧ fmt_31_0 − fmt_31_post ≤ 0 ∧ − fmt_31_0 + fmt_31_post ≤ 0 ∧ head_46_0 − head_46_post ≤ 0 ∧ − head_46_0 + head_46_post ≤ 0 ∧ i_44_0 − i_44_post ≤ 0 ∧ − i_44_0 + i_44_post ≤ 0 ∧ length_43_0 − length_43_post ≤ 0 ∧ − length_43_0 + length_43_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post ≤ 0 ∧ result_11_0 − result_11_post ≤ 0 ∧ − result_11_0 + result_11_post ≤ 0 ∧ result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post ≤ 0 ∧ − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 + result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_0 − result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_0 + result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_0 − result_dot_printf_sdv_special_RETURN_VALUE_41_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_0 + result_dot_printf_sdv_special_RETURN_VALUE_41_post ≤ 0 ∧ temp0_32_0 − temp0_32_post ≤ 0 ∧ − temp0_32_0 + temp0_32_post ≤ 0 ∧ temp0_45_0 − temp0_45_post ≤ 0 ∧ − temp0_45_0 + temp0_45_post ≤ 0 ∧ temp_49_0 − temp_49_post ≤ 0 ∧ − temp_49_0 + temp_49_post ≤ 0 ∧ tmp_48_0 − tmp_48_post ≤ 0 ∧ − tmp_48_0 + tmp_48_post ≤ 0 ∧ x_14_0 − x_14_post ≤ 0 ∧ − x_14_0 + x_14_post ≤ 0 ∧ x_28_0 − x_28_post ≤ 0 ∧ − x_28_0 + x_28_post ≤ 0 ∧ − y_19_post + y_19_post ≤ 0 ∧ y_19_post − y_19_post ≤ 0 ∧ − y_19_2 + y_19_2 ≤ 0 ∧ y_19_2 − y_19_2 ≤ 0 ∧ − y_19_1 + y_19_1 ≤ 0 ∧ y_19_1 − y_19_1 ≤ 0 ∧ − y_19_0 + y_19_0 ≤ 0 ∧ y_19_0 − y_19_0 ≤ 0 ∧ − x_SLAM_f_18_post + x_SLAM_f_18_post ≤ 0 ∧ x_SLAM_f_18_post − x_SLAM_f_18_post ≤ 0 ∧ − x_SLAM_f_18_2 + x_SLAM_f_18_2 ≤ 0 ∧ x_SLAM_f_18_2 − x_SLAM_f_18_2 ≤ 0 ∧ − x_SLAM_f_18_1 + x_SLAM_f_18_1 ≤ 0 ∧ x_SLAM_f_18_1 − x_SLAM_f_18_1 ≤ 0 ∧ − x_SLAM_f_18_0 + x_SLAM_f_18_0 ≤ 0 ∧ x_SLAM_f_18_0 − x_SLAM_f_18_0 ≤ 0 ∧ − x_34_post + x_34_post ≤ 0 ∧ x_34_post − x_34_post ≤ 0 ∧ − x_34_1 + x_34_1 ≤ 0 ∧ x_34_1 − x_34_1 ≤ 0 ∧ − x_34_0 + x_34_0 ≤ 0 ∧ x_34_0 − x_34_0 ≤ 0 ∧ − x_28_1 + x_28_1 ≤ 0 ∧ x_28_1 − x_28_1 ≤ 0 ∧ − x_238_post + x_238_post ≤ 0 ∧ x_238_post − x_238_post ≤ 0 ∧ − x_238_0 + x_238_0 ≤ 0 ∧ x_238_0 − x_238_0 ≤ 0 ∧ − x_20_post + x_20_post ≤ 0 ∧ x_20_post − x_20_post ≤ 0 ∧ − x_20_2 + x_20_2 ≤ 0 ∧ x_20_2 − x_20_2 ≤ 0 ∧ − x_20_1 + x_20_1 ≤ 0 ∧ x_20_1 − x_20_1 ≤ 0 ∧ − x_20_0 + x_20_0 ≤ 0 ∧ x_20_0 − x_20_0 ≤ 0 ∧ − x_177_post + x_177_post ≤ 0 ∧ x_177_post − x_177_post ≤ 0 ∧ − x_177_0 + x_177_0 ≤ 0 ∧ x_177_0 − x_177_0 ≤ 0 ∧ − x_16_post + x_16_post ≤ 0 ∧ x_16_post − x_16_post ≤ 0 ∧ − x_16_1 + x_16_1 ≤ 0 ∧ x_16_1 − x_16_1 ≤ 0 ∧ − x_16_0 + x_16_0 ≤ 0 ∧ x_16_0 − x_16_0 ≤ 0 ∧ − temp0_32_4 + temp0_32_4 ≤ 0 ∧ temp0_32_4 − temp0_32_4 ≤ 0 ∧ − temp0_32_3 + temp0_32_3 ≤ 0 ∧ temp0_32_3 − temp0_32_3 ≤ 0 ∧ − temp0_32_2 + temp0_32_2 ≤ 0 ∧ temp0_32_2 − temp0_32_2 ≤ 0 ∧ − temp0_15_0 + temp0_15_0 ≤ 0 ∧ temp0_15_0 − temp0_15_0 ≤ 0 ∧ − t_23_post + t_23_post ≤ 0 ∧ t_23_post − t_23_post ≤ 0 ∧ − t_23_1 + t_23_1 ≤ 0 ∧ t_23_1 − t_23_1 ≤ 0 ∧ − t_23_0 + t_23_0 ≤ 0 ∧ t_23_0 − t_23_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_1 + result_dot_printf_sdv_special_RETURN_VALUE_41_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_1 − result_dot_printf_sdv_special_RETURN_VALUE_41_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_post + result_dot_printf_sdv_special_RETURN_VALUE_38_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_post − result_dot_printf_sdv_special_RETURN_VALUE_38_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_1 + result_dot_printf_sdv_special_RETURN_VALUE_38_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_1 − result_dot_printf_sdv_special_RETURN_VALUE_38_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_0 + result_dot_printf_sdv_special_RETURN_VALUE_38_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_0 − result_dot_printf_sdv_special_RETURN_VALUE_38_0 ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_1 + result_dot_nondet_sdv_special_RETURN_VALUE_13_1 ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_1 − result_dot_nondet_sdv_special_RETURN_VALUE_13_1 ≤ 0 ∧ − result_11_6 + result_11_6 ≤ 0 ∧ result_11_6 − result_11_6 ≤ 0 ∧ − result_11_5 + result_11_5 ≤ 0 ∧ result_11_5 − result_11_5 ≤ 0 ∧ − result_11_4 + result_11_4 ≤ 0 ∧ result_11_4 − result_11_4 ≤ 0 ∧ − rcd_72_post + rcd_72_post ≤ 0 ∧ rcd_72_post − rcd_72_post ≤ 0 ∧ − rcd_72_0 + rcd_72_0 ≤ 0 ∧ rcd_72_0 − rcd_72_0 ≤ 0 ∧ − rcd_102_post + rcd_102_post ≤ 0 ∧ rcd_102_post − rcd_102_post ≤ 0 ∧ − rcd_102_0 + rcd_102_0 ≤ 0 ∧ rcd_102_0 − rcd_102_0 ≤ 0 ∧ − r_53_post + r_53_post ≤ 0 ∧ r_53_post − r_53_post ≤ 0 ∧ − r_53_0 + r_53_0 ≤ 0 ∧ r_53_0 − r_53_0 ≤ 0 ∧ − r_161_post + r_161_post ≤ 0 ∧ r_161_post − r_161_post ≤ 0 ∧ − r_161_0 + r_161_0 ≤ 0 ∧ r_161_0 − r_161_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 ≤ 0 ∧ − nondet_12_post + nondet_12_post ≤ 0 ∧ nondet_12_post − nondet_12_post ≤ 0 ∧ − nondet_12_1 + nondet_12_1 ≤ 0 ∧ nondet_12_1 − nondet_12_1 ≤ 0 ∧ − nondet_12_0 + nondet_12_0 ≤ 0 ∧ nondet_12_0 − nondet_12_0 ≤ 0 ∧ − lt_37_post + lt_37_post ≤ 0 ∧ lt_37_post − lt_37_post ≤ 0 ∧ − lt_37_1 + lt_37_1 ≤ 0 ∧ lt_37_1 − lt_37_1 ≤ 0 ∧ − lt_37_0 + lt_37_0 ≤ 0 ∧ lt_37_0 − lt_37_0 ≤ 0 ∧ − lt_36_post + lt_36_post ≤ 0 ∧ lt_36_post − lt_36_post ≤ 0 ∧ − lt_36_0 + lt_36_0 ≤ 0 ∧ lt_36_0 − lt_36_0 ≤ 0 ∧ − lt_237_post + lt_237_post ≤ 0 ∧ lt_237_post − lt_237_post ≤ 0 ∧ − lt_237_0 + lt_237_0 ≤ 0 ∧ lt_237_0 − lt_237_0 ≤ 0 ∧ − len_246_post + len_246_post ≤ 0 ∧ len_246_post − len_246_post ≤ 0 ∧ − len_246_0 + len_246_0 ≤ 0 ∧ len_246_0 − len_246_0 ≤ 0 ∧ − len_180_post + len_180_post ≤ 0 ∧ len_180_post − len_180_post ≤ 0 ∧ − len_180_0 + len_180_0 ≤ 0 ∧ len_180_0 − len_180_0 ≤ 0 ∧ − i_125_post + i_125_post ≤ 0 ∧ i_125_post − i_125_post ≤ 0 ∧ − i_125_0 + i_125_0 ≤ 0 ∧ i_125_0 − i_125_0 ≤ 0 ∧ − i_108_post + i_108_post ≤ 0 ∧ i_108_post − i_108_post ≤ 0 ∧ − i_108_0 + i_108_0 ≤ 0 ∧ i_108_0 − i_108_0 ≤ 0 ∧ − fmt_31_4 + fmt_31_4 ≤ 0 ∧ fmt_31_4 − fmt_31_4 ≤ 0 ∧ − fmt_31_3 + fmt_31_3 ≤ 0 ∧ fmt_31_3 − fmt_31_3 ≤ 0 ∧ − fmt_31_2 + fmt_31_2 ≤ 0 ∧ fmt_31_2 − fmt_31_2 ≤ 0 ∧ − ct_17_post + ct_17_post ≤ 0 ∧ ct_17_post − ct_17_post ≤ 0 ∧ − ct_17_2 + ct_17_2 ≤ 0 ∧ ct_17_2 − ct_17_2 ≤ 0 ∧ − ct_17_1 + ct_17_1 ≤ 0 ∧ ct_17_1 − ct_17_1 ≤ 0 ∧ − ct_17_0 + ct_17_0 ≤ 0 ∧ ct_17_0 − ct_17_0 ≤ 0 ∧ − a_328_post + a_328_post ≤ 0 ∧ a_328_post − a_328_post ≤ 0 ∧ − a_328_0 + a_328_0 ≤ 0 ∧ a_328_0 − a_328_0 ≤ 0 ∧ − a_305_post + a_305_post ≤ 0 ∧ a_305_post − a_305_post ≤ 0 ∧ − a_305_0 + a_305_0 ≤ 0 ∧ a_305_0 − a_305_0 ≤ 0 ∧ − a_283_post + a_283_post ≤ 0 ∧ a_283_post − a_283_post ≤ 0 ∧ − a_283_0 + a_283_0 ≤ 0 ∧ a_283_0 − a_283_0 ≤ 0 ∧ − a_26_1 + a_26_1 ≤ 0 ∧ a_26_1 − a_26_1 ≤ 0 ∧ − a_247_post + a_247_post ≤ 0 ∧ a_247_post − a_247_post ≤ 0 ∧ − a_247_0 + a_247_0 ≤ 0 ∧ a_247_0 − a_247_0 ≤ 0 ∧ − a_197_post + a_197_post ≤ 0 ∧ a_197_post − a_197_post ≤ 0 ∧ − a_197_0 + a_197_0 ≤ 0 ∧ a_197_0 − a_197_0 ≤ 0 ∧ − a_146_0 + a_146_0 ≤ 0 ∧ a_146_0 − a_146_0 ≤ 0 | |
| 21 | 28 | 22: | 1 − x_28_0 ≤ 0 ∧ − y_19_post + y_19_post ≤ 0 ∧ y_19_post − y_19_post ≤ 0 ∧ − y_19_2 + y_19_2 ≤ 0 ∧ y_19_2 − y_19_2 ≤ 0 ∧ − y_19_1 + y_19_1 ≤ 0 ∧ y_19_1 − y_19_1 ≤ 0 ∧ − y_19_0 + y_19_0 ≤ 0 ∧ y_19_0 − y_19_0 ≤ 0 ∧ − x_SLAM_f_18_post + x_SLAM_f_18_post ≤ 0 ∧ x_SLAM_f_18_post − x_SLAM_f_18_post ≤ 0 ∧ − x_SLAM_f_18_2 + x_SLAM_f_18_2 ≤ 0 ∧ x_SLAM_f_18_2 − x_SLAM_f_18_2 ≤ 0 ∧ − x_SLAM_f_18_1 + x_SLAM_f_18_1 ≤ 0 ∧ x_SLAM_f_18_1 − x_SLAM_f_18_1 ≤ 0 ∧ − x_SLAM_f_18_0 + x_SLAM_f_18_0 ≤ 0 ∧ x_SLAM_f_18_0 − x_SLAM_f_18_0 ≤ 0 ∧ − x_34_post + x_34_post ≤ 0 ∧ x_34_post − x_34_post ≤ 0 ∧ − x_34_1 + x_34_1 ≤ 0 ∧ x_34_1 − x_34_1 ≤ 0 ∧ − x_34_0 + x_34_0 ≤ 0 ∧ x_34_0 − x_34_0 ≤ 0 ∧ − x_28_post + x_28_post ≤ 0 ∧ x_28_post − x_28_post ≤ 0 ∧ − x_28_1 + x_28_1 ≤ 0 ∧ x_28_1 − x_28_1 ≤ 0 ∧ − x_28_0 + x_28_0 ≤ 0 ∧ x_28_0 − x_28_0 ≤ 0 ∧ − x_238_post + x_238_post ≤ 0 ∧ x_238_post − x_238_post ≤ 0 ∧ − x_238_0 + x_238_0 ≤ 0 ∧ x_238_0 − x_238_0 ≤ 0 ∧ − x_20_post + x_20_post ≤ 0 ∧ x_20_post − x_20_post ≤ 0 ∧ − x_20_2 + x_20_2 ≤ 0 ∧ x_20_2 − x_20_2 ≤ 0 ∧ − x_20_1 + x_20_1 ≤ 0 ∧ x_20_1 − x_20_1 ≤ 0 ∧ − x_20_0 + x_20_0 ≤ 0 ∧ x_20_0 − x_20_0 ≤ 0 ∧ − x_177_post + x_177_post ≤ 0 ∧ x_177_post − x_177_post ≤ 0 ∧ − x_177_0 + x_177_0 ≤ 0 ∧ x_177_0 − x_177_0 ≤ 0 ∧ − x_16_post + x_16_post ≤ 0 ∧ x_16_post − x_16_post ≤ 0 ∧ − x_16_1 + x_16_1 ≤ 0 ∧ x_16_1 − x_16_1 ≤ 0 ∧ − x_16_0 + x_16_0 ≤ 0 ∧ x_16_0 − x_16_0 ≤ 0 ∧ − x_14_post + x_14_post ≤ 0 ∧ x_14_post − x_14_post ≤ 0 ∧ − x_14_0 + x_14_0 ≤ 0 ∧ x_14_0 − x_14_0 ≤ 0 ∧ − tmp_48_post + tmp_48_post ≤ 0 ∧ tmp_48_post − tmp_48_post ≤ 0 ∧ − tmp_48_0 + tmp_48_0 ≤ 0 ∧ tmp_48_0 − tmp_48_0 ≤ 0 ∧ − temp_49_post + temp_49_post ≤ 0 ∧ temp_49_post − temp_49_post ≤ 0 ∧ − temp_49_0 + temp_49_0 ≤ 0 ∧ temp_49_0 − temp_49_0 ≤ 0 ∧ − temp0_45_post + temp0_45_post ≤ 0 ∧ temp0_45_post − temp0_45_post ≤ 0 ∧ − temp0_45_1 + temp0_45_1 ≤ 0 ∧ temp0_45_1 − temp0_45_1 ≤ 0 ∧ − temp0_45_0 + temp0_45_0 ≤ 0 ∧ temp0_45_0 − temp0_45_0 ≤ 0 ∧ − temp0_32_post + temp0_32_post ≤ 0 ∧ temp0_32_post − temp0_32_post ≤ 0 ∧ − temp0_32_4 + temp0_32_4 ≤ 0 ∧ temp0_32_4 − temp0_32_4 ≤ 0 ∧ − temp0_32_3 + temp0_32_3 ≤ 0 ∧ temp0_32_3 − temp0_32_3 ≤ 0 ∧ − temp0_32_2 + temp0_32_2 ≤ 0 ∧ temp0_32_2 − temp0_32_2 ≤ 0 ∧ − temp0_32_1 + temp0_32_1 ≤ 0 ∧ temp0_32_1 − temp0_32_1 ≤ 0 ∧ − temp0_32_0 + temp0_32_0 ≤ 0 ∧ temp0_32_0 − temp0_32_0 ≤ 0 ∧ − temp0_15_0 + temp0_15_0 ≤ 0 ∧ temp0_15_0 − temp0_15_0 ≤ 0 ∧ − t_23_post + t_23_post ≤ 0 ∧ t_23_post − t_23_post ≤ 0 ∧ − t_23_1 + t_23_1 ≤ 0 ∧ t_23_1 − t_23_1 ≤ 0 ∧ − t_23_0 + t_23_0 ≤ 0 ∧ t_23_0 − t_23_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_post + result_dot_printf_sdv_special_RETURN_VALUE_41_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_post − result_dot_printf_sdv_special_RETURN_VALUE_41_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_1 + result_dot_printf_sdv_special_RETURN_VALUE_41_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_1 − result_dot_printf_sdv_special_RETURN_VALUE_41_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_0 + result_dot_printf_sdv_special_RETURN_VALUE_41_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_0 − result_dot_printf_sdv_special_RETURN_VALUE_41_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_post + result_dot_printf_sdv_special_RETURN_VALUE_38_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_post − result_dot_printf_sdv_special_RETURN_VALUE_38_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_1 + result_dot_printf_sdv_special_RETURN_VALUE_38_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_1 − result_dot_printf_sdv_special_RETURN_VALUE_38_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_0 + result_dot_printf_sdv_special_RETURN_VALUE_38_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_0 − result_dot_printf_sdv_special_RETURN_VALUE_38_0 ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_post + result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_post − result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_1 + result_dot_nondet_sdv_special_RETURN_VALUE_13_1 ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_1 − result_dot_nondet_sdv_special_RETURN_VALUE_13_1 ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_0 + result_dot_nondet_sdv_special_RETURN_VALUE_13_0 ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_0 − result_dot_nondet_sdv_special_RETURN_VALUE_13_0 ≤ 0 ∧ − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post + result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post ≤ 0 ∧ result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post ≤ 0 ∧ − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 + result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 ≤ 0 ∧ result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 ≤ 0 ∧ − result_11_post + result_11_post ≤ 0 ∧ result_11_post − result_11_post ≤ 0 ∧ − result_11_6 + result_11_6 ≤ 0 ∧ result_11_6 − result_11_6 ≤ 0 ∧ − result_11_5 + result_11_5 ≤ 0 ∧ result_11_5 − result_11_5 ≤ 0 ∧ − result_11_4 + result_11_4 ≤ 0 ∧ result_11_4 − result_11_4 ≤ 0 ∧ − result_11_3 + result_11_3 ≤ 0 ∧ result_11_3 − result_11_3 ≤ 0 ∧ − result_11_2 + result_11_2 ≤ 0 ∧ result_11_2 − result_11_2 ≤ 0 ∧ − result_11_1 + result_11_1 ≤ 0 ∧ result_11_1 − result_11_1 ≤ 0 ∧ − result_11_0 + result_11_0 ≤ 0 ∧ result_11_0 − result_11_0 ≤ 0 ∧ − rcd_72_post + rcd_72_post ≤ 0 ∧ rcd_72_post − rcd_72_post ≤ 0 ∧ − rcd_72_0 + rcd_72_0 ≤ 0 ∧ rcd_72_0 − rcd_72_0 ≤ 0 ∧ − rcd_102_post + rcd_102_post ≤ 0 ∧ rcd_102_post − rcd_102_post ≤ 0 ∧ − rcd_102_0 + rcd_102_0 ≤ 0 ∧ rcd_102_0 − rcd_102_0 ≤ 0 ∧ − r_53_post + r_53_post ≤ 0 ∧ r_53_post − r_53_post ≤ 0 ∧ − r_53_0 + r_53_0 ≤ 0 ∧ r_53_0 − r_53_0 ≤ 0 ∧ − r_161_post + r_161_post ≤ 0 ∧ r_161_post − r_161_post ≤ 0 ∧ − r_161_0 + r_161_0 ≤ 0 ∧ r_161_0 − r_161_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 ≤ 0 ∧ − nondet_12_post + nondet_12_post ≤ 0 ∧ nondet_12_post − nondet_12_post ≤ 0 ∧ − nondet_12_1 + nondet_12_1 ≤ 0 ∧ nondet_12_1 − nondet_12_1 ≤ 0 ∧ − nondet_12_0 + nondet_12_0 ≤ 0 ∧ nondet_12_0 − nondet_12_0 ≤ 0 ∧ − lt_37_post + lt_37_post ≤ 0 ∧ lt_37_post − lt_37_post ≤ 0 ∧ − lt_37_1 + lt_37_1 ≤ 0 ∧ lt_37_1 − lt_37_1 ≤ 0 ∧ − lt_37_0 + lt_37_0 ≤ 0 ∧ lt_37_0 − lt_37_0 ≤ 0 ∧ − lt_36_post + lt_36_post ≤ 0 ∧ lt_36_post − lt_36_post ≤ 0 ∧ − lt_36_0 + lt_36_0 ≤ 0 ∧ lt_36_0 − lt_36_0 ≤ 0 ∧ − lt_237_post + lt_237_post ≤ 0 ∧ lt_237_post − lt_237_post ≤ 0 ∧ − lt_237_0 + lt_237_0 ≤ 0 ∧ lt_237_0 − lt_237_0 ≤ 0 ∧ − length_43_post + length_43_post ≤ 0 ∧ length_43_post − length_43_post ≤ 0 ∧ − length_43_0 + length_43_0 ≤ 0 ∧ length_43_0 − length_43_0 ≤ 0 ∧ − len_246_post + len_246_post ≤ 0 ∧ len_246_post − len_246_post ≤ 0 ∧ − len_246_0 + len_246_0 ≤ 0 ∧ len_246_0 − len_246_0 ≤ 0 ∧ − len_180_post + len_180_post ≤ 0 ∧ len_180_post − len_180_post ≤ 0 ∧ − len_180_0 + len_180_0 ≤ 0 ∧ len_180_0 − len_180_0 ≤ 0 ∧ − i_44_post + i_44_post ≤ 0 ∧ i_44_post − i_44_post ≤ 0 ∧ − i_44_0 + i_44_0 ≤ 0 ∧ i_44_0 − i_44_0 ≤ 0 ∧ − i_125_post + i_125_post ≤ 0 ∧ i_125_post − i_125_post ≤ 0 ∧ − i_125_0 + i_125_0 ≤ 0 ∧ i_125_0 − i_125_0 ≤ 0 ∧ − i_108_post + i_108_post ≤ 0 ∧ i_108_post − i_108_post ≤ 0 ∧ − i_108_0 + i_108_0 ≤ 0 ∧ i_108_0 − i_108_0 ≤ 0 ∧ − head_46_post + head_46_post ≤ 0 ∧ head_46_post − head_46_post ≤ 0 ∧ − head_46_0 + head_46_0 ≤ 0 ∧ head_46_0 − head_46_0 ≤ 0 ∧ − fmt_31_post + fmt_31_post ≤ 0 ∧ fmt_31_post − fmt_31_post ≤ 0 ∧ − fmt_31_4 + fmt_31_4 ≤ 0 ∧ fmt_31_4 − fmt_31_4 ≤ 0 ∧ − fmt_31_3 + fmt_31_3 ≤ 0 ∧ fmt_31_3 − fmt_31_3 ≤ 0 ∧ − fmt_31_2 + fmt_31_2 ≤ 0 ∧ fmt_31_2 − fmt_31_2 ≤ 0 ∧ − fmt_31_1 + fmt_31_1 ≤ 0 ∧ fmt_31_1 − fmt_31_1 ≤ 0 ∧ − fmt_31_0 + fmt_31_0 ≤ 0 ∧ fmt_31_0 − fmt_31_0 ≤ 0 ∧ − ct_17_post + ct_17_post ≤ 0 ∧ ct_17_post − ct_17_post ≤ 0 ∧ − ct_17_2 + ct_17_2 ≤ 0 ∧ ct_17_2 − ct_17_2 ≤ 0 ∧ − ct_17_1 + ct_17_1 ≤ 0 ∧ ct_17_1 − ct_17_1 ≤ 0 ∧ − ct_17_0 + ct_17_0 ≤ 0 ∧ ct_17_0 − ct_17_0 ≤ 0 ∧ − a_328_post + a_328_post ≤ 0 ∧ a_328_post − a_328_post ≤ 0 ∧ − a_328_0 + a_328_0 ≤ 0 ∧ a_328_0 − a_328_0 ≤ 0 ∧ − a_305_post + a_305_post ≤ 0 ∧ a_305_post − a_305_post ≤ 0 ∧ − a_305_0 + a_305_0 ≤ 0 ∧ a_305_0 − a_305_0 ≤ 0 ∧ − a_283_post + a_283_post ≤ 0 ∧ a_283_post − a_283_post ≤ 0 ∧ − a_283_0 + a_283_0 ≤ 0 ∧ a_283_0 − a_283_0 ≤ 0 ∧ − a_26_post + a_26_post ≤ 0 ∧ a_26_post − a_26_post ≤ 0 ∧ − a_26_1 + a_26_1 ≤ 0 ∧ a_26_1 − a_26_1 ≤ 0 ∧ − a_26_0 + a_26_0 ≤ 0 ∧ a_26_0 − a_26_0 ≤ 0 ∧ − a_247_post + a_247_post ≤ 0 ∧ a_247_post − a_247_post ≤ 0 ∧ − a_247_0 + a_247_0 ≤ 0 ∧ a_247_0 − a_247_0 ≤ 0 ∧ − a_197_post + a_197_post ≤ 0 ∧ a_197_post − a_197_post ≤ 0 ∧ − a_197_0 + a_197_0 ≤ 0 ∧ a_197_0 − a_197_0 ≤ 0 ∧ − a_146_0 + a_146_0 ≤ 0 ∧ a_146_0 − a_146_0 ≤ 0 | |
| 21 | 29 | 22: | 1 + x_28_0 ≤ 0 ∧ − y_19_post + y_19_post ≤ 0 ∧ y_19_post − y_19_post ≤ 0 ∧ − y_19_2 + y_19_2 ≤ 0 ∧ y_19_2 − y_19_2 ≤ 0 ∧ − y_19_1 + y_19_1 ≤ 0 ∧ y_19_1 − y_19_1 ≤ 0 ∧ − y_19_0 + y_19_0 ≤ 0 ∧ y_19_0 − y_19_0 ≤ 0 ∧ − x_SLAM_f_18_post + x_SLAM_f_18_post ≤ 0 ∧ x_SLAM_f_18_post − x_SLAM_f_18_post ≤ 0 ∧ − x_SLAM_f_18_2 + x_SLAM_f_18_2 ≤ 0 ∧ x_SLAM_f_18_2 − x_SLAM_f_18_2 ≤ 0 ∧ − x_SLAM_f_18_1 + x_SLAM_f_18_1 ≤ 0 ∧ x_SLAM_f_18_1 − x_SLAM_f_18_1 ≤ 0 ∧ − x_SLAM_f_18_0 + x_SLAM_f_18_0 ≤ 0 ∧ x_SLAM_f_18_0 − x_SLAM_f_18_0 ≤ 0 ∧ − x_34_post + x_34_post ≤ 0 ∧ x_34_post − x_34_post ≤ 0 ∧ − x_34_1 + x_34_1 ≤ 0 ∧ x_34_1 − x_34_1 ≤ 0 ∧ − x_34_0 + x_34_0 ≤ 0 ∧ x_34_0 − x_34_0 ≤ 0 ∧ − x_28_post + x_28_post ≤ 0 ∧ x_28_post − x_28_post ≤ 0 ∧ − x_28_1 + x_28_1 ≤ 0 ∧ x_28_1 − x_28_1 ≤ 0 ∧ − x_28_0 + x_28_0 ≤ 0 ∧ x_28_0 − x_28_0 ≤ 0 ∧ − x_238_post + x_238_post ≤ 0 ∧ x_238_post − x_238_post ≤ 0 ∧ − x_238_0 + x_238_0 ≤ 0 ∧ x_238_0 − x_238_0 ≤ 0 ∧ − x_20_post + x_20_post ≤ 0 ∧ x_20_post − x_20_post ≤ 0 ∧ − x_20_2 + x_20_2 ≤ 0 ∧ x_20_2 − x_20_2 ≤ 0 ∧ − x_20_1 + x_20_1 ≤ 0 ∧ x_20_1 − x_20_1 ≤ 0 ∧ − x_20_0 + x_20_0 ≤ 0 ∧ x_20_0 − x_20_0 ≤ 0 ∧ − x_177_post + x_177_post ≤ 0 ∧ x_177_post − x_177_post ≤ 0 ∧ − x_177_0 + x_177_0 ≤ 0 ∧ x_177_0 − x_177_0 ≤ 0 ∧ − x_16_post + x_16_post ≤ 0 ∧ x_16_post − x_16_post ≤ 0 ∧ − x_16_1 + x_16_1 ≤ 0 ∧ x_16_1 − x_16_1 ≤ 0 ∧ − x_16_0 + x_16_0 ≤ 0 ∧ x_16_0 − x_16_0 ≤ 0 ∧ − x_14_post + x_14_post ≤ 0 ∧ x_14_post − x_14_post ≤ 0 ∧ − x_14_0 + x_14_0 ≤ 0 ∧ x_14_0 − x_14_0 ≤ 0 ∧ − tmp_48_post + tmp_48_post ≤ 0 ∧ tmp_48_post − tmp_48_post ≤ 0 ∧ − tmp_48_0 + tmp_48_0 ≤ 0 ∧ tmp_48_0 − tmp_48_0 ≤ 0 ∧ − temp_49_post + temp_49_post ≤ 0 ∧ temp_49_post − temp_49_post ≤ 0 ∧ − temp_49_0 + temp_49_0 ≤ 0 ∧ temp_49_0 − temp_49_0 ≤ 0 ∧ − temp0_45_post + temp0_45_post ≤ 0 ∧ temp0_45_post − temp0_45_post ≤ 0 ∧ − temp0_45_1 + temp0_45_1 ≤ 0 ∧ temp0_45_1 − temp0_45_1 ≤ 0 ∧ − temp0_45_0 + temp0_45_0 ≤ 0 ∧ temp0_45_0 − temp0_45_0 ≤ 0 ∧ − temp0_32_post + temp0_32_post ≤ 0 ∧ temp0_32_post − temp0_32_post ≤ 0 ∧ − temp0_32_4 + temp0_32_4 ≤ 0 ∧ temp0_32_4 − temp0_32_4 ≤ 0 ∧ − temp0_32_3 + temp0_32_3 ≤ 0 ∧ temp0_32_3 − temp0_32_3 ≤ 0 ∧ − temp0_32_2 + temp0_32_2 ≤ 0 ∧ temp0_32_2 − temp0_32_2 ≤ 0 ∧ − temp0_32_1 + temp0_32_1 ≤ 0 ∧ temp0_32_1 − temp0_32_1 ≤ 0 ∧ − temp0_32_0 + temp0_32_0 ≤ 0 ∧ temp0_32_0 − temp0_32_0 ≤ 0 ∧ − temp0_15_0 + temp0_15_0 ≤ 0 ∧ temp0_15_0 − temp0_15_0 ≤ 0 ∧ − t_23_post + t_23_post ≤ 0 ∧ t_23_post − t_23_post ≤ 0 ∧ − t_23_1 + t_23_1 ≤ 0 ∧ t_23_1 − t_23_1 ≤ 0 ∧ − t_23_0 + t_23_0 ≤ 0 ∧ t_23_0 − t_23_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_post + result_dot_printf_sdv_special_RETURN_VALUE_41_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_post − result_dot_printf_sdv_special_RETURN_VALUE_41_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_1 + result_dot_printf_sdv_special_RETURN_VALUE_41_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_1 − result_dot_printf_sdv_special_RETURN_VALUE_41_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_0 + result_dot_printf_sdv_special_RETURN_VALUE_41_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_0 − result_dot_printf_sdv_special_RETURN_VALUE_41_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_post + result_dot_printf_sdv_special_RETURN_VALUE_38_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_post − result_dot_printf_sdv_special_RETURN_VALUE_38_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_1 + result_dot_printf_sdv_special_RETURN_VALUE_38_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_1 − result_dot_printf_sdv_special_RETURN_VALUE_38_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_0 + result_dot_printf_sdv_special_RETURN_VALUE_38_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_0 − result_dot_printf_sdv_special_RETURN_VALUE_38_0 ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_post + result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_post − result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_1 + result_dot_nondet_sdv_special_RETURN_VALUE_13_1 ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_1 − result_dot_nondet_sdv_special_RETURN_VALUE_13_1 ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_0 + result_dot_nondet_sdv_special_RETURN_VALUE_13_0 ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_0 − result_dot_nondet_sdv_special_RETURN_VALUE_13_0 ≤ 0 ∧ − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post + result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post ≤ 0 ∧ result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post ≤ 0 ∧ − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 + result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 ≤ 0 ∧ result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 ≤ 0 ∧ − result_11_post + result_11_post ≤ 0 ∧ result_11_post − result_11_post ≤ 0 ∧ − result_11_6 + result_11_6 ≤ 0 ∧ result_11_6 − result_11_6 ≤ 0 ∧ − result_11_5 + result_11_5 ≤ 0 ∧ result_11_5 − result_11_5 ≤ 0 ∧ − result_11_4 + result_11_4 ≤ 0 ∧ result_11_4 − result_11_4 ≤ 0 ∧ − result_11_3 + result_11_3 ≤ 0 ∧ result_11_3 − result_11_3 ≤ 0 ∧ − result_11_2 + result_11_2 ≤ 0 ∧ result_11_2 − result_11_2 ≤ 0 ∧ − result_11_1 + result_11_1 ≤ 0 ∧ result_11_1 − result_11_1 ≤ 0 ∧ − result_11_0 + result_11_0 ≤ 0 ∧ result_11_0 − result_11_0 ≤ 0 ∧ − rcd_72_post + rcd_72_post ≤ 0 ∧ rcd_72_post − rcd_72_post ≤ 0 ∧ − rcd_72_0 + rcd_72_0 ≤ 0 ∧ rcd_72_0 − rcd_72_0 ≤ 0 ∧ − rcd_102_post + rcd_102_post ≤ 0 ∧ rcd_102_post − rcd_102_post ≤ 0 ∧ − rcd_102_0 + rcd_102_0 ≤ 0 ∧ rcd_102_0 − rcd_102_0 ≤ 0 ∧ − r_53_post + r_53_post ≤ 0 ∧ r_53_post − r_53_post ≤ 0 ∧ − r_53_0 + r_53_0 ≤ 0 ∧ r_53_0 − r_53_0 ≤ 0 ∧ − r_161_post + r_161_post ≤ 0 ∧ r_161_post − r_161_post ≤ 0 ∧ − r_161_0 + r_161_0 ≤ 0 ∧ r_161_0 − r_161_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 ≤ 0 ∧ − nondet_12_post + nondet_12_post ≤ 0 ∧ nondet_12_post − nondet_12_post ≤ 0 ∧ − nondet_12_1 + nondet_12_1 ≤ 0 ∧ nondet_12_1 − nondet_12_1 ≤ 0 ∧ − nondet_12_0 + nondet_12_0 ≤ 0 ∧ nondet_12_0 − nondet_12_0 ≤ 0 ∧ − lt_37_post + lt_37_post ≤ 0 ∧ lt_37_post − lt_37_post ≤ 0 ∧ − lt_37_1 + lt_37_1 ≤ 0 ∧ lt_37_1 − lt_37_1 ≤ 0 ∧ − lt_37_0 + lt_37_0 ≤ 0 ∧ lt_37_0 − lt_37_0 ≤ 0 ∧ − lt_36_post + lt_36_post ≤ 0 ∧ lt_36_post − lt_36_post ≤ 0 ∧ − lt_36_0 + lt_36_0 ≤ 0 ∧ lt_36_0 − lt_36_0 ≤ 0 ∧ − lt_237_post + lt_237_post ≤ 0 ∧ lt_237_post − lt_237_post ≤ 0 ∧ − lt_237_0 + lt_237_0 ≤ 0 ∧ lt_237_0 − lt_237_0 ≤ 0 ∧ − length_43_post + length_43_post ≤ 0 ∧ length_43_post − length_43_post ≤ 0 ∧ − length_43_0 + length_43_0 ≤ 0 ∧ length_43_0 − length_43_0 ≤ 0 ∧ − len_246_post + len_246_post ≤ 0 ∧ len_246_post − len_246_post ≤ 0 ∧ − len_246_0 + len_246_0 ≤ 0 ∧ len_246_0 − len_246_0 ≤ 0 ∧ − len_180_post + len_180_post ≤ 0 ∧ len_180_post − len_180_post ≤ 0 ∧ − len_180_0 + len_180_0 ≤ 0 ∧ len_180_0 − len_180_0 ≤ 0 ∧ − i_44_post + i_44_post ≤ 0 ∧ i_44_post − i_44_post ≤ 0 ∧ − i_44_0 + i_44_0 ≤ 0 ∧ i_44_0 − i_44_0 ≤ 0 ∧ − i_125_post + i_125_post ≤ 0 ∧ i_125_post − i_125_post ≤ 0 ∧ − i_125_0 + i_125_0 ≤ 0 ∧ i_125_0 − i_125_0 ≤ 0 ∧ − i_108_post + i_108_post ≤ 0 ∧ i_108_post − i_108_post ≤ 0 ∧ − i_108_0 + i_108_0 ≤ 0 ∧ i_108_0 − i_108_0 ≤ 0 ∧ − head_46_post + head_46_post ≤ 0 ∧ head_46_post − head_46_post ≤ 0 ∧ − head_46_0 + head_46_0 ≤ 0 ∧ head_46_0 − head_46_0 ≤ 0 ∧ − fmt_31_post + fmt_31_post ≤ 0 ∧ fmt_31_post − fmt_31_post ≤ 0 ∧ − fmt_31_4 + fmt_31_4 ≤ 0 ∧ fmt_31_4 − fmt_31_4 ≤ 0 ∧ − fmt_31_3 + fmt_31_3 ≤ 0 ∧ fmt_31_3 − fmt_31_3 ≤ 0 ∧ − fmt_31_2 + fmt_31_2 ≤ 0 ∧ fmt_31_2 − fmt_31_2 ≤ 0 ∧ − fmt_31_1 + fmt_31_1 ≤ 0 ∧ fmt_31_1 − fmt_31_1 ≤ 0 ∧ − fmt_31_0 + fmt_31_0 ≤ 0 ∧ fmt_31_0 − fmt_31_0 ≤ 0 ∧ − ct_17_post + ct_17_post ≤ 0 ∧ ct_17_post − ct_17_post ≤ 0 ∧ − ct_17_2 + ct_17_2 ≤ 0 ∧ ct_17_2 − ct_17_2 ≤ 0 ∧ − ct_17_1 + ct_17_1 ≤ 0 ∧ ct_17_1 − ct_17_1 ≤ 0 ∧ − ct_17_0 + ct_17_0 ≤ 0 ∧ ct_17_0 − ct_17_0 ≤ 0 ∧ − a_328_post + a_328_post ≤ 0 ∧ a_328_post − a_328_post ≤ 0 ∧ − a_328_0 + a_328_0 ≤ 0 ∧ a_328_0 − a_328_0 ≤ 0 ∧ − a_305_post + a_305_post ≤ 0 ∧ a_305_post − a_305_post ≤ 0 ∧ − a_305_0 + a_305_0 ≤ 0 ∧ a_305_0 − a_305_0 ≤ 0 ∧ − a_283_post + a_283_post ≤ 0 ∧ a_283_post − a_283_post ≤ 0 ∧ − a_283_0 + a_283_0 ≤ 0 ∧ a_283_0 − a_283_0 ≤ 0 ∧ − a_26_post + a_26_post ≤ 0 ∧ a_26_post − a_26_post ≤ 0 ∧ − a_26_1 + a_26_1 ≤ 0 ∧ a_26_1 − a_26_1 ≤ 0 ∧ − a_26_0 + a_26_0 ≤ 0 ∧ a_26_0 − a_26_0 ≤ 0 ∧ − a_247_post + a_247_post ≤ 0 ∧ a_247_post − a_247_post ≤ 0 ∧ − a_247_0 + a_247_0 ≤ 0 ∧ a_247_0 − a_247_0 ≤ 0 ∧ − a_197_post + a_197_post ≤ 0 ∧ a_197_post − a_197_post ≤ 0 ∧ − a_197_0 + a_197_0 ≤ 0 ∧ a_197_0 − a_197_0 ≤ 0 ∧ − a_146_0 + a_146_0 ≤ 0 ∧ a_146_0 − a_146_0 ≤ 0 | |
| 22 | 30 | 23: | 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ − x_28_0 + x_34_1 ≤ 0 ∧ x_28_0 − x_34_1 ≤ 0 ∧ fmt_31_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 ≤ 0 ∧ − fmt_31_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 ≤ 0 ∧ temp0_32_1 ≤ 0 ∧ − temp0_32_1 ≤ 0 ∧ result_11_1 − temp0_32_1 ≤ 0 ∧ − result_11_1 + temp0_32_1 ≤ 0 ∧ − result_11_1 + result_dot_printf_sdv_special_RETURN_VALUE_38_1 ≤ 0 ∧ result_11_1 − result_dot_printf_sdv_special_RETURN_VALUE_38_1 ≤ 0 ∧ − x_28_0 ≤ 0 ∧ x_28_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_0 ≤ 0 ∧ 1 − result_dot_nondet_sdv_special_RETURN_VALUE_13_0 ≤ 0 ∧ −1 + result_dot_nondet_sdv_special_RETURN_VALUE_13_0 ≤ 0 ∧ − a_26_0 + x_14_0 ≤ 0 ∧ a_26_0 − x_14_0 ≤ 0 ∧ fmt_31_0 − fmt_31_post ≤ 0 ∧ − fmt_31_0 + fmt_31_post ≤ 0 ∧ lt_36_0 − lt_36_post ≤ 0 ∧ − lt_36_0 + lt_36_post ≤ 0 ∧ lt_37_0 − lt_37_post ≤ 0 ∧ − lt_37_0 + lt_37_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post ≤ 0 ∧ result_11_0 − result_11_post ≤ 0 ∧ − result_11_0 + result_11_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_0 − result_dot_printf_sdv_special_RETURN_VALUE_38_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_0 + result_dot_printf_sdv_special_RETURN_VALUE_38_post ≤ 0 ∧ temp0_32_0 − temp0_32_post ≤ 0 ∧ − temp0_32_0 + temp0_32_post ≤ 0 ∧ x_34_0 − x_34_post ≤ 0 ∧ − x_34_0 + x_34_post ≤ 0 ∧ − y_19_post + y_19_post ≤ 0 ∧ y_19_post − y_19_post ≤ 0 ∧ − y_19_2 + y_19_2 ≤ 0 ∧ y_19_2 − y_19_2 ≤ 0 ∧ − y_19_1 + y_19_1 ≤ 0 ∧ y_19_1 − y_19_1 ≤ 0 ∧ − y_19_0 + y_19_0 ≤ 0 ∧ y_19_0 − y_19_0 ≤ 0 ∧ − x_SLAM_f_18_post + x_SLAM_f_18_post ≤ 0 ∧ x_SLAM_f_18_post − x_SLAM_f_18_post ≤ 0 ∧ − x_SLAM_f_18_2 + x_SLAM_f_18_2 ≤ 0 ∧ x_SLAM_f_18_2 − x_SLAM_f_18_2 ≤ 0 ∧ − x_SLAM_f_18_1 + x_SLAM_f_18_1 ≤ 0 ∧ x_SLAM_f_18_1 − x_SLAM_f_18_1 ≤ 0 ∧ − x_SLAM_f_18_0 + x_SLAM_f_18_0 ≤ 0 ∧ x_SLAM_f_18_0 − x_SLAM_f_18_0 ≤ 0 ∧ − x_28_post + x_28_post ≤ 0 ∧ x_28_post − x_28_post ≤ 0 ∧ − x_28_1 + x_28_1 ≤ 0 ∧ x_28_1 − x_28_1 ≤ 0 ∧ − x_28_0 + x_28_0 ≤ 0 ∧ x_28_0 − x_28_0 ≤ 0 ∧ − x_238_post + x_238_post ≤ 0 ∧ x_238_post − x_238_post ≤ 0 ∧ − x_238_0 + x_238_0 ≤ 0 ∧ x_238_0 − x_238_0 ≤ 0 ∧ − x_20_post + x_20_post ≤ 0 ∧ x_20_post − x_20_post ≤ 0 ∧ − x_20_2 + x_20_2 ≤ 0 ∧ x_20_2 − x_20_2 ≤ 0 ∧ − x_20_1 + x_20_1 ≤ 0 ∧ x_20_1 − x_20_1 ≤ 0 ∧ − x_20_0 + x_20_0 ≤ 0 ∧ x_20_0 − x_20_0 ≤ 0 ∧ − x_177_post + x_177_post ≤ 0 ∧ x_177_post − x_177_post ≤ 0 ∧ − x_177_0 + x_177_0 ≤ 0 ∧ x_177_0 − x_177_0 ≤ 0 ∧ − x_16_post + x_16_post ≤ 0 ∧ x_16_post − x_16_post ≤ 0 ∧ − x_16_1 + x_16_1 ≤ 0 ∧ x_16_1 − x_16_1 ≤ 0 ∧ − x_16_0 + x_16_0 ≤ 0 ∧ x_16_0 − x_16_0 ≤ 0 ∧ − x_14_post + x_14_post ≤ 0 ∧ x_14_post − x_14_post ≤ 0 ∧ − x_14_0 + x_14_0 ≤ 0 ∧ x_14_0 − x_14_0 ≤ 0 ∧ − tmp_48_post + tmp_48_post ≤ 0 ∧ tmp_48_post − tmp_48_post ≤ 0 ∧ − tmp_48_0 + tmp_48_0 ≤ 0 ∧ tmp_48_0 − tmp_48_0 ≤ 0 ∧ − temp_49_post + temp_49_post ≤ 0 ∧ temp_49_post − temp_49_post ≤ 0 ∧ − temp_49_0 + temp_49_0 ≤ 0 ∧ temp_49_0 − temp_49_0 ≤ 0 ∧ − temp0_45_post + temp0_45_post ≤ 0 ∧ temp0_45_post − temp0_45_post ≤ 0 ∧ − temp0_45_1 + temp0_45_1 ≤ 0 ∧ temp0_45_1 − temp0_45_1 ≤ 0 ∧ − temp0_45_0 + temp0_45_0 ≤ 0 ∧ temp0_45_0 − temp0_45_0 ≤ 0 ∧ − temp0_32_4 + temp0_32_4 ≤ 0 ∧ temp0_32_4 − temp0_32_4 ≤ 0 ∧ − temp0_32_3 + temp0_32_3 ≤ 0 ∧ temp0_32_3 − temp0_32_3 ≤ 0 ∧ − temp0_15_0 + temp0_15_0 ≤ 0 ∧ temp0_15_0 − temp0_15_0 ≤ 0 ∧ − t_23_post + t_23_post ≤ 0 ∧ t_23_post − t_23_post ≤ 0 ∧ − t_23_1 + t_23_1 ≤ 0 ∧ t_23_1 − t_23_1 ≤ 0 ∧ − t_23_0 + t_23_0 ≤ 0 ∧ t_23_0 − t_23_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_post + result_dot_printf_sdv_special_RETURN_VALUE_41_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_post − result_dot_printf_sdv_special_RETURN_VALUE_41_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_1 + result_dot_printf_sdv_special_RETURN_VALUE_41_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_1 − result_dot_printf_sdv_special_RETURN_VALUE_41_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_0 + result_dot_printf_sdv_special_RETURN_VALUE_41_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_0 − result_dot_printf_sdv_special_RETURN_VALUE_41_0 ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_post + result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_post − result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_1 + result_dot_nondet_sdv_special_RETURN_VALUE_13_1 ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_1 − result_dot_nondet_sdv_special_RETURN_VALUE_13_1 ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_0 + result_dot_nondet_sdv_special_RETURN_VALUE_13_0 ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_0 − result_dot_nondet_sdv_special_RETURN_VALUE_13_0 ≤ 0 ∧ − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post + result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post ≤ 0 ∧ result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post ≤ 0 ∧ − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 + result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 ≤ 0 ∧ result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 ≤ 0 ∧ − result_11_6 + result_11_6 ≤ 0 ∧ result_11_6 − result_11_6 ≤ 0 ∧ − result_11_5 + result_11_5 ≤ 0 ∧ result_11_5 − result_11_5 ≤ 0 ∧ − result_11_4 + result_11_4 ≤ 0 ∧ result_11_4 − result_11_4 ≤ 0 ∧ − result_11_3 + result_11_3 ≤ 0 ∧ result_11_3 − result_11_3 ≤ 0 ∧ − result_11_2 + result_11_2 ≤ 0 ∧ result_11_2 − result_11_2 ≤ 0 ∧ − rcd_72_post + rcd_72_post ≤ 0 ∧ rcd_72_post − rcd_72_post ≤ 0 ∧ − rcd_72_0 + rcd_72_0 ≤ 0 ∧ rcd_72_0 − rcd_72_0 ≤ 0 ∧ − rcd_102_post + rcd_102_post ≤ 0 ∧ rcd_102_post − rcd_102_post ≤ 0 ∧ − rcd_102_0 + rcd_102_0 ≤ 0 ∧ rcd_102_0 − rcd_102_0 ≤ 0 ∧ − r_53_post + r_53_post ≤ 0 ∧ r_53_post − r_53_post ≤ 0 ∧ − r_53_0 + r_53_0 ≤ 0 ∧ r_53_0 − r_53_0 ≤ 0 ∧ − r_161_post + r_161_post ≤ 0 ∧ r_161_post − r_161_post ≤ 0 ∧ − r_161_0 + r_161_0 ≤ 0 ∧ r_161_0 − r_161_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 ≤ 0 ∧ − nondet_12_post + nondet_12_post ≤ 0 ∧ nondet_12_post − nondet_12_post ≤ 0 ∧ − nondet_12_1 + nondet_12_1 ≤ 0 ∧ nondet_12_1 − nondet_12_1 ≤ 0 ∧ − nondet_12_0 + nondet_12_0 ≤ 0 ∧ nondet_12_0 − nondet_12_0 ≤ 0 ∧ − lt_237_post + lt_237_post ≤ 0 ∧ lt_237_post − lt_237_post ≤ 0 ∧ − lt_237_0 + lt_237_0 ≤ 0 ∧ lt_237_0 − lt_237_0 ≤ 0 ∧ − length_43_post + length_43_post ≤ 0 ∧ length_43_post − length_43_post ≤ 0 ∧ − length_43_0 + length_43_0 ≤ 0 ∧ length_43_0 − length_43_0 ≤ 0 ∧ − len_246_post + len_246_post ≤ 0 ∧ len_246_post − len_246_post ≤ 0 ∧ − len_246_0 + len_246_0 ≤ 0 ∧ len_246_0 − len_246_0 ≤ 0 ∧ − len_180_post + len_180_post ≤ 0 ∧ len_180_post − len_180_post ≤ 0 ∧ − len_180_0 + len_180_0 ≤ 0 ∧ len_180_0 − len_180_0 ≤ 0 ∧ − i_44_post + i_44_post ≤ 0 ∧ i_44_post − i_44_post ≤ 0 ∧ − i_44_0 + i_44_0 ≤ 0 ∧ i_44_0 − i_44_0 ≤ 0 ∧ − i_125_post + i_125_post ≤ 0 ∧ i_125_post − i_125_post ≤ 0 ∧ − i_125_0 + i_125_0 ≤ 0 ∧ i_125_0 − i_125_0 ≤ 0 ∧ − i_108_post + i_108_post ≤ 0 ∧ i_108_post − i_108_post ≤ 0 ∧ − i_108_0 + i_108_0 ≤ 0 ∧ i_108_0 − i_108_0 ≤ 0 ∧ − head_46_post + head_46_post ≤ 0 ∧ head_46_post − head_46_post ≤ 0 ∧ − head_46_0 + head_46_0 ≤ 0 ∧ head_46_0 − head_46_0 ≤ 0 ∧ − fmt_31_4 + fmt_31_4 ≤ 0 ∧ fmt_31_4 − fmt_31_4 ≤ 0 ∧ − fmt_31_3 + fmt_31_3 ≤ 0 ∧ fmt_31_3 − fmt_31_3 ≤ 0 ∧ − ct_17_post + ct_17_post ≤ 0 ∧ ct_17_post − ct_17_post ≤ 0 ∧ − ct_17_2 + ct_17_2 ≤ 0 ∧ ct_17_2 − ct_17_2 ≤ 0 ∧ − ct_17_1 + ct_17_1 ≤ 0 ∧ ct_17_1 − ct_17_1 ≤ 0 ∧ − ct_17_0 + ct_17_0 ≤ 0 ∧ ct_17_0 − ct_17_0 ≤ 0 ∧ − a_328_post + a_328_post ≤ 0 ∧ a_328_post − a_328_post ≤ 0 ∧ − a_328_0 + a_328_0 ≤ 0 ∧ a_328_0 − a_328_0 ≤ 0 ∧ − a_305_post + a_305_post ≤ 0 ∧ a_305_post − a_305_post ≤ 0 ∧ − a_305_0 + a_305_0 ≤ 0 ∧ a_305_0 − a_305_0 ≤ 0 ∧ − a_283_post + a_283_post ≤ 0 ∧ a_283_post − a_283_post ≤ 0 ∧ − a_283_0 + a_283_0 ≤ 0 ∧ a_283_0 − a_283_0 ≤ 0 ∧ − a_26_post + a_26_post ≤ 0 ∧ a_26_post − a_26_post ≤ 0 ∧ − a_26_1 + a_26_1 ≤ 0 ∧ a_26_1 − a_26_1 ≤ 0 ∧ − a_26_0 + a_26_0 ≤ 0 ∧ a_26_0 − a_26_0 ≤ 0 ∧ − a_247_post + a_247_post ≤ 0 ∧ a_247_post − a_247_post ≤ 0 ∧ − a_247_0 + a_247_0 ≤ 0 ∧ a_247_0 − a_247_0 ≤ 0 ∧ − a_197_post + a_197_post ≤ 0 ∧ a_197_post − a_197_post ≤ 0 ∧ − a_197_0 + a_197_0 ≤ 0 ∧ a_197_0 − a_197_0 ≤ 0 ∧ − a_146_0 + a_146_0 ≤ 0 ∧ a_146_0 − a_146_0 ≤ 0 | |
| 23 | 31 | 24: | 1 − x_14_0 ≤ 0 ∧ − y_19_post + y_19_post ≤ 0 ∧ y_19_post − y_19_post ≤ 0 ∧ − y_19_2 + y_19_2 ≤ 0 ∧ y_19_2 − y_19_2 ≤ 0 ∧ − y_19_1 + y_19_1 ≤ 0 ∧ y_19_1 − y_19_1 ≤ 0 ∧ − y_19_0 + y_19_0 ≤ 0 ∧ y_19_0 − y_19_0 ≤ 0 ∧ − x_SLAM_f_18_post + x_SLAM_f_18_post ≤ 0 ∧ x_SLAM_f_18_post − x_SLAM_f_18_post ≤ 0 ∧ − x_SLAM_f_18_2 + x_SLAM_f_18_2 ≤ 0 ∧ x_SLAM_f_18_2 − x_SLAM_f_18_2 ≤ 0 ∧ − x_SLAM_f_18_1 + x_SLAM_f_18_1 ≤ 0 ∧ x_SLAM_f_18_1 − x_SLAM_f_18_1 ≤ 0 ∧ − x_SLAM_f_18_0 + x_SLAM_f_18_0 ≤ 0 ∧ x_SLAM_f_18_0 − x_SLAM_f_18_0 ≤ 0 ∧ − x_34_post + x_34_post ≤ 0 ∧ x_34_post − x_34_post ≤ 0 ∧ − x_34_1 + x_34_1 ≤ 0 ∧ x_34_1 − x_34_1 ≤ 0 ∧ − x_34_0 + x_34_0 ≤ 0 ∧ x_34_0 − x_34_0 ≤ 0 ∧ − x_28_post + x_28_post ≤ 0 ∧ x_28_post − x_28_post ≤ 0 ∧ − x_28_1 + x_28_1 ≤ 0 ∧ x_28_1 − x_28_1 ≤ 0 ∧ − x_28_0 + x_28_0 ≤ 0 ∧ x_28_0 − x_28_0 ≤ 0 ∧ − x_238_post + x_238_post ≤ 0 ∧ x_238_post − x_238_post ≤ 0 ∧ − x_238_0 + x_238_0 ≤ 0 ∧ x_238_0 − x_238_0 ≤ 0 ∧ − x_20_post + x_20_post ≤ 0 ∧ x_20_post − x_20_post ≤ 0 ∧ − x_20_2 + x_20_2 ≤ 0 ∧ x_20_2 − x_20_2 ≤ 0 ∧ − x_20_1 + x_20_1 ≤ 0 ∧ x_20_1 − x_20_1 ≤ 0 ∧ − x_20_0 + x_20_0 ≤ 0 ∧ x_20_0 − x_20_0 ≤ 0 ∧ − x_177_post + x_177_post ≤ 0 ∧ x_177_post − x_177_post ≤ 0 ∧ − x_177_0 + x_177_0 ≤ 0 ∧ x_177_0 − x_177_0 ≤ 0 ∧ − x_16_post + x_16_post ≤ 0 ∧ x_16_post − x_16_post ≤ 0 ∧ − x_16_1 + x_16_1 ≤ 0 ∧ x_16_1 − x_16_1 ≤ 0 ∧ − x_16_0 + x_16_0 ≤ 0 ∧ x_16_0 − x_16_0 ≤ 0 ∧ − x_14_post + x_14_post ≤ 0 ∧ x_14_post − x_14_post ≤ 0 ∧ − x_14_0 + x_14_0 ≤ 0 ∧ x_14_0 − x_14_0 ≤ 0 ∧ − tmp_48_post + tmp_48_post ≤ 0 ∧ tmp_48_post − tmp_48_post ≤ 0 ∧ − tmp_48_0 + tmp_48_0 ≤ 0 ∧ tmp_48_0 − tmp_48_0 ≤ 0 ∧ − temp_49_post + temp_49_post ≤ 0 ∧ temp_49_post − temp_49_post ≤ 0 ∧ − temp_49_0 + temp_49_0 ≤ 0 ∧ temp_49_0 − temp_49_0 ≤ 0 ∧ − temp0_45_post + temp0_45_post ≤ 0 ∧ temp0_45_post − temp0_45_post ≤ 0 ∧ − temp0_45_1 + temp0_45_1 ≤ 0 ∧ temp0_45_1 − temp0_45_1 ≤ 0 ∧ − temp0_45_0 + temp0_45_0 ≤ 0 ∧ temp0_45_0 − temp0_45_0 ≤ 0 ∧ − temp0_32_post + temp0_32_post ≤ 0 ∧ temp0_32_post − temp0_32_post ≤ 0 ∧ − temp0_32_4 + temp0_32_4 ≤ 0 ∧ temp0_32_4 − temp0_32_4 ≤ 0 ∧ − temp0_32_3 + temp0_32_3 ≤ 0 ∧ temp0_32_3 − temp0_32_3 ≤ 0 ∧ − temp0_32_2 + temp0_32_2 ≤ 0 ∧ temp0_32_2 − temp0_32_2 ≤ 0 ∧ − temp0_32_1 + temp0_32_1 ≤ 0 ∧ temp0_32_1 − temp0_32_1 ≤ 0 ∧ − temp0_32_0 + temp0_32_0 ≤ 0 ∧ temp0_32_0 − temp0_32_0 ≤ 0 ∧ − temp0_15_0 + temp0_15_0 ≤ 0 ∧ temp0_15_0 − temp0_15_0 ≤ 0 ∧ − t_23_post + t_23_post ≤ 0 ∧ t_23_post − t_23_post ≤ 0 ∧ − t_23_1 + t_23_1 ≤ 0 ∧ t_23_1 − t_23_1 ≤ 0 ∧ − t_23_0 + t_23_0 ≤ 0 ∧ t_23_0 − t_23_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_post + result_dot_printf_sdv_special_RETURN_VALUE_41_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_post − result_dot_printf_sdv_special_RETURN_VALUE_41_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_1 + result_dot_printf_sdv_special_RETURN_VALUE_41_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_1 − result_dot_printf_sdv_special_RETURN_VALUE_41_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_0 + result_dot_printf_sdv_special_RETURN_VALUE_41_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_0 − result_dot_printf_sdv_special_RETURN_VALUE_41_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_post + result_dot_printf_sdv_special_RETURN_VALUE_38_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_post − result_dot_printf_sdv_special_RETURN_VALUE_38_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_1 + result_dot_printf_sdv_special_RETURN_VALUE_38_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_1 − result_dot_printf_sdv_special_RETURN_VALUE_38_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_0 + result_dot_printf_sdv_special_RETURN_VALUE_38_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_0 − result_dot_printf_sdv_special_RETURN_VALUE_38_0 ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_post + result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_post − result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_1 + result_dot_nondet_sdv_special_RETURN_VALUE_13_1 ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_1 − result_dot_nondet_sdv_special_RETURN_VALUE_13_1 ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_0 + result_dot_nondet_sdv_special_RETURN_VALUE_13_0 ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_0 − result_dot_nondet_sdv_special_RETURN_VALUE_13_0 ≤ 0 ∧ − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post + result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post ≤ 0 ∧ result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post ≤ 0 ∧ − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 + result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 ≤ 0 ∧ result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 ≤ 0 ∧ − result_11_post + result_11_post ≤ 0 ∧ result_11_post − result_11_post ≤ 0 ∧ − result_11_6 + result_11_6 ≤ 0 ∧ result_11_6 − result_11_6 ≤ 0 ∧ − result_11_5 + result_11_5 ≤ 0 ∧ result_11_5 − result_11_5 ≤ 0 ∧ − result_11_4 + result_11_4 ≤ 0 ∧ result_11_4 − result_11_4 ≤ 0 ∧ − result_11_3 + result_11_3 ≤ 0 ∧ result_11_3 − result_11_3 ≤ 0 ∧ − result_11_2 + result_11_2 ≤ 0 ∧ result_11_2 − result_11_2 ≤ 0 ∧ − result_11_1 + result_11_1 ≤ 0 ∧ result_11_1 − result_11_1 ≤ 0 ∧ − result_11_0 + result_11_0 ≤ 0 ∧ result_11_0 − result_11_0 ≤ 0 ∧ − rcd_72_post + rcd_72_post ≤ 0 ∧ rcd_72_post − rcd_72_post ≤ 0 ∧ − rcd_72_0 + rcd_72_0 ≤ 0 ∧ rcd_72_0 − rcd_72_0 ≤ 0 ∧ − rcd_102_post + rcd_102_post ≤ 0 ∧ rcd_102_post − rcd_102_post ≤ 0 ∧ − rcd_102_0 + rcd_102_0 ≤ 0 ∧ rcd_102_0 − rcd_102_0 ≤ 0 ∧ − r_53_post + r_53_post ≤ 0 ∧ r_53_post − r_53_post ≤ 0 ∧ − r_53_0 + r_53_0 ≤ 0 ∧ r_53_0 − r_53_0 ≤ 0 ∧ − r_161_post + r_161_post ≤ 0 ∧ r_161_post − r_161_post ≤ 0 ∧ − r_161_0 + r_161_0 ≤ 0 ∧ r_161_0 − r_161_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 ≤ 0 ∧ − nondet_12_post + nondet_12_post ≤ 0 ∧ nondet_12_post − nondet_12_post ≤ 0 ∧ − nondet_12_1 + nondet_12_1 ≤ 0 ∧ nondet_12_1 − nondet_12_1 ≤ 0 ∧ − nondet_12_0 + nondet_12_0 ≤ 0 ∧ nondet_12_0 − nondet_12_0 ≤ 0 ∧ − lt_37_post + lt_37_post ≤ 0 ∧ lt_37_post − lt_37_post ≤ 0 ∧ − lt_37_1 + lt_37_1 ≤ 0 ∧ lt_37_1 − lt_37_1 ≤ 0 ∧ − lt_37_0 + lt_37_0 ≤ 0 ∧ lt_37_0 − lt_37_0 ≤ 0 ∧ − lt_36_post + lt_36_post ≤ 0 ∧ lt_36_post − lt_36_post ≤ 0 ∧ − lt_36_0 + lt_36_0 ≤ 0 ∧ lt_36_0 − lt_36_0 ≤ 0 ∧ − lt_237_post + lt_237_post ≤ 0 ∧ lt_237_post − lt_237_post ≤ 0 ∧ − lt_237_0 + lt_237_0 ≤ 0 ∧ lt_237_0 − lt_237_0 ≤ 0 ∧ − length_43_post + length_43_post ≤ 0 ∧ length_43_post − length_43_post ≤ 0 ∧ − length_43_0 + length_43_0 ≤ 0 ∧ length_43_0 − length_43_0 ≤ 0 ∧ − len_246_post + len_246_post ≤ 0 ∧ len_246_post − len_246_post ≤ 0 ∧ − len_246_0 + len_246_0 ≤ 0 ∧ len_246_0 − len_246_0 ≤ 0 ∧ − len_180_post + len_180_post ≤ 0 ∧ len_180_post − len_180_post ≤ 0 ∧ − len_180_0 + len_180_0 ≤ 0 ∧ len_180_0 − len_180_0 ≤ 0 ∧ − i_44_post + i_44_post ≤ 0 ∧ i_44_post − i_44_post ≤ 0 ∧ − i_44_0 + i_44_0 ≤ 0 ∧ i_44_0 − i_44_0 ≤ 0 ∧ − i_125_post + i_125_post ≤ 0 ∧ i_125_post − i_125_post ≤ 0 ∧ − i_125_0 + i_125_0 ≤ 0 ∧ i_125_0 − i_125_0 ≤ 0 ∧ − i_108_post + i_108_post ≤ 0 ∧ i_108_post − i_108_post ≤ 0 ∧ − i_108_0 + i_108_0 ≤ 0 ∧ i_108_0 − i_108_0 ≤ 0 ∧ − head_46_post + head_46_post ≤ 0 ∧ head_46_post − head_46_post ≤ 0 ∧ − head_46_0 + head_46_0 ≤ 0 ∧ head_46_0 − head_46_0 ≤ 0 ∧ − fmt_31_post + fmt_31_post ≤ 0 ∧ fmt_31_post − fmt_31_post ≤ 0 ∧ − fmt_31_4 + fmt_31_4 ≤ 0 ∧ fmt_31_4 − fmt_31_4 ≤ 0 ∧ − fmt_31_3 + fmt_31_3 ≤ 0 ∧ fmt_31_3 − fmt_31_3 ≤ 0 ∧ − fmt_31_2 + fmt_31_2 ≤ 0 ∧ fmt_31_2 − fmt_31_2 ≤ 0 ∧ − fmt_31_1 + fmt_31_1 ≤ 0 ∧ fmt_31_1 − fmt_31_1 ≤ 0 ∧ − fmt_31_0 + fmt_31_0 ≤ 0 ∧ fmt_31_0 − fmt_31_0 ≤ 0 ∧ − ct_17_post + ct_17_post ≤ 0 ∧ ct_17_post − ct_17_post ≤ 0 ∧ − ct_17_2 + ct_17_2 ≤ 0 ∧ ct_17_2 − ct_17_2 ≤ 0 ∧ − ct_17_1 + ct_17_1 ≤ 0 ∧ ct_17_1 − ct_17_1 ≤ 0 ∧ − ct_17_0 + ct_17_0 ≤ 0 ∧ ct_17_0 − ct_17_0 ≤ 0 ∧ − a_328_post + a_328_post ≤ 0 ∧ a_328_post − a_328_post ≤ 0 ∧ − a_328_0 + a_328_0 ≤ 0 ∧ a_328_0 − a_328_0 ≤ 0 ∧ − a_305_post + a_305_post ≤ 0 ∧ a_305_post − a_305_post ≤ 0 ∧ − a_305_0 + a_305_0 ≤ 0 ∧ a_305_0 − a_305_0 ≤ 0 ∧ − a_283_post + a_283_post ≤ 0 ∧ a_283_post − a_283_post ≤ 0 ∧ − a_283_0 + a_283_0 ≤ 0 ∧ a_283_0 − a_283_0 ≤ 0 ∧ − a_26_post + a_26_post ≤ 0 ∧ a_26_post − a_26_post ≤ 0 ∧ − a_26_1 + a_26_1 ≤ 0 ∧ a_26_1 − a_26_1 ≤ 0 ∧ − a_26_0 + a_26_0 ≤ 0 ∧ a_26_0 − a_26_0 ≤ 0 ∧ − a_247_post + a_247_post ≤ 0 ∧ a_247_post − a_247_post ≤ 0 ∧ − a_247_0 + a_247_0 ≤ 0 ∧ a_247_0 − a_247_0 ≤ 0 ∧ − a_197_post + a_197_post ≤ 0 ∧ a_197_post − a_197_post ≤ 0 ∧ − a_197_0 + a_197_0 ≤ 0 ∧ a_197_0 − a_197_0 ≤ 0 ∧ − a_146_0 + a_146_0 ≤ 0 ∧ a_146_0 − a_146_0 ≤ 0 | |
| 23 | 32 | 24: | 1 + x_14_0 ≤ 0 ∧ − y_19_post + y_19_post ≤ 0 ∧ y_19_post − y_19_post ≤ 0 ∧ − y_19_2 + y_19_2 ≤ 0 ∧ y_19_2 − y_19_2 ≤ 0 ∧ − y_19_1 + y_19_1 ≤ 0 ∧ y_19_1 − y_19_1 ≤ 0 ∧ − y_19_0 + y_19_0 ≤ 0 ∧ y_19_0 − y_19_0 ≤ 0 ∧ − x_SLAM_f_18_post + x_SLAM_f_18_post ≤ 0 ∧ x_SLAM_f_18_post − x_SLAM_f_18_post ≤ 0 ∧ − x_SLAM_f_18_2 + x_SLAM_f_18_2 ≤ 0 ∧ x_SLAM_f_18_2 − x_SLAM_f_18_2 ≤ 0 ∧ − x_SLAM_f_18_1 + x_SLAM_f_18_1 ≤ 0 ∧ x_SLAM_f_18_1 − x_SLAM_f_18_1 ≤ 0 ∧ − x_SLAM_f_18_0 + x_SLAM_f_18_0 ≤ 0 ∧ x_SLAM_f_18_0 − x_SLAM_f_18_0 ≤ 0 ∧ − x_34_post + x_34_post ≤ 0 ∧ x_34_post − x_34_post ≤ 0 ∧ − x_34_1 + x_34_1 ≤ 0 ∧ x_34_1 − x_34_1 ≤ 0 ∧ − x_34_0 + x_34_0 ≤ 0 ∧ x_34_0 − x_34_0 ≤ 0 ∧ − x_28_post + x_28_post ≤ 0 ∧ x_28_post − x_28_post ≤ 0 ∧ − x_28_1 + x_28_1 ≤ 0 ∧ x_28_1 − x_28_1 ≤ 0 ∧ − x_28_0 + x_28_0 ≤ 0 ∧ x_28_0 − x_28_0 ≤ 0 ∧ − x_238_post + x_238_post ≤ 0 ∧ x_238_post − x_238_post ≤ 0 ∧ − x_238_0 + x_238_0 ≤ 0 ∧ x_238_0 − x_238_0 ≤ 0 ∧ − x_20_post + x_20_post ≤ 0 ∧ x_20_post − x_20_post ≤ 0 ∧ − x_20_2 + x_20_2 ≤ 0 ∧ x_20_2 − x_20_2 ≤ 0 ∧ − x_20_1 + x_20_1 ≤ 0 ∧ x_20_1 − x_20_1 ≤ 0 ∧ − x_20_0 + x_20_0 ≤ 0 ∧ x_20_0 − x_20_0 ≤ 0 ∧ − x_177_post + x_177_post ≤ 0 ∧ x_177_post − x_177_post ≤ 0 ∧ − x_177_0 + x_177_0 ≤ 0 ∧ x_177_0 − x_177_0 ≤ 0 ∧ − x_16_post + x_16_post ≤ 0 ∧ x_16_post − x_16_post ≤ 0 ∧ − x_16_1 + x_16_1 ≤ 0 ∧ x_16_1 − x_16_1 ≤ 0 ∧ − x_16_0 + x_16_0 ≤ 0 ∧ x_16_0 − x_16_0 ≤ 0 ∧ − x_14_post + x_14_post ≤ 0 ∧ x_14_post − x_14_post ≤ 0 ∧ − x_14_0 + x_14_0 ≤ 0 ∧ x_14_0 − x_14_0 ≤ 0 ∧ − tmp_48_post + tmp_48_post ≤ 0 ∧ tmp_48_post − tmp_48_post ≤ 0 ∧ − tmp_48_0 + tmp_48_0 ≤ 0 ∧ tmp_48_0 − tmp_48_0 ≤ 0 ∧ − temp_49_post + temp_49_post ≤ 0 ∧ temp_49_post − temp_49_post ≤ 0 ∧ − temp_49_0 + temp_49_0 ≤ 0 ∧ temp_49_0 − temp_49_0 ≤ 0 ∧ − temp0_45_post + temp0_45_post ≤ 0 ∧ temp0_45_post − temp0_45_post ≤ 0 ∧ − temp0_45_1 + temp0_45_1 ≤ 0 ∧ temp0_45_1 − temp0_45_1 ≤ 0 ∧ − temp0_45_0 + temp0_45_0 ≤ 0 ∧ temp0_45_0 − temp0_45_0 ≤ 0 ∧ − temp0_32_post + temp0_32_post ≤ 0 ∧ temp0_32_post − temp0_32_post ≤ 0 ∧ − temp0_32_4 + temp0_32_4 ≤ 0 ∧ temp0_32_4 − temp0_32_4 ≤ 0 ∧ − temp0_32_3 + temp0_32_3 ≤ 0 ∧ temp0_32_3 − temp0_32_3 ≤ 0 ∧ − temp0_32_2 + temp0_32_2 ≤ 0 ∧ temp0_32_2 − temp0_32_2 ≤ 0 ∧ − temp0_32_1 + temp0_32_1 ≤ 0 ∧ temp0_32_1 − temp0_32_1 ≤ 0 ∧ − temp0_32_0 + temp0_32_0 ≤ 0 ∧ temp0_32_0 − temp0_32_0 ≤ 0 ∧ − temp0_15_0 + temp0_15_0 ≤ 0 ∧ temp0_15_0 − temp0_15_0 ≤ 0 ∧ − t_23_post + t_23_post ≤ 0 ∧ t_23_post − t_23_post ≤ 0 ∧ − t_23_1 + t_23_1 ≤ 0 ∧ t_23_1 − t_23_1 ≤ 0 ∧ − t_23_0 + t_23_0 ≤ 0 ∧ t_23_0 − t_23_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_post + result_dot_printf_sdv_special_RETURN_VALUE_41_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_post − result_dot_printf_sdv_special_RETURN_VALUE_41_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_1 + result_dot_printf_sdv_special_RETURN_VALUE_41_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_1 − result_dot_printf_sdv_special_RETURN_VALUE_41_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_0 + result_dot_printf_sdv_special_RETURN_VALUE_41_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_0 − result_dot_printf_sdv_special_RETURN_VALUE_41_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_post + result_dot_printf_sdv_special_RETURN_VALUE_38_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_post − result_dot_printf_sdv_special_RETURN_VALUE_38_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_1 + result_dot_printf_sdv_special_RETURN_VALUE_38_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_1 − result_dot_printf_sdv_special_RETURN_VALUE_38_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_0 + result_dot_printf_sdv_special_RETURN_VALUE_38_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_0 − result_dot_printf_sdv_special_RETURN_VALUE_38_0 ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_post + result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_post − result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_1 + result_dot_nondet_sdv_special_RETURN_VALUE_13_1 ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_1 − result_dot_nondet_sdv_special_RETURN_VALUE_13_1 ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_0 + result_dot_nondet_sdv_special_RETURN_VALUE_13_0 ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_0 − result_dot_nondet_sdv_special_RETURN_VALUE_13_0 ≤ 0 ∧ − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post + result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post ≤ 0 ∧ result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post ≤ 0 ∧ − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 + result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 ≤ 0 ∧ result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 ≤ 0 ∧ − result_11_post + result_11_post ≤ 0 ∧ result_11_post − result_11_post ≤ 0 ∧ − result_11_6 + result_11_6 ≤ 0 ∧ result_11_6 − result_11_6 ≤ 0 ∧ − result_11_5 + result_11_5 ≤ 0 ∧ result_11_5 − result_11_5 ≤ 0 ∧ − result_11_4 + result_11_4 ≤ 0 ∧ result_11_4 − result_11_4 ≤ 0 ∧ − result_11_3 + result_11_3 ≤ 0 ∧ result_11_3 − result_11_3 ≤ 0 ∧ − result_11_2 + result_11_2 ≤ 0 ∧ result_11_2 − result_11_2 ≤ 0 ∧ − result_11_1 + result_11_1 ≤ 0 ∧ result_11_1 − result_11_1 ≤ 0 ∧ − result_11_0 + result_11_0 ≤ 0 ∧ result_11_0 − result_11_0 ≤ 0 ∧ − rcd_72_post + rcd_72_post ≤ 0 ∧ rcd_72_post − rcd_72_post ≤ 0 ∧ − rcd_72_0 + rcd_72_0 ≤ 0 ∧ rcd_72_0 − rcd_72_0 ≤ 0 ∧ − rcd_102_post + rcd_102_post ≤ 0 ∧ rcd_102_post − rcd_102_post ≤ 0 ∧ − rcd_102_0 + rcd_102_0 ≤ 0 ∧ rcd_102_0 − rcd_102_0 ≤ 0 ∧ − r_53_post + r_53_post ≤ 0 ∧ r_53_post − r_53_post ≤ 0 ∧ − r_53_0 + r_53_0 ≤ 0 ∧ r_53_0 − r_53_0 ≤ 0 ∧ − r_161_post + r_161_post ≤ 0 ∧ r_161_post − r_161_post ≤ 0 ∧ − r_161_0 + r_161_0 ≤ 0 ∧ r_161_0 − r_161_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 ≤ 0 ∧ − nondet_12_post + nondet_12_post ≤ 0 ∧ nondet_12_post − nondet_12_post ≤ 0 ∧ − nondet_12_1 + nondet_12_1 ≤ 0 ∧ nondet_12_1 − nondet_12_1 ≤ 0 ∧ − nondet_12_0 + nondet_12_0 ≤ 0 ∧ nondet_12_0 − nondet_12_0 ≤ 0 ∧ − lt_37_post + lt_37_post ≤ 0 ∧ lt_37_post − lt_37_post ≤ 0 ∧ − lt_37_1 + lt_37_1 ≤ 0 ∧ lt_37_1 − lt_37_1 ≤ 0 ∧ − lt_37_0 + lt_37_0 ≤ 0 ∧ lt_37_0 − lt_37_0 ≤ 0 ∧ − lt_36_post + lt_36_post ≤ 0 ∧ lt_36_post − lt_36_post ≤ 0 ∧ − lt_36_0 + lt_36_0 ≤ 0 ∧ lt_36_0 − lt_36_0 ≤ 0 ∧ − lt_237_post + lt_237_post ≤ 0 ∧ lt_237_post − lt_237_post ≤ 0 ∧ − lt_237_0 + lt_237_0 ≤ 0 ∧ lt_237_0 − lt_237_0 ≤ 0 ∧ − length_43_post + length_43_post ≤ 0 ∧ length_43_post − length_43_post ≤ 0 ∧ − length_43_0 + length_43_0 ≤ 0 ∧ length_43_0 − length_43_0 ≤ 0 ∧ − len_246_post + len_246_post ≤ 0 ∧ len_246_post − len_246_post ≤ 0 ∧ − len_246_0 + len_246_0 ≤ 0 ∧ len_246_0 − len_246_0 ≤ 0 ∧ − len_180_post + len_180_post ≤ 0 ∧ len_180_post − len_180_post ≤ 0 ∧ − len_180_0 + len_180_0 ≤ 0 ∧ len_180_0 − len_180_0 ≤ 0 ∧ − i_44_post + i_44_post ≤ 0 ∧ i_44_post − i_44_post ≤ 0 ∧ − i_44_0 + i_44_0 ≤ 0 ∧ i_44_0 − i_44_0 ≤ 0 ∧ − i_125_post + i_125_post ≤ 0 ∧ i_125_post − i_125_post ≤ 0 ∧ − i_125_0 + i_125_0 ≤ 0 ∧ i_125_0 − i_125_0 ≤ 0 ∧ − i_108_post + i_108_post ≤ 0 ∧ i_108_post − i_108_post ≤ 0 ∧ − i_108_0 + i_108_0 ≤ 0 ∧ i_108_0 − i_108_0 ≤ 0 ∧ − head_46_post + head_46_post ≤ 0 ∧ head_46_post − head_46_post ≤ 0 ∧ − head_46_0 + head_46_0 ≤ 0 ∧ head_46_0 − head_46_0 ≤ 0 ∧ − fmt_31_post + fmt_31_post ≤ 0 ∧ fmt_31_post − fmt_31_post ≤ 0 ∧ − fmt_31_4 + fmt_31_4 ≤ 0 ∧ fmt_31_4 − fmt_31_4 ≤ 0 ∧ − fmt_31_3 + fmt_31_3 ≤ 0 ∧ fmt_31_3 − fmt_31_3 ≤ 0 ∧ − fmt_31_2 + fmt_31_2 ≤ 0 ∧ fmt_31_2 − fmt_31_2 ≤ 0 ∧ − fmt_31_1 + fmt_31_1 ≤ 0 ∧ fmt_31_1 − fmt_31_1 ≤ 0 ∧ − fmt_31_0 + fmt_31_0 ≤ 0 ∧ fmt_31_0 − fmt_31_0 ≤ 0 ∧ − ct_17_post + ct_17_post ≤ 0 ∧ ct_17_post − ct_17_post ≤ 0 ∧ − ct_17_2 + ct_17_2 ≤ 0 ∧ ct_17_2 − ct_17_2 ≤ 0 ∧ − ct_17_1 + ct_17_1 ≤ 0 ∧ ct_17_1 − ct_17_1 ≤ 0 ∧ − ct_17_0 + ct_17_0 ≤ 0 ∧ ct_17_0 − ct_17_0 ≤ 0 ∧ − a_328_post + a_328_post ≤ 0 ∧ a_328_post − a_328_post ≤ 0 ∧ − a_328_0 + a_328_0 ≤ 0 ∧ a_328_0 − a_328_0 ≤ 0 ∧ − a_305_post + a_305_post ≤ 0 ∧ a_305_post − a_305_post ≤ 0 ∧ − a_305_0 + a_305_0 ≤ 0 ∧ a_305_0 − a_305_0 ≤ 0 ∧ − a_283_post + a_283_post ≤ 0 ∧ a_283_post − a_283_post ≤ 0 ∧ − a_283_0 + a_283_0 ≤ 0 ∧ a_283_0 − a_283_0 ≤ 0 ∧ − a_26_post + a_26_post ≤ 0 ∧ a_26_post − a_26_post ≤ 0 ∧ − a_26_1 + a_26_1 ≤ 0 ∧ a_26_1 − a_26_1 ≤ 0 ∧ − a_26_0 + a_26_0 ≤ 0 ∧ a_26_0 − a_26_0 ≤ 0 ∧ − a_247_post + a_247_post ≤ 0 ∧ a_247_post − a_247_post ≤ 0 ∧ − a_247_0 + a_247_0 ≤ 0 ∧ a_247_0 − a_247_0 ≤ 0 ∧ − a_197_post + a_197_post ≤ 0 ∧ a_197_post − a_197_post ≤ 0 ∧ − a_197_0 + a_197_0 ≤ 0 ∧ a_197_0 − a_197_0 ≤ 0 ∧ − a_146_0 + a_146_0 ≤ 0 ∧ a_146_0 − a_146_0 ≤ 0 | |
| 24 | 33 | 25: | 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 1 − result_dot_nondet_sdv_special_RETURN_VALUE_13_0 ≤ 0 ∧ −1 + result_dot_nondet_sdv_special_RETURN_VALUE_13_0 ≤ 0 ∧ − x_28_0 ≤ 0 ∧ x_28_0 ≤ 0 ∧ fmt_31_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 ≤ 0 ∧ − fmt_31_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 ≤ 0 ∧ temp0_32_1 ≤ 0 ∧ − temp0_32_1 ≤ 0 ∧ result_11_1 − temp0_32_1 ≤ 0 ∧ − result_11_1 + temp0_32_1 ≤ 0 ∧ − result_11_1 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 ≤ 0 ∧ result_11_1 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 ≤ 0 ∧ − x_14_0 + x_16_post ≤ 0 ∧ x_14_0 − x_16_post ≤ 0 ∧ ct_17_post ≤ 0 ∧ − ct_17_post ≤ 0 ∧ − x_16_post + x_SLAM_f_18_post ≤ 0 ∧ x_16_post − x_SLAM_f_18_post ≤ 0 ∧ − ct_17_post + y_19_post ≤ 0 ∧ ct_17_post − y_19_post ≤ 0 ∧ x_20_post − x_SLAM_f_18_post ≤ 0 ∧ − x_20_post + x_SLAM_f_18_post ≤ 0 ∧ − ct_17_post ≤ 0 ∧ ct_17_post ≤ 0 ∧ − y_19_post ≤ 0 ∧ y_19_post ≤ 0 ∧ 1 − result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ −1 + result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ x_14_0 − x_16_post ≤ 0 ∧ − x_14_0 + x_16_post ≤ 0 ∧ x_14_0 − x_SLAM_f_18_post ≤ 0 ∧ − x_14_0 + x_SLAM_f_18_post ≤ 0 ∧ x_14_0 − x_20_post ≤ 0 ∧ − x_14_0 + x_20_post ≤ 0 ∧ x_16_post − x_SLAM_f_18_post ≤ 0 ∧ − x_16_post + x_SLAM_f_18_post ≤ 0 ∧ ct_17_post − y_19_post ≤ 0 ∧ − ct_17_post + y_19_post ≤ 0 ∧ − x_20_post + x_SLAM_f_18_post ≤ 0 ∧ x_20_post − x_SLAM_f_18_post ≤ 0 ∧ a_26_0 − a_26_post ≤ 0 ∧ − a_26_0 + a_26_post ≤ 0 ∧ ct_17_0 − ct_17_post ≤ 0 ∧ − ct_17_0 + ct_17_post ≤ 0 ∧ fmt_31_0 − fmt_31_post ≤ 0 ∧ − fmt_31_0 + fmt_31_post ≤ 0 ∧ lt_36_0 − lt_36_post ≤ 0 ∧ − lt_36_0 + lt_36_post ≤ 0 ∧ lt_37_0 − lt_37_post ≤ 0 ∧ − lt_37_0 + lt_37_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post ≤ 0 ∧ result_11_0 − result_11_post ≤ 0 ∧ − result_11_0 + result_11_post ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_0 − result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_0 + result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_0 − result_dot_printf_sdv_special_RETURN_VALUE_38_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_0 + result_dot_printf_sdv_special_RETURN_VALUE_38_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_0 − result_dot_printf_sdv_special_RETURN_VALUE_41_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_0 + result_dot_printf_sdv_special_RETURN_VALUE_41_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post ≤ 0 ∧ temp0_32_0 − temp0_32_post ≤ 0 ∧ − temp0_32_0 + temp0_32_post ≤ 0 ∧ x_16_0 − x_16_post ≤ 0 ∧ − x_16_0 + x_16_post ≤ 0 ∧ x_20_0 − x_20_post ≤ 0 ∧ − x_20_0 + x_20_post ≤ 0 ∧ x_28_0 − x_28_post ≤ 0 ∧ − x_28_0 + x_28_post ≤ 0 ∧ x_34_0 − x_34_post ≤ 0 ∧ − x_34_0 + x_34_post ≤ 0 ∧ x_SLAM_f_18_0 − x_SLAM_f_18_post ≤ 0 ∧ − x_SLAM_f_18_0 + x_SLAM_f_18_post ≤ 0 ∧ y_19_0 − y_19_post ≤ 0 ∧ − y_19_0 + y_19_post ≤ 0 ∧ − y_19_2 + y_19_2 ≤ 0 ∧ y_19_2 − y_19_2 ≤ 0 ∧ − y_19_1 + y_19_1 ≤ 0 ∧ y_19_1 − y_19_1 ≤ 0 ∧ − x_SLAM_f_18_2 + x_SLAM_f_18_2 ≤ 0 ∧ x_SLAM_f_18_2 − x_SLAM_f_18_2 ≤ 0 ∧ − x_SLAM_f_18_1 + x_SLAM_f_18_1 ≤ 0 ∧ x_SLAM_f_18_1 − x_SLAM_f_18_1 ≤ 0 ∧ − x_34_1 + x_34_1 ≤ 0 ∧ x_34_1 − x_34_1 ≤ 0 ∧ − x_28_1 + x_28_1 ≤ 0 ∧ x_28_1 − x_28_1 ≤ 0 ∧ − x_238_post + x_238_post ≤ 0 ∧ x_238_post − x_238_post ≤ 0 ∧ − x_238_0 + x_238_0 ≤ 0 ∧ x_238_0 − x_238_0 ≤ 0 ∧ − x_20_2 + x_20_2 ≤ 0 ∧ x_20_2 − x_20_2 ≤ 0 ∧ − x_20_1 + x_20_1 ≤ 0 ∧ x_20_1 − x_20_1 ≤ 0 ∧ − x_177_post + x_177_post ≤ 0 ∧ x_177_post − x_177_post ≤ 0 ∧ − x_177_0 + x_177_0 ≤ 0 ∧ x_177_0 − x_177_0 ≤ 0 ∧ − x_16_1 + x_16_1 ≤ 0 ∧ x_16_1 − x_16_1 ≤ 0 ∧ − x_14_post + x_14_post ≤ 0 ∧ x_14_post − x_14_post ≤ 0 ∧ − x_14_0 + x_14_0 ≤ 0 ∧ x_14_0 − x_14_0 ≤ 0 ∧ − tmp_48_post + tmp_48_post ≤ 0 ∧ tmp_48_post − tmp_48_post ≤ 0 ∧ − tmp_48_0 + tmp_48_0 ≤ 0 ∧ tmp_48_0 − tmp_48_0 ≤ 0 ∧ − temp_49_post + temp_49_post ≤ 0 ∧ temp_49_post − temp_49_post ≤ 0 ∧ − temp_49_0 + temp_49_0 ≤ 0 ∧ temp_49_0 − temp_49_0 ≤ 0 ∧ − temp0_45_post + temp0_45_post ≤ 0 ∧ temp0_45_post − temp0_45_post ≤ 0 ∧ − temp0_45_1 + temp0_45_1 ≤ 0 ∧ temp0_45_1 − temp0_45_1 ≤ 0 ∧ − temp0_45_0 + temp0_45_0 ≤ 0 ∧ temp0_45_0 − temp0_45_0 ≤ 0 ∧ − temp0_32_4 + temp0_32_4 ≤ 0 ∧ temp0_32_4 − temp0_32_4 ≤ 0 ∧ − temp0_32_3 + temp0_32_3 ≤ 0 ∧ temp0_32_3 − temp0_32_3 ≤ 0 ∧ − temp0_15_0 + temp0_15_0 ≤ 0 ∧ temp0_15_0 − temp0_15_0 ≤ 0 ∧ − t_23_post + t_23_post ≤ 0 ∧ t_23_post − t_23_post ≤ 0 ∧ − t_23_1 + t_23_1 ≤ 0 ∧ t_23_1 − t_23_1 ≤ 0 ∧ − t_23_0 + t_23_0 ≤ 0 ∧ t_23_0 − t_23_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_1 + result_dot_printf_sdv_special_RETURN_VALUE_41_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_1 − result_dot_printf_sdv_special_RETURN_VALUE_41_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_1 + result_dot_printf_sdv_special_RETURN_VALUE_38_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_1 − result_dot_printf_sdv_special_RETURN_VALUE_38_1 ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_1 + result_dot_nondet_sdv_special_RETURN_VALUE_13_1 ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_1 − result_dot_nondet_sdv_special_RETURN_VALUE_13_1 ≤ 0 ∧ − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post + result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post ≤ 0 ∧ result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post ≤ 0 ∧ − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 + result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 ≤ 0 ∧ result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 ≤ 0 ∧ − result_11_6 + result_11_6 ≤ 0 ∧ result_11_6 − result_11_6 ≤ 0 ∧ − result_11_5 + result_11_5 ≤ 0 ∧ result_11_5 − result_11_5 ≤ 0 ∧ − result_11_4 + result_11_4 ≤ 0 ∧ result_11_4 − result_11_4 ≤ 0 ∧ − result_11_3 + result_11_3 ≤ 0 ∧ result_11_3 − result_11_3 ≤ 0 ∧ − result_11_2 + result_11_2 ≤ 0 ∧ result_11_2 − result_11_2 ≤ 0 ∧ − rcd_72_post + rcd_72_post ≤ 0 ∧ rcd_72_post − rcd_72_post ≤ 0 ∧ − rcd_72_0 + rcd_72_0 ≤ 0 ∧ rcd_72_0 − rcd_72_0 ≤ 0 ∧ − rcd_102_post + rcd_102_post ≤ 0 ∧ rcd_102_post − rcd_102_post ≤ 0 ∧ − rcd_102_0 + rcd_102_0 ≤ 0 ∧ rcd_102_0 − rcd_102_0 ≤ 0 ∧ − r_53_post + r_53_post ≤ 0 ∧ r_53_post − r_53_post ≤ 0 ∧ − r_53_0 + r_53_0 ≤ 0 ∧ r_53_0 − r_53_0 ≤ 0 ∧ − r_161_post + r_161_post ≤ 0 ∧ r_161_post − r_161_post ≤ 0 ∧ − r_161_0 + r_161_0 ≤ 0 ∧ r_161_0 − r_161_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 ≤ 0 ∧ − nondet_12_post + nondet_12_post ≤ 0 ∧ nondet_12_post − nondet_12_post ≤ 0 ∧ − nondet_12_1 + nondet_12_1 ≤ 0 ∧ nondet_12_1 − nondet_12_1 ≤ 0 ∧ − nondet_12_0 + nondet_12_0 ≤ 0 ∧ nondet_12_0 − nondet_12_0 ≤ 0 ∧ − lt_37_1 + lt_37_1 ≤ 0 ∧ lt_37_1 − lt_37_1 ≤ 0 ∧ − lt_237_post + lt_237_post ≤ 0 ∧ lt_237_post − lt_237_post ≤ 0 ∧ − lt_237_0 + lt_237_0 ≤ 0 ∧ lt_237_0 − lt_237_0 ≤ 0 ∧ − length_43_post + length_43_post ≤ 0 ∧ length_43_post − length_43_post ≤ 0 ∧ − length_43_0 + length_43_0 ≤ 0 ∧ length_43_0 − length_43_0 ≤ 0 ∧ − len_246_post + len_246_post ≤ 0 ∧ len_246_post − len_246_post ≤ 0 ∧ − len_246_0 + len_246_0 ≤ 0 ∧ len_246_0 − len_246_0 ≤ 0 ∧ − len_180_post + len_180_post ≤ 0 ∧ len_180_post − len_180_post ≤ 0 ∧ − len_180_0 + len_180_0 ≤ 0 ∧ len_180_0 − len_180_0 ≤ 0 ∧ − i_44_post + i_44_post ≤ 0 ∧ i_44_post − i_44_post ≤ 0 ∧ − i_44_0 + i_44_0 ≤ 0 ∧ i_44_0 − i_44_0 ≤ 0 ∧ − i_125_post + i_125_post ≤ 0 ∧ i_125_post − i_125_post ≤ 0 ∧ − i_125_0 + i_125_0 ≤ 0 ∧ i_125_0 − i_125_0 ≤ 0 ∧ − i_108_post + i_108_post ≤ 0 ∧ i_108_post − i_108_post ≤ 0 ∧ − i_108_0 + i_108_0 ≤ 0 ∧ i_108_0 − i_108_0 ≤ 0 ∧ − head_46_post + head_46_post ≤ 0 ∧ head_46_post − head_46_post ≤ 0 ∧ − head_46_0 + head_46_0 ≤ 0 ∧ head_46_0 − head_46_0 ≤ 0 ∧ − fmt_31_4 + fmt_31_4 ≤ 0 ∧ fmt_31_4 − fmt_31_4 ≤ 0 ∧ − fmt_31_3 + fmt_31_3 ≤ 0 ∧ fmt_31_3 − fmt_31_3 ≤ 0 ∧ − ct_17_2 + ct_17_2 ≤ 0 ∧ ct_17_2 − ct_17_2 ≤ 0 ∧ − ct_17_1 + ct_17_1 ≤ 0 ∧ ct_17_1 − ct_17_1 ≤ 0 ∧ − a_328_post + a_328_post ≤ 0 ∧ a_328_post − a_328_post ≤ 0 ∧ − a_328_0 + a_328_0 ≤ 0 ∧ a_328_0 − a_328_0 ≤ 0 ∧ − a_305_post + a_305_post ≤ 0 ∧ a_305_post − a_305_post ≤ 0 ∧ − a_305_0 + a_305_0 ≤ 0 ∧ a_305_0 − a_305_0 ≤ 0 ∧ − a_283_post + a_283_post ≤ 0 ∧ a_283_post − a_283_post ≤ 0 ∧ − a_283_0 + a_283_0 ≤ 0 ∧ a_283_0 − a_283_0 ≤ 0 ∧ − a_26_1 + a_26_1 ≤ 0 ∧ a_26_1 − a_26_1 ≤ 0 ∧ − a_247_post + a_247_post ≤ 0 ∧ a_247_post − a_247_post ≤ 0 ∧ − a_247_0 + a_247_0 ≤ 0 ∧ a_247_0 − a_247_0 ≤ 0 ∧ − a_197_post + a_197_post ≤ 0 ∧ a_197_post − a_197_post ≤ 0 ∧ − a_197_0 + a_197_0 ≤ 0 ∧ a_197_0 − a_197_0 ≤ 0 ∧ − a_146_0 + a_146_0 ≤ 0 ∧ a_146_0 − a_146_0 ≤ 0 | |
| 25 | 34 | 26: | 1 − x_14_0 ≤ 0 ∧ − y_19_post + y_19_post ≤ 0 ∧ y_19_post − y_19_post ≤ 0 ∧ − y_19_2 + y_19_2 ≤ 0 ∧ y_19_2 − y_19_2 ≤ 0 ∧ − y_19_1 + y_19_1 ≤ 0 ∧ y_19_1 − y_19_1 ≤ 0 ∧ − y_19_0 + y_19_0 ≤ 0 ∧ y_19_0 − y_19_0 ≤ 0 ∧ − x_SLAM_f_18_post + x_SLAM_f_18_post ≤ 0 ∧ x_SLAM_f_18_post − x_SLAM_f_18_post ≤ 0 ∧ − x_SLAM_f_18_2 + x_SLAM_f_18_2 ≤ 0 ∧ x_SLAM_f_18_2 − x_SLAM_f_18_2 ≤ 0 ∧ − x_SLAM_f_18_1 + x_SLAM_f_18_1 ≤ 0 ∧ x_SLAM_f_18_1 − x_SLAM_f_18_1 ≤ 0 ∧ − x_SLAM_f_18_0 + x_SLAM_f_18_0 ≤ 0 ∧ x_SLAM_f_18_0 − x_SLAM_f_18_0 ≤ 0 ∧ − x_34_post + x_34_post ≤ 0 ∧ x_34_post − x_34_post ≤ 0 ∧ − x_34_1 + x_34_1 ≤ 0 ∧ x_34_1 − x_34_1 ≤ 0 ∧ − x_34_0 + x_34_0 ≤ 0 ∧ x_34_0 − x_34_0 ≤ 0 ∧ − x_28_post + x_28_post ≤ 0 ∧ x_28_post − x_28_post ≤ 0 ∧ − x_28_1 + x_28_1 ≤ 0 ∧ x_28_1 − x_28_1 ≤ 0 ∧ − x_28_0 + x_28_0 ≤ 0 ∧ x_28_0 − x_28_0 ≤ 0 ∧ − x_238_post + x_238_post ≤ 0 ∧ x_238_post − x_238_post ≤ 0 ∧ − x_238_0 + x_238_0 ≤ 0 ∧ x_238_0 − x_238_0 ≤ 0 ∧ − x_20_post + x_20_post ≤ 0 ∧ x_20_post − x_20_post ≤ 0 ∧ − x_20_2 + x_20_2 ≤ 0 ∧ x_20_2 − x_20_2 ≤ 0 ∧ − x_20_1 + x_20_1 ≤ 0 ∧ x_20_1 − x_20_1 ≤ 0 ∧ − x_20_0 + x_20_0 ≤ 0 ∧ x_20_0 − x_20_0 ≤ 0 ∧ − x_177_post + x_177_post ≤ 0 ∧ x_177_post − x_177_post ≤ 0 ∧ − x_177_0 + x_177_0 ≤ 0 ∧ x_177_0 − x_177_0 ≤ 0 ∧ − x_16_post + x_16_post ≤ 0 ∧ x_16_post − x_16_post ≤ 0 ∧ − x_16_1 + x_16_1 ≤ 0 ∧ x_16_1 − x_16_1 ≤ 0 ∧ − x_16_0 + x_16_0 ≤ 0 ∧ x_16_0 − x_16_0 ≤ 0 ∧ − x_14_post + x_14_post ≤ 0 ∧ x_14_post − x_14_post ≤ 0 ∧ − x_14_0 + x_14_0 ≤ 0 ∧ x_14_0 − x_14_0 ≤ 0 ∧ − tmp_48_post + tmp_48_post ≤ 0 ∧ tmp_48_post − tmp_48_post ≤ 0 ∧ − tmp_48_0 + tmp_48_0 ≤ 0 ∧ tmp_48_0 − tmp_48_0 ≤ 0 ∧ − temp_49_post + temp_49_post ≤ 0 ∧ temp_49_post − temp_49_post ≤ 0 ∧ − temp_49_0 + temp_49_0 ≤ 0 ∧ temp_49_0 − temp_49_0 ≤ 0 ∧ − temp0_45_post + temp0_45_post ≤ 0 ∧ temp0_45_post − temp0_45_post ≤ 0 ∧ − temp0_45_1 + temp0_45_1 ≤ 0 ∧ temp0_45_1 − temp0_45_1 ≤ 0 ∧ − temp0_45_0 + temp0_45_0 ≤ 0 ∧ temp0_45_0 − temp0_45_0 ≤ 0 ∧ − temp0_32_post + temp0_32_post ≤ 0 ∧ temp0_32_post − temp0_32_post ≤ 0 ∧ − temp0_32_4 + temp0_32_4 ≤ 0 ∧ temp0_32_4 − temp0_32_4 ≤ 0 ∧ − temp0_32_3 + temp0_32_3 ≤ 0 ∧ temp0_32_3 − temp0_32_3 ≤ 0 ∧ − temp0_32_2 + temp0_32_2 ≤ 0 ∧ temp0_32_2 − temp0_32_2 ≤ 0 ∧ − temp0_32_1 + temp0_32_1 ≤ 0 ∧ temp0_32_1 − temp0_32_1 ≤ 0 ∧ − temp0_32_0 + temp0_32_0 ≤ 0 ∧ temp0_32_0 − temp0_32_0 ≤ 0 ∧ − temp0_15_0 + temp0_15_0 ≤ 0 ∧ temp0_15_0 − temp0_15_0 ≤ 0 ∧ − t_23_post + t_23_post ≤ 0 ∧ t_23_post − t_23_post ≤ 0 ∧ − t_23_1 + t_23_1 ≤ 0 ∧ t_23_1 − t_23_1 ≤ 0 ∧ − t_23_0 + t_23_0 ≤ 0 ∧ t_23_0 − t_23_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_post + result_dot_printf_sdv_special_RETURN_VALUE_41_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_post − result_dot_printf_sdv_special_RETURN_VALUE_41_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_1 + result_dot_printf_sdv_special_RETURN_VALUE_41_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_1 − result_dot_printf_sdv_special_RETURN_VALUE_41_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_0 + result_dot_printf_sdv_special_RETURN_VALUE_41_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_0 − result_dot_printf_sdv_special_RETURN_VALUE_41_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_post + result_dot_printf_sdv_special_RETURN_VALUE_38_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_post − result_dot_printf_sdv_special_RETURN_VALUE_38_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_1 + result_dot_printf_sdv_special_RETURN_VALUE_38_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_1 − result_dot_printf_sdv_special_RETURN_VALUE_38_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_0 + result_dot_printf_sdv_special_RETURN_VALUE_38_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_0 − result_dot_printf_sdv_special_RETURN_VALUE_38_0 ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_post + result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_post − result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_1 + result_dot_nondet_sdv_special_RETURN_VALUE_13_1 ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_1 − result_dot_nondet_sdv_special_RETURN_VALUE_13_1 ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_0 + result_dot_nondet_sdv_special_RETURN_VALUE_13_0 ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_0 − result_dot_nondet_sdv_special_RETURN_VALUE_13_0 ≤ 0 ∧ − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post + result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post ≤ 0 ∧ result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post ≤ 0 ∧ − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 + result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 ≤ 0 ∧ result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 ≤ 0 ∧ − result_11_post + result_11_post ≤ 0 ∧ result_11_post − result_11_post ≤ 0 ∧ − result_11_6 + result_11_6 ≤ 0 ∧ result_11_6 − result_11_6 ≤ 0 ∧ − result_11_5 + result_11_5 ≤ 0 ∧ result_11_5 − result_11_5 ≤ 0 ∧ − result_11_4 + result_11_4 ≤ 0 ∧ result_11_4 − result_11_4 ≤ 0 ∧ − result_11_3 + result_11_3 ≤ 0 ∧ result_11_3 − result_11_3 ≤ 0 ∧ − result_11_2 + result_11_2 ≤ 0 ∧ result_11_2 − result_11_2 ≤ 0 ∧ − result_11_1 + result_11_1 ≤ 0 ∧ result_11_1 − result_11_1 ≤ 0 ∧ − result_11_0 + result_11_0 ≤ 0 ∧ result_11_0 − result_11_0 ≤ 0 ∧ − rcd_72_post + rcd_72_post ≤ 0 ∧ rcd_72_post − rcd_72_post ≤ 0 ∧ − rcd_72_0 + rcd_72_0 ≤ 0 ∧ rcd_72_0 − rcd_72_0 ≤ 0 ∧ − rcd_102_post + rcd_102_post ≤ 0 ∧ rcd_102_post − rcd_102_post ≤ 0 ∧ − rcd_102_0 + rcd_102_0 ≤ 0 ∧ rcd_102_0 − rcd_102_0 ≤ 0 ∧ − r_53_post + r_53_post ≤ 0 ∧ r_53_post − r_53_post ≤ 0 ∧ − r_53_0 + r_53_0 ≤ 0 ∧ r_53_0 − r_53_0 ≤ 0 ∧ − r_161_post + r_161_post ≤ 0 ∧ r_161_post − r_161_post ≤ 0 ∧ − r_161_0 + r_161_0 ≤ 0 ∧ r_161_0 − r_161_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 ≤ 0 ∧ − nondet_12_post + nondet_12_post ≤ 0 ∧ nondet_12_post − nondet_12_post ≤ 0 ∧ − nondet_12_1 + nondet_12_1 ≤ 0 ∧ nondet_12_1 − nondet_12_1 ≤ 0 ∧ − nondet_12_0 + nondet_12_0 ≤ 0 ∧ nondet_12_0 − nondet_12_0 ≤ 0 ∧ − lt_37_post + lt_37_post ≤ 0 ∧ lt_37_post − lt_37_post ≤ 0 ∧ − lt_37_1 + lt_37_1 ≤ 0 ∧ lt_37_1 − lt_37_1 ≤ 0 ∧ − lt_37_0 + lt_37_0 ≤ 0 ∧ lt_37_0 − lt_37_0 ≤ 0 ∧ − lt_36_post + lt_36_post ≤ 0 ∧ lt_36_post − lt_36_post ≤ 0 ∧ − lt_36_0 + lt_36_0 ≤ 0 ∧ lt_36_0 − lt_36_0 ≤ 0 ∧ − lt_237_post + lt_237_post ≤ 0 ∧ lt_237_post − lt_237_post ≤ 0 ∧ − lt_237_0 + lt_237_0 ≤ 0 ∧ lt_237_0 − lt_237_0 ≤ 0 ∧ − length_43_post + length_43_post ≤ 0 ∧ length_43_post − length_43_post ≤ 0 ∧ − length_43_0 + length_43_0 ≤ 0 ∧ length_43_0 − length_43_0 ≤ 0 ∧ − len_246_post + len_246_post ≤ 0 ∧ len_246_post − len_246_post ≤ 0 ∧ − len_246_0 + len_246_0 ≤ 0 ∧ len_246_0 − len_246_0 ≤ 0 ∧ − len_180_post + len_180_post ≤ 0 ∧ len_180_post − len_180_post ≤ 0 ∧ − len_180_0 + len_180_0 ≤ 0 ∧ len_180_0 − len_180_0 ≤ 0 ∧ − i_44_post + i_44_post ≤ 0 ∧ i_44_post − i_44_post ≤ 0 ∧ − i_44_0 + i_44_0 ≤ 0 ∧ i_44_0 − i_44_0 ≤ 0 ∧ − i_125_post + i_125_post ≤ 0 ∧ i_125_post − i_125_post ≤ 0 ∧ − i_125_0 + i_125_0 ≤ 0 ∧ i_125_0 − i_125_0 ≤ 0 ∧ − i_108_post + i_108_post ≤ 0 ∧ i_108_post − i_108_post ≤ 0 ∧ − i_108_0 + i_108_0 ≤ 0 ∧ i_108_0 − i_108_0 ≤ 0 ∧ − head_46_post + head_46_post ≤ 0 ∧ head_46_post − head_46_post ≤ 0 ∧ − head_46_0 + head_46_0 ≤ 0 ∧ head_46_0 − head_46_0 ≤ 0 ∧ − fmt_31_post + fmt_31_post ≤ 0 ∧ fmt_31_post − fmt_31_post ≤ 0 ∧ − fmt_31_4 + fmt_31_4 ≤ 0 ∧ fmt_31_4 − fmt_31_4 ≤ 0 ∧ − fmt_31_3 + fmt_31_3 ≤ 0 ∧ fmt_31_3 − fmt_31_3 ≤ 0 ∧ − fmt_31_2 + fmt_31_2 ≤ 0 ∧ fmt_31_2 − fmt_31_2 ≤ 0 ∧ − fmt_31_1 + fmt_31_1 ≤ 0 ∧ fmt_31_1 − fmt_31_1 ≤ 0 ∧ − fmt_31_0 + fmt_31_0 ≤ 0 ∧ fmt_31_0 − fmt_31_0 ≤ 0 ∧ − ct_17_post + ct_17_post ≤ 0 ∧ ct_17_post − ct_17_post ≤ 0 ∧ − ct_17_2 + ct_17_2 ≤ 0 ∧ ct_17_2 − ct_17_2 ≤ 0 ∧ − ct_17_1 + ct_17_1 ≤ 0 ∧ ct_17_1 − ct_17_1 ≤ 0 ∧ − ct_17_0 + ct_17_0 ≤ 0 ∧ ct_17_0 − ct_17_0 ≤ 0 ∧ − a_328_post + a_328_post ≤ 0 ∧ a_328_post − a_328_post ≤ 0 ∧ − a_328_0 + a_328_0 ≤ 0 ∧ a_328_0 − a_328_0 ≤ 0 ∧ − a_305_post + a_305_post ≤ 0 ∧ a_305_post − a_305_post ≤ 0 ∧ − a_305_0 + a_305_0 ≤ 0 ∧ a_305_0 − a_305_0 ≤ 0 ∧ − a_283_post + a_283_post ≤ 0 ∧ a_283_post − a_283_post ≤ 0 ∧ − a_283_0 + a_283_0 ≤ 0 ∧ a_283_0 − a_283_0 ≤ 0 ∧ − a_26_post + a_26_post ≤ 0 ∧ a_26_post − a_26_post ≤ 0 ∧ − a_26_1 + a_26_1 ≤ 0 ∧ a_26_1 − a_26_1 ≤ 0 ∧ − a_26_0 + a_26_0 ≤ 0 ∧ a_26_0 − a_26_0 ≤ 0 ∧ − a_247_post + a_247_post ≤ 0 ∧ a_247_post − a_247_post ≤ 0 ∧ − a_247_0 + a_247_0 ≤ 0 ∧ a_247_0 − a_247_0 ≤ 0 ∧ − a_197_post + a_197_post ≤ 0 ∧ a_197_post − a_197_post ≤ 0 ∧ − a_197_0 + a_197_0 ≤ 0 ∧ a_197_0 − a_197_0 ≤ 0 ∧ − a_146_0 + a_146_0 ≤ 0 ∧ a_146_0 − a_146_0 ≤ 0 | |
| 25 | 35 | 26: | 1 + x_14_0 ≤ 0 ∧ − y_19_post + y_19_post ≤ 0 ∧ y_19_post − y_19_post ≤ 0 ∧ − y_19_2 + y_19_2 ≤ 0 ∧ y_19_2 − y_19_2 ≤ 0 ∧ − y_19_1 + y_19_1 ≤ 0 ∧ y_19_1 − y_19_1 ≤ 0 ∧ − y_19_0 + y_19_0 ≤ 0 ∧ y_19_0 − y_19_0 ≤ 0 ∧ − x_SLAM_f_18_post + x_SLAM_f_18_post ≤ 0 ∧ x_SLAM_f_18_post − x_SLAM_f_18_post ≤ 0 ∧ − x_SLAM_f_18_2 + x_SLAM_f_18_2 ≤ 0 ∧ x_SLAM_f_18_2 − x_SLAM_f_18_2 ≤ 0 ∧ − x_SLAM_f_18_1 + x_SLAM_f_18_1 ≤ 0 ∧ x_SLAM_f_18_1 − x_SLAM_f_18_1 ≤ 0 ∧ − x_SLAM_f_18_0 + x_SLAM_f_18_0 ≤ 0 ∧ x_SLAM_f_18_0 − x_SLAM_f_18_0 ≤ 0 ∧ − x_34_post + x_34_post ≤ 0 ∧ x_34_post − x_34_post ≤ 0 ∧ − x_34_1 + x_34_1 ≤ 0 ∧ x_34_1 − x_34_1 ≤ 0 ∧ − x_34_0 + x_34_0 ≤ 0 ∧ x_34_0 − x_34_0 ≤ 0 ∧ − x_28_post + x_28_post ≤ 0 ∧ x_28_post − x_28_post ≤ 0 ∧ − x_28_1 + x_28_1 ≤ 0 ∧ x_28_1 − x_28_1 ≤ 0 ∧ − x_28_0 + x_28_0 ≤ 0 ∧ x_28_0 − x_28_0 ≤ 0 ∧ − x_238_post + x_238_post ≤ 0 ∧ x_238_post − x_238_post ≤ 0 ∧ − x_238_0 + x_238_0 ≤ 0 ∧ x_238_0 − x_238_0 ≤ 0 ∧ − x_20_post + x_20_post ≤ 0 ∧ x_20_post − x_20_post ≤ 0 ∧ − x_20_2 + x_20_2 ≤ 0 ∧ x_20_2 − x_20_2 ≤ 0 ∧ − x_20_1 + x_20_1 ≤ 0 ∧ x_20_1 − x_20_1 ≤ 0 ∧ − x_20_0 + x_20_0 ≤ 0 ∧ x_20_0 − x_20_0 ≤ 0 ∧ − x_177_post + x_177_post ≤ 0 ∧ x_177_post − x_177_post ≤ 0 ∧ − x_177_0 + x_177_0 ≤ 0 ∧ x_177_0 − x_177_0 ≤ 0 ∧ − x_16_post + x_16_post ≤ 0 ∧ x_16_post − x_16_post ≤ 0 ∧ − x_16_1 + x_16_1 ≤ 0 ∧ x_16_1 − x_16_1 ≤ 0 ∧ − x_16_0 + x_16_0 ≤ 0 ∧ x_16_0 − x_16_0 ≤ 0 ∧ − x_14_post + x_14_post ≤ 0 ∧ x_14_post − x_14_post ≤ 0 ∧ − x_14_0 + x_14_0 ≤ 0 ∧ x_14_0 − x_14_0 ≤ 0 ∧ − tmp_48_post + tmp_48_post ≤ 0 ∧ tmp_48_post − tmp_48_post ≤ 0 ∧ − tmp_48_0 + tmp_48_0 ≤ 0 ∧ tmp_48_0 − tmp_48_0 ≤ 0 ∧ − temp_49_post + temp_49_post ≤ 0 ∧ temp_49_post − temp_49_post ≤ 0 ∧ − temp_49_0 + temp_49_0 ≤ 0 ∧ temp_49_0 − temp_49_0 ≤ 0 ∧ − temp0_45_post + temp0_45_post ≤ 0 ∧ temp0_45_post − temp0_45_post ≤ 0 ∧ − temp0_45_1 + temp0_45_1 ≤ 0 ∧ temp0_45_1 − temp0_45_1 ≤ 0 ∧ − temp0_45_0 + temp0_45_0 ≤ 0 ∧ temp0_45_0 − temp0_45_0 ≤ 0 ∧ − temp0_32_post + temp0_32_post ≤ 0 ∧ temp0_32_post − temp0_32_post ≤ 0 ∧ − temp0_32_4 + temp0_32_4 ≤ 0 ∧ temp0_32_4 − temp0_32_4 ≤ 0 ∧ − temp0_32_3 + temp0_32_3 ≤ 0 ∧ temp0_32_3 − temp0_32_3 ≤ 0 ∧ − temp0_32_2 + temp0_32_2 ≤ 0 ∧ temp0_32_2 − temp0_32_2 ≤ 0 ∧ − temp0_32_1 + temp0_32_1 ≤ 0 ∧ temp0_32_1 − temp0_32_1 ≤ 0 ∧ − temp0_32_0 + temp0_32_0 ≤ 0 ∧ temp0_32_0 − temp0_32_0 ≤ 0 ∧ − temp0_15_0 + temp0_15_0 ≤ 0 ∧ temp0_15_0 − temp0_15_0 ≤ 0 ∧ − t_23_post + t_23_post ≤ 0 ∧ t_23_post − t_23_post ≤ 0 ∧ − t_23_1 + t_23_1 ≤ 0 ∧ t_23_1 − t_23_1 ≤ 0 ∧ − t_23_0 + t_23_0 ≤ 0 ∧ t_23_0 − t_23_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_post + result_dot_printf_sdv_special_RETURN_VALUE_41_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_post − result_dot_printf_sdv_special_RETURN_VALUE_41_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_1 + result_dot_printf_sdv_special_RETURN_VALUE_41_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_1 − result_dot_printf_sdv_special_RETURN_VALUE_41_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_0 + result_dot_printf_sdv_special_RETURN_VALUE_41_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_0 − result_dot_printf_sdv_special_RETURN_VALUE_41_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_post + result_dot_printf_sdv_special_RETURN_VALUE_38_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_post − result_dot_printf_sdv_special_RETURN_VALUE_38_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_1 + result_dot_printf_sdv_special_RETURN_VALUE_38_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_1 − result_dot_printf_sdv_special_RETURN_VALUE_38_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_0 + result_dot_printf_sdv_special_RETURN_VALUE_38_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_0 − result_dot_printf_sdv_special_RETURN_VALUE_38_0 ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_post + result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_post − result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_1 + result_dot_nondet_sdv_special_RETURN_VALUE_13_1 ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_1 − result_dot_nondet_sdv_special_RETURN_VALUE_13_1 ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_0 + result_dot_nondet_sdv_special_RETURN_VALUE_13_0 ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_0 − result_dot_nondet_sdv_special_RETURN_VALUE_13_0 ≤ 0 ∧ − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post + result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post ≤ 0 ∧ result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post ≤ 0 ∧ − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 + result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 ≤ 0 ∧ result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 ≤ 0 ∧ − result_11_post + result_11_post ≤ 0 ∧ result_11_post − result_11_post ≤ 0 ∧ − result_11_6 + result_11_6 ≤ 0 ∧ result_11_6 − result_11_6 ≤ 0 ∧ − result_11_5 + result_11_5 ≤ 0 ∧ result_11_5 − result_11_5 ≤ 0 ∧ − result_11_4 + result_11_4 ≤ 0 ∧ result_11_4 − result_11_4 ≤ 0 ∧ − result_11_3 + result_11_3 ≤ 0 ∧ result_11_3 − result_11_3 ≤ 0 ∧ − result_11_2 + result_11_2 ≤ 0 ∧ result_11_2 − result_11_2 ≤ 0 ∧ − result_11_1 + result_11_1 ≤ 0 ∧ result_11_1 − result_11_1 ≤ 0 ∧ − result_11_0 + result_11_0 ≤ 0 ∧ result_11_0 − result_11_0 ≤ 0 ∧ − rcd_72_post + rcd_72_post ≤ 0 ∧ rcd_72_post − rcd_72_post ≤ 0 ∧ − rcd_72_0 + rcd_72_0 ≤ 0 ∧ rcd_72_0 − rcd_72_0 ≤ 0 ∧ − rcd_102_post + rcd_102_post ≤ 0 ∧ rcd_102_post − rcd_102_post ≤ 0 ∧ − rcd_102_0 + rcd_102_0 ≤ 0 ∧ rcd_102_0 − rcd_102_0 ≤ 0 ∧ − r_53_post + r_53_post ≤ 0 ∧ r_53_post − r_53_post ≤ 0 ∧ − r_53_0 + r_53_0 ≤ 0 ∧ r_53_0 − r_53_0 ≤ 0 ∧ − r_161_post + r_161_post ≤ 0 ∧ r_161_post − r_161_post ≤ 0 ∧ − r_161_0 + r_161_0 ≤ 0 ∧ r_161_0 − r_161_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 ≤ 0 ∧ − nondet_12_post + nondet_12_post ≤ 0 ∧ nondet_12_post − nondet_12_post ≤ 0 ∧ − nondet_12_1 + nondet_12_1 ≤ 0 ∧ nondet_12_1 − nondet_12_1 ≤ 0 ∧ − nondet_12_0 + nondet_12_0 ≤ 0 ∧ nondet_12_0 − nondet_12_0 ≤ 0 ∧ − lt_37_post + lt_37_post ≤ 0 ∧ lt_37_post − lt_37_post ≤ 0 ∧ − lt_37_1 + lt_37_1 ≤ 0 ∧ lt_37_1 − lt_37_1 ≤ 0 ∧ − lt_37_0 + lt_37_0 ≤ 0 ∧ lt_37_0 − lt_37_0 ≤ 0 ∧ − lt_36_post + lt_36_post ≤ 0 ∧ lt_36_post − lt_36_post ≤ 0 ∧ − lt_36_0 + lt_36_0 ≤ 0 ∧ lt_36_0 − lt_36_0 ≤ 0 ∧ − lt_237_post + lt_237_post ≤ 0 ∧ lt_237_post − lt_237_post ≤ 0 ∧ − lt_237_0 + lt_237_0 ≤ 0 ∧ lt_237_0 − lt_237_0 ≤ 0 ∧ − length_43_post + length_43_post ≤ 0 ∧ length_43_post − length_43_post ≤ 0 ∧ − length_43_0 + length_43_0 ≤ 0 ∧ length_43_0 − length_43_0 ≤ 0 ∧ − len_246_post + len_246_post ≤ 0 ∧ len_246_post − len_246_post ≤ 0 ∧ − len_246_0 + len_246_0 ≤ 0 ∧ len_246_0 − len_246_0 ≤ 0 ∧ − len_180_post + len_180_post ≤ 0 ∧ len_180_post − len_180_post ≤ 0 ∧ − len_180_0 + len_180_0 ≤ 0 ∧ len_180_0 − len_180_0 ≤ 0 ∧ − i_44_post + i_44_post ≤ 0 ∧ i_44_post − i_44_post ≤ 0 ∧ − i_44_0 + i_44_0 ≤ 0 ∧ i_44_0 − i_44_0 ≤ 0 ∧ − i_125_post + i_125_post ≤ 0 ∧ i_125_post − i_125_post ≤ 0 ∧ − i_125_0 + i_125_0 ≤ 0 ∧ i_125_0 − i_125_0 ≤ 0 ∧ − i_108_post + i_108_post ≤ 0 ∧ i_108_post − i_108_post ≤ 0 ∧ − i_108_0 + i_108_0 ≤ 0 ∧ i_108_0 − i_108_0 ≤ 0 ∧ − head_46_post + head_46_post ≤ 0 ∧ head_46_post − head_46_post ≤ 0 ∧ − head_46_0 + head_46_0 ≤ 0 ∧ head_46_0 − head_46_0 ≤ 0 ∧ − fmt_31_post + fmt_31_post ≤ 0 ∧ fmt_31_post − fmt_31_post ≤ 0 ∧ − fmt_31_4 + fmt_31_4 ≤ 0 ∧ fmt_31_4 − fmt_31_4 ≤ 0 ∧ − fmt_31_3 + fmt_31_3 ≤ 0 ∧ fmt_31_3 − fmt_31_3 ≤ 0 ∧ − fmt_31_2 + fmt_31_2 ≤ 0 ∧ fmt_31_2 − fmt_31_2 ≤ 0 ∧ − fmt_31_1 + fmt_31_1 ≤ 0 ∧ fmt_31_1 − fmt_31_1 ≤ 0 ∧ − fmt_31_0 + fmt_31_0 ≤ 0 ∧ fmt_31_0 − fmt_31_0 ≤ 0 ∧ − ct_17_post + ct_17_post ≤ 0 ∧ ct_17_post − ct_17_post ≤ 0 ∧ − ct_17_2 + ct_17_2 ≤ 0 ∧ ct_17_2 − ct_17_2 ≤ 0 ∧ − ct_17_1 + ct_17_1 ≤ 0 ∧ ct_17_1 − ct_17_1 ≤ 0 ∧ − ct_17_0 + ct_17_0 ≤ 0 ∧ ct_17_0 − ct_17_0 ≤ 0 ∧ − a_328_post + a_328_post ≤ 0 ∧ a_328_post − a_328_post ≤ 0 ∧ − a_328_0 + a_328_0 ≤ 0 ∧ a_328_0 − a_328_0 ≤ 0 ∧ − a_305_post + a_305_post ≤ 0 ∧ a_305_post − a_305_post ≤ 0 ∧ − a_305_0 + a_305_0 ≤ 0 ∧ a_305_0 − a_305_0 ≤ 0 ∧ − a_283_post + a_283_post ≤ 0 ∧ a_283_post − a_283_post ≤ 0 ∧ − a_283_0 + a_283_0 ≤ 0 ∧ a_283_0 − a_283_0 ≤ 0 ∧ − a_26_post + a_26_post ≤ 0 ∧ a_26_post − a_26_post ≤ 0 ∧ − a_26_1 + a_26_1 ≤ 0 ∧ a_26_1 − a_26_1 ≤ 0 ∧ − a_26_0 + a_26_0 ≤ 0 ∧ a_26_0 − a_26_0 ≤ 0 ∧ − a_247_post + a_247_post ≤ 0 ∧ a_247_post − a_247_post ≤ 0 ∧ − a_247_0 + a_247_0 ≤ 0 ∧ a_247_0 − a_247_0 ≤ 0 ∧ − a_197_post + a_197_post ≤ 0 ∧ a_197_post − a_197_post ≤ 0 ∧ − a_197_0 + a_197_0 ≤ 0 ∧ a_197_0 − a_197_0 ≤ 0 ∧ − a_146_0 + a_146_0 ≤ 0 ∧ a_146_0 − a_146_0 ≤ 0 | |
| 26 | 36 | 27: | 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 1 − result_dot_nondet_sdv_special_RETURN_VALUE_13_0 ≤ 0 ∧ −1 + result_dot_nondet_sdv_special_RETURN_VALUE_13_0 ≤ 0 ∧ ct_17_0 − ct_17_post ≤ 0 ∧ − ct_17_0 + ct_17_post ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_0 − result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_0 + result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ x_14_0 − x_14_post ≤ 0 ∧ − x_14_0 + x_14_post ≤ 0 ∧ x_16_0 − x_16_post ≤ 0 ∧ − x_16_0 + x_16_post ≤ 0 ∧ x_SLAM_f_18_0 − x_SLAM_f_18_post ≤ 0 ∧ − x_SLAM_f_18_0 + x_SLAM_f_18_post ≤ 0 ∧ − y_19_post + y_19_post ≤ 0 ∧ y_19_post − y_19_post ≤ 0 ∧ − y_19_2 + y_19_2 ≤ 0 ∧ y_19_2 − y_19_2 ≤ 0 ∧ − y_19_1 + y_19_1 ≤ 0 ∧ y_19_1 − y_19_1 ≤ 0 ∧ − y_19_0 + y_19_0 ≤ 0 ∧ y_19_0 − y_19_0 ≤ 0 ∧ − x_SLAM_f_18_2 + x_SLAM_f_18_2 ≤ 0 ∧ x_SLAM_f_18_2 − x_SLAM_f_18_2 ≤ 0 ∧ − x_SLAM_f_18_1 + x_SLAM_f_18_1 ≤ 0 ∧ x_SLAM_f_18_1 − x_SLAM_f_18_1 ≤ 0 ∧ − x_34_post + x_34_post ≤ 0 ∧ x_34_post − x_34_post ≤ 0 ∧ − x_34_1 + x_34_1 ≤ 0 ∧ x_34_1 − x_34_1 ≤ 0 ∧ − x_34_0 + x_34_0 ≤ 0 ∧ x_34_0 − x_34_0 ≤ 0 ∧ − x_28_post + x_28_post ≤ 0 ∧ x_28_post − x_28_post ≤ 0 ∧ − x_28_1 + x_28_1 ≤ 0 ∧ x_28_1 − x_28_1 ≤ 0 ∧ − x_28_0 + x_28_0 ≤ 0 ∧ x_28_0 − x_28_0 ≤ 0 ∧ − x_238_post + x_238_post ≤ 0 ∧ x_238_post − x_238_post ≤ 0 ∧ − x_238_0 + x_238_0 ≤ 0 ∧ x_238_0 − x_238_0 ≤ 0 ∧ − x_20_post + x_20_post ≤ 0 ∧ x_20_post − x_20_post ≤ 0 ∧ − x_20_2 + x_20_2 ≤ 0 ∧ x_20_2 − x_20_2 ≤ 0 ∧ − x_20_1 + x_20_1 ≤ 0 ∧ x_20_1 − x_20_1 ≤ 0 ∧ − x_20_0 + x_20_0 ≤ 0 ∧ x_20_0 − x_20_0 ≤ 0 ∧ − x_177_post + x_177_post ≤ 0 ∧ x_177_post − x_177_post ≤ 0 ∧ − x_177_0 + x_177_0 ≤ 0 ∧ x_177_0 − x_177_0 ≤ 0 ∧ − x_16_1 + x_16_1 ≤ 0 ∧ x_16_1 − x_16_1 ≤ 0 ∧ − tmp_48_post + tmp_48_post ≤ 0 ∧ tmp_48_post − tmp_48_post ≤ 0 ∧ − tmp_48_0 + tmp_48_0 ≤ 0 ∧ tmp_48_0 − tmp_48_0 ≤ 0 ∧ − temp_49_post + temp_49_post ≤ 0 ∧ temp_49_post − temp_49_post ≤ 0 ∧ − temp_49_0 + temp_49_0 ≤ 0 ∧ temp_49_0 − temp_49_0 ≤ 0 ∧ − temp0_45_post + temp0_45_post ≤ 0 ∧ temp0_45_post − temp0_45_post ≤ 0 ∧ − temp0_45_1 + temp0_45_1 ≤ 0 ∧ temp0_45_1 − temp0_45_1 ≤ 0 ∧ − temp0_45_0 + temp0_45_0 ≤ 0 ∧ temp0_45_0 − temp0_45_0 ≤ 0 ∧ − temp0_32_post + temp0_32_post ≤ 0 ∧ temp0_32_post − temp0_32_post ≤ 0 ∧ − temp0_32_4 + temp0_32_4 ≤ 0 ∧ temp0_32_4 − temp0_32_4 ≤ 0 ∧ − temp0_32_3 + temp0_32_3 ≤ 0 ∧ temp0_32_3 − temp0_32_3 ≤ 0 ∧ − temp0_32_2 + temp0_32_2 ≤ 0 ∧ temp0_32_2 − temp0_32_2 ≤ 0 ∧ − temp0_32_1 + temp0_32_1 ≤ 0 ∧ temp0_32_1 − temp0_32_1 ≤ 0 ∧ − temp0_32_0 + temp0_32_0 ≤ 0 ∧ temp0_32_0 − temp0_32_0 ≤ 0 ∧ − temp0_15_0 + temp0_15_0 ≤ 0 ∧ temp0_15_0 − temp0_15_0 ≤ 0 ∧ − t_23_post + t_23_post ≤ 0 ∧ t_23_post − t_23_post ≤ 0 ∧ − t_23_1 + t_23_1 ≤ 0 ∧ t_23_1 − t_23_1 ≤ 0 ∧ − t_23_0 + t_23_0 ≤ 0 ∧ t_23_0 − t_23_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_post + result_dot_printf_sdv_special_RETURN_VALUE_41_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_post − result_dot_printf_sdv_special_RETURN_VALUE_41_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_1 + result_dot_printf_sdv_special_RETURN_VALUE_41_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_1 − result_dot_printf_sdv_special_RETURN_VALUE_41_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_0 + result_dot_printf_sdv_special_RETURN_VALUE_41_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_0 − result_dot_printf_sdv_special_RETURN_VALUE_41_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_post + result_dot_printf_sdv_special_RETURN_VALUE_38_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_post − result_dot_printf_sdv_special_RETURN_VALUE_38_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_1 + result_dot_printf_sdv_special_RETURN_VALUE_38_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_1 − result_dot_printf_sdv_special_RETURN_VALUE_38_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_0 + result_dot_printf_sdv_special_RETURN_VALUE_38_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_0 − result_dot_printf_sdv_special_RETURN_VALUE_38_0 ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_1 + result_dot_nondet_sdv_special_RETURN_VALUE_13_1 ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_1 − result_dot_nondet_sdv_special_RETURN_VALUE_13_1 ≤ 0 ∧ − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post + result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post ≤ 0 ∧ result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post ≤ 0 ∧ − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 + result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 ≤ 0 ∧ result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 ≤ 0 ∧ − result_11_post + result_11_post ≤ 0 ∧ result_11_post − result_11_post ≤ 0 ∧ − result_11_6 + result_11_6 ≤ 0 ∧ result_11_6 − result_11_6 ≤ 0 ∧ − result_11_5 + result_11_5 ≤ 0 ∧ result_11_5 − result_11_5 ≤ 0 ∧ − result_11_4 + result_11_4 ≤ 0 ∧ result_11_4 − result_11_4 ≤ 0 ∧ − result_11_3 + result_11_3 ≤ 0 ∧ result_11_3 − result_11_3 ≤ 0 ∧ − result_11_2 + result_11_2 ≤ 0 ∧ result_11_2 − result_11_2 ≤ 0 ∧ − result_11_1 + result_11_1 ≤ 0 ∧ result_11_1 − result_11_1 ≤ 0 ∧ − result_11_0 + result_11_0 ≤ 0 ∧ result_11_0 − result_11_0 ≤ 0 ∧ − rcd_72_post + rcd_72_post ≤ 0 ∧ rcd_72_post − rcd_72_post ≤ 0 ∧ − rcd_72_0 + rcd_72_0 ≤ 0 ∧ rcd_72_0 − rcd_72_0 ≤ 0 ∧ − rcd_102_post + rcd_102_post ≤ 0 ∧ rcd_102_post − rcd_102_post ≤ 0 ∧ − rcd_102_0 + rcd_102_0 ≤ 0 ∧ rcd_102_0 − rcd_102_0 ≤ 0 ∧ − r_53_post + r_53_post ≤ 0 ∧ r_53_post − r_53_post ≤ 0 ∧ − r_53_0 + r_53_0 ≤ 0 ∧ r_53_0 − r_53_0 ≤ 0 ∧ − r_161_post + r_161_post ≤ 0 ∧ r_161_post − r_161_post ≤ 0 ∧ − r_161_0 + r_161_0 ≤ 0 ∧ r_161_0 − r_161_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 ≤ 0 ∧ − nondet_12_post + nondet_12_post ≤ 0 ∧ nondet_12_post − nondet_12_post ≤ 0 ∧ − nondet_12_1 + nondet_12_1 ≤ 0 ∧ nondet_12_1 − nondet_12_1 ≤ 0 ∧ − nondet_12_0 + nondet_12_0 ≤ 0 ∧ nondet_12_0 − nondet_12_0 ≤ 0 ∧ − lt_37_post + lt_37_post ≤ 0 ∧ lt_37_post − lt_37_post ≤ 0 ∧ − lt_37_1 + lt_37_1 ≤ 0 ∧ lt_37_1 − lt_37_1 ≤ 0 ∧ − lt_37_0 + lt_37_0 ≤ 0 ∧ lt_37_0 − lt_37_0 ≤ 0 ∧ − lt_36_post + lt_36_post ≤ 0 ∧ lt_36_post − lt_36_post ≤ 0 ∧ − lt_36_0 + lt_36_0 ≤ 0 ∧ lt_36_0 − lt_36_0 ≤ 0 ∧ − lt_237_post + lt_237_post ≤ 0 ∧ lt_237_post − lt_237_post ≤ 0 ∧ − lt_237_0 + lt_237_0 ≤ 0 ∧ lt_237_0 − lt_237_0 ≤ 0 ∧ − length_43_post + length_43_post ≤ 0 ∧ length_43_post − length_43_post ≤ 0 ∧ − length_43_0 + length_43_0 ≤ 0 ∧ length_43_0 − length_43_0 ≤ 0 ∧ − len_246_post + len_246_post ≤ 0 ∧ len_246_post − len_246_post ≤ 0 ∧ − len_246_0 + len_246_0 ≤ 0 ∧ len_246_0 − len_246_0 ≤ 0 ∧ − len_180_post + len_180_post ≤ 0 ∧ len_180_post − len_180_post ≤ 0 ∧ − len_180_0 + len_180_0 ≤ 0 ∧ len_180_0 − len_180_0 ≤ 0 ∧ − i_44_post + i_44_post ≤ 0 ∧ i_44_post − i_44_post ≤ 0 ∧ − i_44_0 + i_44_0 ≤ 0 ∧ i_44_0 − i_44_0 ≤ 0 ∧ − i_125_post + i_125_post ≤ 0 ∧ i_125_post − i_125_post ≤ 0 ∧ − i_125_0 + i_125_0 ≤ 0 ∧ i_125_0 − i_125_0 ≤ 0 ∧ − i_108_post + i_108_post ≤ 0 ∧ i_108_post − i_108_post ≤ 0 ∧ − i_108_0 + i_108_0 ≤ 0 ∧ i_108_0 − i_108_0 ≤ 0 ∧ − head_46_post + head_46_post ≤ 0 ∧ head_46_post − head_46_post ≤ 0 ∧ − head_46_0 + head_46_0 ≤ 0 ∧ head_46_0 − head_46_0 ≤ 0 ∧ − fmt_31_post + fmt_31_post ≤ 0 ∧ fmt_31_post − fmt_31_post ≤ 0 ∧ − fmt_31_4 + fmt_31_4 ≤ 0 ∧ fmt_31_4 − fmt_31_4 ≤ 0 ∧ − fmt_31_3 + fmt_31_3 ≤ 0 ∧ fmt_31_3 − fmt_31_3 ≤ 0 ∧ − fmt_31_2 + fmt_31_2 ≤ 0 ∧ fmt_31_2 − fmt_31_2 ≤ 0 ∧ − fmt_31_1 + fmt_31_1 ≤ 0 ∧ fmt_31_1 − fmt_31_1 ≤ 0 ∧ − fmt_31_0 + fmt_31_0 ≤ 0 ∧ fmt_31_0 − fmt_31_0 ≤ 0 ∧ − ct_17_2 + ct_17_2 ≤ 0 ∧ ct_17_2 − ct_17_2 ≤ 0 ∧ − ct_17_1 + ct_17_1 ≤ 0 ∧ ct_17_1 − ct_17_1 ≤ 0 ∧ − a_328_post + a_328_post ≤ 0 ∧ a_328_post − a_328_post ≤ 0 ∧ − a_328_0 + a_328_0 ≤ 0 ∧ a_328_0 − a_328_0 ≤ 0 ∧ − a_305_post + a_305_post ≤ 0 ∧ a_305_post − a_305_post ≤ 0 ∧ − a_305_0 + a_305_0 ≤ 0 ∧ a_305_0 − a_305_0 ≤ 0 ∧ − a_283_post + a_283_post ≤ 0 ∧ a_283_post − a_283_post ≤ 0 ∧ − a_283_0 + a_283_0 ≤ 0 ∧ a_283_0 − a_283_0 ≤ 0 ∧ − a_26_post + a_26_post ≤ 0 ∧ a_26_post − a_26_post ≤ 0 ∧ − a_26_1 + a_26_1 ≤ 0 ∧ a_26_1 − a_26_1 ≤ 0 ∧ − a_26_0 + a_26_0 ≤ 0 ∧ a_26_0 − a_26_0 ≤ 0 ∧ − a_247_post + a_247_post ≤ 0 ∧ a_247_post − a_247_post ≤ 0 ∧ − a_247_0 + a_247_0 ≤ 0 ∧ a_247_0 − a_247_0 ≤ 0 ∧ − a_197_post + a_197_post ≤ 0 ∧ a_197_post − a_197_post ≤ 0 ∧ − a_197_0 + a_197_0 ≤ 0 ∧ a_197_0 − a_197_0 ≤ 0 ∧ − a_146_0 + a_146_0 ≤ 0 ∧ a_146_0 − a_146_0 ≤ 0 | |
| 27 | 37 | 28: | 1 − x_20_0 + y_19_0 ≤ 0 ∧ − y_19_post + y_19_post ≤ 0 ∧ y_19_post − y_19_post ≤ 0 ∧ − y_19_2 + y_19_2 ≤ 0 ∧ y_19_2 − y_19_2 ≤ 0 ∧ − y_19_1 + y_19_1 ≤ 0 ∧ y_19_1 − y_19_1 ≤ 0 ∧ − y_19_0 + y_19_0 ≤ 0 ∧ y_19_0 − y_19_0 ≤ 0 ∧ − x_SLAM_f_18_post + x_SLAM_f_18_post ≤ 0 ∧ x_SLAM_f_18_post − x_SLAM_f_18_post ≤ 0 ∧ − x_SLAM_f_18_2 + x_SLAM_f_18_2 ≤ 0 ∧ x_SLAM_f_18_2 − x_SLAM_f_18_2 ≤ 0 ∧ − x_SLAM_f_18_1 + x_SLAM_f_18_1 ≤ 0 ∧ x_SLAM_f_18_1 − x_SLAM_f_18_1 ≤ 0 ∧ − x_SLAM_f_18_0 + x_SLAM_f_18_0 ≤ 0 ∧ x_SLAM_f_18_0 − x_SLAM_f_18_0 ≤ 0 ∧ − x_34_post + x_34_post ≤ 0 ∧ x_34_post − x_34_post ≤ 0 ∧ − x_34_1 + x_34_1 ≤ 0 ∧ x_34_1 − x_34_1 ≤ 0 ∧ − x_34_0 + x_34_0 ≤ 0 ∧ x_34_0 − x_34_0 ≤ 0 ∧ − x_28_post + x_28_post ≤ 0 ∧ x_28_post − x_28_post ≤ 0 ∧ − x_28_1 + x_28_1 ≤ 0 ∧ x_28_1 − x_28_1 ≤ 0 ∧ − x_28_0 + x_28_0 ≤ 0 ∧ x_28_0 − x_28_0 ≤ 0 ∧ − x_238_post + x_238_post ≤ 0 ∧ x_238_post − x_238_post ≤ 0 ∧ − x_238_0 + x_238_0 ≤ 0 ∧ x_238_0 − x_238_0 ≤ 0 ∧ − x_20_post + x_20_post ≤ 0 ∧ x_20_post − x_20_post ≤ 0 ∧ − x_20_2 + x_20_2 ≤ 0 ∧ x_20_2 − x_20_2 ≤ 0 ∧ − x_20_1 + x_20_1 ≤ 0 ∧ x_20_1 − x_20_1 ≤ 0 ∧ − x_20_0 + x_20_0 ≤ 0 ∧ x_20_0 − x_20_0 ≤ 0 ∧ − x_177_post + x_177_post ≤ 0 ∧ x_177_post − x_177_post ≤ 0 ∧ − x_177_0 + x_177_0 ≤ 0 ∧ x_177_0 − x_177_0 ≤ 0 ∧ − x_16_post + x_16_post ≤ 0 ∧ x_16_post − x_16_post ≤ 0 ∧ − x_16_1 + x_16_1 ≤ 0 ∧ x_16_1 − x_16_1 ≤ 0 ∧ − x_16_0 + x_16_0 ≤ 0 ∧ x_16_0 − x_16_0 ≤ 0 ∧ − x_14_post + x_14_post ≤ 0 ∧ x_14_post − x_14_post ≤ 0 ∧ − x_14_0 + x_14_0 ≤ 0 ∧ x_14_0 − x_14_0 ≤ 0 ∧ − tmp_48_post + tmp_48_post ≤ 0 ∧ tmp_48_post − tmp_48_post ≤ 0 ∧ − tmp_48_0 + tmp_48_0 ≤ 0 ∧ tmp_48_0 − tmp_48_0 ≤ 0 ∧ − temp_49_post + temp_49_post ≤ 0 ∧ temp_49_post − temp_49_post ≤ 0 ∧ − temp_49_0 + temp_49_0 ≤ 0 ∧ temp_49_0 − temp_49_0 ≤ 0 ∧ − temp0_45_post + temp0_45_post ≤ 0 ∧ temp0_45_post − temp0_45_post ≤ 0 ∧ − temp0_45_1 + temp0_45_1 ≤ 0 ∧ temp0_45_1 − temp0_45_1 ≤ 0 ∧ − temp0_45_0 + temp0_45_0 ≤ 0 ∧ temp0_45_0 − temp0_45_0 ≤ 0 ∧ − temp0_32_post + temp0_32_post ≤ 0 ∧ temp0_32_post − temp0_32_post ≤ 0 ∧ − temp0_32_4 + temp0_32_4 ≤ 0 ∧ temp0_32_4 − temp0_32_4 ≤ 0 ∧ − temp0_32_3 + temp0_32_3 ≤ 0 ∧ temp0_32_3 − temp0_32_3 ≤ 0 ∧ − temp0_32_2 + temp0_32_2 ≤ 0 ∧ temp0_32_2 − temp0_32_2 ≤ 0 ∧ − temp0_32_1 + temp0_32_1 ≤ 0 ∧ temp0_32_1 − temp0_32_1 ≤ 0 ∧ − temp0_32_0 + temp0_32_0 ≤ 0 ∧ temp0_32_0 − temp0_32_0 ≤ 0 ∧ − temp0_15_0 + temp0_15_0 ≤ 0 ∧ temp0_15_0 − temp0_15_0 ≤ 0 ∧ − t_23_post + t_23_post ≤ 0 ∧ t_23_post − t_23_post ≤ 0 ∧ − t_23_1 + t_23_1 ≤ 0 ∧ t_23_1 − t_23_1 ≤ 0 ∧ − t_23_0 + t_23_0 ≤ 0 ∧ t_23_0 − t_23_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_post + result_dot_printf_sdv_special_RETURN_VALUE_41_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_post − result_dot_printf_sdv_special_RETURN_VALUE_41_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_1 + result_dot_printf_sdv_special_RETURN_VALUE_41_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_1 − result_dot_printf_sdv_special_RETURN_VALUE_41_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_0 + result_dot_printf_sdv_special_RETURN_VALUE_41_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_0 − result_dot_printf_sdv_special_RETURN_VALUE_41_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_post + result_dot_printf_sdv_special_RETURN_VALUE_38_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_post − result_dot_printf_sdv_special_RETURN_VALUE_38_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_1 + result_dot_printf_sdv_special_RETURN_VALUE_38_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_1 − result_dot_printf_sdv_special_RETURN_VALUE_38_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_0 + result_dot_printf_sdv_special_RETURN_VALUE_38_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_0 − result_dot_printf_sdv_special_RETURN_VALUE_38_0 ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_post + result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_post − result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_1 + result_dot_nondet_sdv_special_RETURN_VALUE_13_1 ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_1 − result_dot_nondet_sdv_special_RETURN_VALUE_13_1 ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_0 + result_dot_nondet_sdv_special_RETURN_VALUE_13_0 ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_0 − result_dot_nondet_sdv_special_RETURN_VALUE_13_0 ≤ 0 ∧ − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post + result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post ≤ 0 ∧ result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post ≤ 0 ∧ − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 + result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 ≤ 0 ∧ result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 ≤ 0 ∧ − result_11_post + result_11_post ≤ 0 ∧ result_11_post − result_11_post ≤ 0 ∧ − result_11_6 + result_11_6 ≤ 0 ∧ result_11_6 − result_11_6 ≤ 0 ∧ − result_11_5 + result_11_5 ≤ 0 ∧ result_11_5 − result_11_5 ≤ 0 ∧ − result_11_4 + result_11_4 ≤ 0 ∧ result_11_4 − result_11_4 ≤ 0 ∧ − result_11_3 + result_11_3 ≤ 0 ∧ result_11_3 − result_11_3 ≤ 0 ∧ − result_11_2 + result_11_2 ≤ 0 ∧ result_11_2 − result_11_2 ≤ 0 ∧ − result_11_1 + result_11_1 ≤ 0 ∧ result_11_1 − result_11_1 ≤ 0 ∧ − result_11_0 + result_11_0 ≤ 0 ∧ result_11_0 − result_11_0 ≤ 0 ∧ − rcd_72_post + rcd_72_post ≤ 0 ∧ rcd_72_post − rcd_72_post ≤ 0 ∧ − rcd_72_0 + rcd_72_0 ≤ 0 ∧ rcd_72_0 − rcd_72_0 ≤ 0 ∧ − rcd_102_post + rcd_102_post ≤ 0 ∧ rcd_102_post − rcd_102_post ≤ 0 ∧ − rcd_102_0 + rcd_102_0 ≤ 0 ∧ rcd_102_0 − rcd_102_0 ≤ 0 ∧ − r_53_post + r_53_post ≤ 0 ∧ r_53_post − r_53_post ≤ 0 ∧ − r_53_0 + r_53_0 ≤ 0 ∧ r_53_0 − r_53_0 ≤ 0 ∧ − r_161_post + r_161_post ≤ 0 ∧ r_161_post − r_161_post ≤ 0 ∧ − r_161_0 + r_161_0 ≤ 0 ∧ r_161_0 − r_161_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 ≤ 0 ∧ − nondet_12_post + nondet_12_post ≤ 0 ∧ nondet_12_post − nondet_12_post ≤ 0 ∧ − nondet_12_1 + nondet_12_1 ≤ 0 ∧ nondet_12_1 − nondet_12_1 ≤ 0 ∧ − nondet_12_0 + nondet_12_0 ≤ 0 ∧ nondet_12_0 − nondet_12_0 ≤ 0 ∧ − lt_37_post + lt_37_post ≤ 0 ∧ lt_37_post − lt_37_post ≤ 0 ∧ − lt_37_1 + lt_37_1 ≤ 0 ∧ lt_37_1 − lt_37_1 ≤ 0 ∧ − lt_37_0 + lt_37_0 ≤ 0 ∧ lt_37_0 − lt_37_0 ≤ 0 ∧ − lt_36_post + lt_36_post ≤ 0 ∧ lt_36_post − lt_36_post ≤ 0 ∧ − lt_36_0 + lt_36_0 ≤ 0 ∧ lt_36_0 − lt_36_0 ≤ 0 ∧ − lt_237_post + lt_237_post ≤ 0 ∧ lt_237_post − lt_237_post ≤ 0 ∧ − lt_237_0 + lt_237_0 ≤ 0 ∧ lt_237_0 − lt_237_0 ≤ 0 ∧ − length_43_post + length_43_post ≤ 0 ∧ length_43_post − length_43_post ≤ 0 ∧ − length_43_0 + length_43_0 ≤ 0 ∧ length_43_0 − length_43_0 ≤ 0 ∧ − len_246_post + len_246_post ≤ 0 ∧ len_246_post − len_246_post ≤ 0 ∧ − len_246_0 + len_246_0 ≤ 0 ∧ len_246_0 − len_246_0 ≤ 0 ∧ − len_180_post + len_180_post ≤ 0 ∧ len_180_post − len_180_post ≤ 0 ∧ − len_180_0 + len_180_0 ≤ 0 ∧ len_180_0 − len_180_0 ≤ 0 ∧ − i_44_post + i_44_post ≤ 0 ∧ i_44_post − i_44_post ≤ 0 ∧ − i_44_0 + i_44_0 ≤ 0 ∧ i_44_0 − i_44_0 ≤ 0 ∧ − i_125_post + i_125_post ≤ 0 ∧ i_125_post − i_125_post ≤ 0 ∧ − i_125_0 + i_125_0 ≤ 0 ∧ i_125_0 − i_125_0 ≤ 0 ∧ − i_108_post + i_108_post ≤ 0 ∧ i_108_post − i_108_post ≤ 0 ∧ − i_108_0 + i_108_0 ≤ 0 ∧ i_108_0 − i_108_0 ≤ 0 ∧ − head_46_post + head_46_post ≤ 0 ∧ head_46_post − head_46_post ≤ 0 ∧ − head_46_0 + head_46_0 ≤ 0 ∧ head_46_0 − head_46_0 ≤ 0 ∧ − fmt_31_post + fmt_31_post ≤ 0 ∧ fmt_31_post − fmt_31_post ≤ 0 ∧ − fmt_31_4 + fmt_31_4 ≤ 0 ∧ fmt_31_4 − fmt_31_4 ≤ 0 ∧ − fmt_31_3 + fmt_31_3 ≤ 0 ∧ fmt_31_3 − fmt_31_3 ≤ 0 ∧ − fmt_31_2 + fmt_31_2 ≤ 0 ∧ fmt_31_2 − fmt_31_2 ≤ 0 ∧ − fmt_31_1 + fmt_31_1 ≤ 0 ∧ fmt_31_1 − fmt_31_1 ≤ 0 ∧ − fmt_31_0 + fmt_31_0 ≤ 0 ∧ fmt_31_0 − fmt_31_0 ≤ 0 ∧ − ct_17_post + ct_17_post ≤ 0 ∧ ct_17_post − ct_17_post ≤ 0 ∧ − ct_17_2 + ct_17_2 ≤ 0 ∧ ct_17_2 − ct_17_2 ≤ 0 ∧ − ct_17_1 + ct_17_1 ≤ 0 ∧ ct_17_1 − ct_17_1 ≤ 0 ∧ − ct_17_0 + ct_17_0 ≤ 0 ∧ ct_17_0 − ct_17_0 ≤ 0 ∧ − a_328_post + a_328_post ≤ 0 ∧ a_328_post − a_328_post ≤ 0 ∧ − a_328_0 + a_328_0 ≤ 0 ∧ a_328_0 − a_328_0 ≤ 0 ∧ − a_305_post + a_305_post ≤ 0 ∧ a_305_post − a_305_post ≤ 0 ∧ − a_305_0 + a_305_0 ≤ 0 ∧ a_305_0 − a_305_0 ≤ 0 ∧ − a_283_post + a_283_post ≤ 0 ∧ a_283_post − a_283_post ≤ 0 ∧ − a_283_0 + a_283_0 ≤ 0 ∧ a_283_0 − a_283_0 ≤ 0 ∧ − a_26_post + a_26_post ≤ 0 ∧ a_26_post − a_26_post ≤ 0 ∧ − a_26_1 + a_26_1 ≤ 0 ∧ a_26_1 − a_26_1 ≤ 0 ∧ − a_26_0 + a_26_0 ≤ 0 ∧ a_26_0 − a_26_0 ≤ 0 ∧ − a_247_post + a_247_post ≤ 0 ∧ a_247_post − a_247_post ≤ 0 ∧ − a_247_0 + a_247_0 ≤ 0 ∧ a_247_0 − a_247_0 ≤ 0 ∧ − a_197_post + a_197_post ≤ 0 ∧ a_197_post − a_197_post ≤ 0 ∧ − a_197_0 + a_197_0 ≤ 0 ∧ a_197_0 − a_197_0 ≤ 0 ∧ − a_146_0 + a_146_0 ≤ 0 ∧ a_146_0 − a_146_0 ≤ 0 | |
| 27 | 38 | 28: | 1 + x_20_0 − y_19_0 ≤ 0 ∧ − y_19_post + y_19_post ≤ 0 ∧ y_19_post − y_19_post ≤ 0 ∧ − y_19_2 + y_19_2 ≤ 0 ∧ y_19_2 − y_19_2 ≤ 0 ∧ − y_19_1 + y_19_1 ≤ 0 ∧ y_19_1 − y_19_1 ≤ 0 ∧ − y_19_0 + y_19_0 ≤ 0 ∧ y_19_0 − y_19_0 ≤ 0 ∧ − x_SLAM_f_18_post + x_SLAM_f_18_post ≤ 0 ∧ x_SLAM_f_18_post − x_SLAM_f_18_post ≤ 0 ∧ − x_SLAM_f_18_2 + x_SLAM_f_18_2 ≤ 0 ∧ x_SLAM_f_18_2 − x_SLAM_f_18_2 ≤ 0 ∧ − x_SLAM_f_18_1 + x_SLAM_f_18_1 ≤ 0 ∧ x_SLAM_f_18_1 − x_SLAM_f_18_1 ≤ 0 ∧ − x_SLAM_f_18_0 + x_SLAM_f_18_0 ≤ 0 ∧ x_SLAM_f_18_0 − x_SLAM_f_18_0 ≤ 0 ∧ − x_34_post + x_34_post ≤ 0 ∧ x_34_post − x_34_post ≤ 0 ∧ − x_34_1 + x_34_1 ≤ 0 ∧ x_34_1 − x_34_1 ≤ 0 ∧ − x_34_0 + x_34_0 ≤ 0 ∧ x_34_0 − x_34_0 ≤ 0 ∧ − x_28_post + x_28_post ≤ 0 ∧ x_28_post − x_28_post ≤ 0 ∧ − x_28_1 + x_28_1 ≤ 0 ∧ x_28_1 − x_28_1 ≤ 0 ∧ − x_28_0 + x_28_0 ≤ 0 ∧ x_28_0 − x_28_0 ≤ 0 ∧ − x_238_post + x_238_post ≤ 0 ∧ x_238_post − x_238_post ≤ 0 ∧ − x_238_0 + x_238_0 ≤ 0 ∧ x_238_0 − x_238_0 ≤ 0 ∧ − x_20_post + x_20_post ≤ 0 ∧ x_20_post − x_20_post ≤ 0 ∧ − x_20_2 + x_20_2 ≤ 0 ∧ x_20_2 − x_20_2 ≤ 0 ∧ − x_20_1 + x_20_1 ≤ 0 ∧ x_20_1 − x_20_1 ≤ 0 ∧ − x_20_0 + x_20_0 ≤ 0 ∧ x_20_0 − x_20_0 ≤ 0 ∧ − x_177_post + x_177_post ≤ 0 ∧ x_177_post − x_177_post ≤ 0 ∧ − x_177_0 + x_177_0 ≤ 0 ∧ x_177_0 − x_177_0 ≤ 0 ∧ − x_16_post + x_16_post ≤ 0 ∧ x_16_post − x_16_post ≤ 0 ∧ − x_16_1 + x_16_1 ≤ 0 ∧ x_16_1 − x_16_1 ≤ 0 ∧ − x_16_0 + x_16_0 ≤ 0 ∧ x_16_0 − x_16_0 ≤ 0 ∧ − x_14_post + x_14_post ≤ 0 ∧ x_14_post − x_14_post ≤ 0 ∧ − x_14_0 + x_14_0 ≤ 0 ∧ x_14_0 − x_14_0 ≤ 0 ∧ − tmp_48_post + tmp_48_post ≤ 0 ∧ tmp_48_post − tmp_48_post ≤ 0 ∧ − tmp_48_0 + tmp_48_0 ≤ 0 ∧ tmp_48_0 − tmp_48_0 ≤ 0 ∧ − temp_49_post + temp_49_post ≤ 0 ∧ temp_49_post − temp_49_post ≤ 0 ∧ − temp_49_0 + temp_49_0 ≤ 0 ∧ temp_49_0 − temp_49_0 ≤ 0 ∧ − temp0_45_post + temp0_45_post ≤ 0 ∧ temp0_45_post − temp0_45_post ≤ 0 ∧ − temp0_45_1 + temp0_45_1 ≤ 0 ∧ temp0_45_1 − temp0_45_1 ≤ 0 ∧ − temp0_45_0 + temp0_45_0 ≤ 0 ∧ temp0_45_0 − temp0_45_0 ≤ 0 ∧ − temp0_32_post + temp0_32_post ≤ 0 ∧ temp0_32_post − temp0_32_post ≤ 0 ∧ − temp0_32_4 + temp0_32_4 ≤ 0 ∧ temp0_32_4 − temp0_32_4 ≤ 0 ∧ − temp0_32_3 + temp0_32_3 ≤ 0 ∧ temp0_32_3 − temp0_32_3 ≤ 0 ∧ − temp0_32_2 + temp0_32_2 ≤ 0 ∧ temp0_32_2 − temp0_32_2 ≤ 0 ∧ − temp0_32_1 + temp0_32_1 ≤ 0 ∧ temp0_32_1 − temp0_32_1 ≤ 0 ∧ − temp0_32_0 + temp0_32_0 ≤ 0 ∧ temp0_32_0 − temp0_32_0 ≤ 0 ∧ − temp0_15_0 + temp0_15_0 ≤ 0 ∧ temp0_15_0 − temp0_15_0 ≤ 0 ∧ − t_23_post + t_23_post ≤ 0 ∧ t_23_post − t_23_post ≤ 0 ∧ − t_23_1 + t_23_1 ≤ 0 ∧ t_23_1 − t_23_1 ≤ 0 ∧ − t_23_0 + t_23_0 ≤ 0 ∧ t_23_0 − t_23_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_post + result_dot_printf_sdv_special_RETURN_VALUE_41_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_post − result_dot_printf_sdv_special_RETURN_VALUE_41_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_1 + result_dot_printf_sdv_special_RETURN_VALUE_41_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_1 − result_dot_printf_sdv_special_RETURN_VALUE_41_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_0 + result_dot_printf_sdv_special_RETURN_VALUE_41_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_0 − result_dot_printf_sdv_special_RETURN_VALUE_41_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_post + result_dot_printf_sdv_special_RETURN_VALUE_38_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_post − result_dot_printf_sdv_special_RETURN_VALUE_38_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_1 + result_dot_printf_sdv_special_RETURN_VALUE_38_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_1 − result_dot_printf_sdv_special_RETURN_VALUE_38_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_0 + result_dot_printf_sdv_special_RETURN_VALUE_38_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_0 − result_dot_printf_sdv_special_RETURN_VALUE_38_0 ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_post + result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_post − result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_1 + result_dot_nondet_sdv_special_RETURN_VALUE_13_1 ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_1 − result_dot_nondet_sdv_special_RETURN_VALUE_13_1 ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_0 + result_dot_nondet_sdv_special_RETURN_VALUE_13_0 ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_0 − result_dot_nondet_sdv_special_RETURN_VALUE_13_0 ≤ 0 ∧ − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post + result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post ≤ 0 ∧ result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post ≤ 0 ∧ − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 + result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 ≤ 0 ∧ result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 ≤ 0 ∧ − result_11_post + result_11_post ≤ 0 ∧ result_11_post − result_11_post ≤ 0 ∧ − result_11_6 + result_11_6 ≤ 0 ∧ result_11_6 − result_11_6 ≤ 0 ∧ − result_11_5 + result_11_5 ≤ 0 ∧ result_11_5 − result_11_5 ≤ 0 ∧ − result_11_4 + result_11_4 ≤ 0 ∧ result_11_4 − result_11_4 ≤ 0 ∧ − result_11_3 + result_11_3 ≤ 0 ∧ result_11_3 − result_11_3 ≤ 0 ∧ − result_11_2 + result_11_2 ≤ 0 ∧ result_11_2 − result_11_2 ≤ 0 ∧ − result_11_1 + result_11_1 ≤ 0 ∧ result_11_1 − result_11_1 ≤ 0 ∧ − result_11_0 + result_11_0 ≤ 0 ∧ result_11_0 − result_11_0 ≤ 0 ∧ − rcd_72_post + rcd_72_post ≤ 0 ∧ rcd_72_post − rcd_72_post ≤ 0 ∧ − rcd_72_0 + rcd_72_0 ≤ 0 ∧ rcd_72_0 − rcd_72_0 ≤ 0 ∧ − rcd_102_post + rcd_102_post ≤ 0 ∧ rcd_102_post − rcd_102_post ≤ 0 ∧ − rcd_102_0 + rcd_102_0 ≤ 0 ∧ rcd_102_0 − rcd_102_0 ≤ 0 ∧ − r_53_post + r_53_post ≤ 0 ∧ r_53_post − r_53_post ≤ 0 ∧ − r_53_0 + r_53_0 ≤ 0 ∧ r_53_0 − r_53_0 ≤ 0 ∧ − r_161_post + r_161_post ≤ 0 ∧ r_161_post − r_161_post ≤ 0 ∧ − r_161_0 + r_161_0 ≤ 0 ∧ r_161_0 − r_161_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 ≤ 0 ∧ − nondet_12_post + nondet_12_post ≤ 0 ∧ nondet_12_post − nondet_12_post ≤ 0 ∧ − nondet_12_1 + nondet_12_1 ≤ 0 ∧ nondet_12_1 − nondet_12_1 ≤ 0 ∧ − nondet_12_0 + nondet_12_0 ≤ 0 ∧ nondet_12_0 − nondet_12_0 ≤ 0 ∧ − lt_37_post + lt_37_post ≤ 0 ∧ lt_37_post − lt_37_post ≤ 0 ∧ − lt_37_1 + lt_37_1 ≤ 0 ∧ lt_37_1 − lt_37_1 ≤ 0 ∧ − lt_37_0 + lt_37_0 ≤ 0 ∧ lt_37_0 − lt_37_0 ≤ 0 ∧ − lt_36_post + lt_36_post ≤ 0 ∧ lt_36_post − lt_36_post ≤ 0 ∧ − lt_36_0 + lt_36_0 ≤ 0 ∧ lt_36_0 − lt_36_0 ≤ 0 ∧ − lt_237_post + lt_237_post ≤ 0 ∧ lt_237_post − lt_237_post ≤ 0 ∧ − lt_237_0 + lt_237_0 ≤ 0 ∧ lt_237_0 − lt_237_0 ≤ 0 ∧ − length_43_post + length_43_post ≤ 0 ∧ length_43_post − length_43_post ≤ 0 ∧ − length_43_0 + length_43_0 ≤ 0 ∧ length_43_0 − length_43_0 ≤ 0 ∧ − len_246_post + len_246_post ≤ 0 ∧ len_246_post − len_246_post ≤ 0 ∧ − len_246_0 + len_246_0 ≤ 0 ∧ len_246_0 − len_246_0 ≤ 0 ∧ − len_180_post + len_180_post ≤ 0 ∧ len_180_post − len_180_post ≤ 0 ∧ − len_180_0 + len_180_0 ≤ 0 ∧ len_180_0 − len_180_0 ≤ 0 ∧ − i_44_post + i_44_post ≤ 0 ∧ i_44_post − i_44_post ≤ 0 ∧ − i_44_0 + i_44_0 ≤ 0 ∧ i_44_0 − i_44_0 ≤ 0 ∧ − i_125_post + i_125_post ≤ 0 ∧ i_125_post − i_125_post ≤ 0 ∧ − i_125_0 + i_125_0 ≤ 0 ∧ i_125_0 − i_125_0 ≤ 0 ∧ − i_108_post + i_108_post ≤ 0 ∧ i_108_post − i_108_post ≤ 0 ∧ − i_108_0 + i_108_0 ≤ 0 ∧ i_108_0 − i_108_0 ≤ 0 ∧ − head_46_post + head_46_post ≤ 0 ∧ head_46_post − head_46_post ≤ 0 ∧ − head_46_0 + head_46_0 ≤ 0 ∧ head_46_0 − head_46_0 ≤ 0 ∧ − fmt_31_post + fmt_31_post ≤ 0 ∧ fmt_31_post − fmt_31_post ≤ 0 ∧ − fmt_31_4 + fmt_31_4 ≤ 0 ∧ fmt_31_4 − fmt_31_4 ≤ 0 ∧ − fmt_31_3 + fmt_31_3 ≤ 0 ∧ fmt_31_3 − fmt_31_3 ≤ 0 ∧ − fmt_31_2 + fmt_31_2 ≤ 0 ∧ fmt_31_2 − fmt_31_2 ≤ 0 ∧ − fmt_31_1 + fmt_31_1 ≤ 0 ∧ fmt_31_1 − fmt_31_1 ≤ 0 ∧ − fmt_31_0 + fmt_31_0 ≤ 0 ∧ fmt_31_0 − fmt_31_0 ≤ 0 ∧ − ct_17_post + ct_17_post ≤ 0 ∧ ct_17_post − ct_17_post ≤ 0 ∧ − ct_17_2 + ct_17_2 ≤ 0 ∧ ct_17_2 − ct_17_2 ≤ 0 ∧ − ct_17_1 + ct_17_1 ≤ 0 ∧ ct_17_1 − ct_17_1 ≤ 0 ∧ − ct_17_0 + ct_17_0 ≤ 0 ∧ ct_17_0 − ct_17_0 ≤ 0 ∧ − a_328_post + a_328_post ≤ 0 ∧ a_328_post − a_328_post ≤ 0 ∧ − a_328_0 + a_328_0 ≤ 0 ∧ a_328_0 − a_328_0 ≤ 0 ∧ − a_305_post + a_305_post ≤ 0 ∧ a_305_post − a_305_post ≤ 0 ∧ − a_305_0 + a_305_0 ≤ 0 ∧ a_305_0 − a_305_0 ≤ 0 ∧ − a_283_post + a_283_post ≤ 0 ∧ a_283_post − a_283_post ≤ 0 ∧ − a_283_0 + a_283_0 ≤ 0 ∧ a_283_0 − a_283_0 ≤ 0 ∧ − a_26_post + a_26_post ≤ 0 ∧ a_26_post − a_26_post ≤ 0 ∧ − a_26_1 + a_26_1 ≤ 0 ∧ a_26_1 − a_26_1 ≤ 0 ∧ − a_26_0 + a_26_0 ≤ 0 ∧ a_26_0 − a_26_0 ≤ 0 ∧ − a_247_post + a_247_post ≤ 0 ∧ a_247_post − a_247_post ≤ 0 ∧ − a_247_0 + a_247_0 ≤ 0 ∧ a_247_0 − a_247_0 ≤ 0 ∧ − a_197_post + a_197_post ≤ 0 ∧ a_197_post − a_197_post ≤ 0 ∧ − a_197_0 + a_197_0 ≤ 0 ∧ a_197_0 − a_197_0 ≤ 0 ∧ − a_146_0 + a_146_0 ≤ 0 ∧ a_146_0 − a_146_0 ≤ 0 | |
| 28 | 39 | 29: | 0 ≤ 0 ∧ 0 ≤ 0 ∧ t_23_post − x_20_0 ≤ 0 ∧ − t_23_post + x_20_0 ≤ 0 ∧ − ct_17_0 ≤ 0 ∧ ct_17_0 ≤ 0 ∧ − y_19_0 ≤ 0 ∧ y_19_0 ≤ 0 ∧ − x_20_0 ≤ 0 ∧ x_20_0 ≤ 0 ∧ 1 − result_dot_nondet_sdv_special_RETURN_VALUE_13_0 ≤ 0 ∧ −1 + result_dot_nondet_sdv_special_RETURN_VALUE_13_0 ≤ 0 ∧ x_14_0 − x_16_0 ≤ 0 ∧ − x_14_0 + x_16_0 ≤ 0 ∧ x_14_0 − x_SLAM_f_18_0 ≤ 0 ∧ − x_14_0 + x_SLAM_f_18_0 ≤ 0 ∧ − t_23_post + x_14_0 ≤ 0 ∧ t_23_post − x_14_0 ≤ 0 ∧ x_16_0 − x_SLAM_f_18_0 ≤ 0 ∧ − x_16_0 + x_SLAM_f_18_0 ≤ 0 ∧ ct_17_0 − y_19_0 ≤ 0 ∧ − ct_17_0 + y_19_0 ≤ 0 ∧ t_23_0 − t_23_post ≤ 0 ∧ − t_23_0 + t_23_post ≤ 0 ∧ − y_19_post + y_19_post ≤ 0 ∧ y_19_post − y_19_post ≤ 0 ∧ − y_19_2 + y_19_2 ≤ 0 ∧ y_19_2 − y_19_2 ≤ 0 ∧ − y_19_1 + y_19_1 ≤ 0 ∧ y_19_1 − y_19_1 ≤ 0 ∧ − y_19_0 + y_19_0 ≤ 0 ∧ y_19_0 − y_19_0 ≤ 0 ∧ − x_SLAM_f_18_post + x_SLAM_f_18_post ≤ 0 ∧ x_SLAM_f_18_post − x_SLAM_f_18_post ≤ 0 ∧ − x_SLAM_f_18_2 + x_SLAM_f_18_2 ≤ 0 ∧ x_SLAM_f_18_2 − x_SLAM_f_18_2 ≤ 0 ∧ − x_SLAM_f_18_1 + x_SLAM_f_18_1 ≤ 0 ∧ x_SLAM_f_18_1 − x_SLAM_f_18_1 ≤ 0 ∧ − x_SLAM_f_18_0 + x_SLAM_f_18_0 ≤ 0 ∧ x_SLAM_f_18_0 − x_SLAM_f_18_0 ≤ 0 ∧ − x_34_post + x_34_post ≤ 0 ∧ x_34_post − x_34_post ≤ 0 ∧ − x_34_1 + x_34_1 ≤ 0 ∧ x_34_1 − x_34_1 ≤ 0 ∧ − x_34_0 + x_34_0 ≤ 0 ∧ x_34_0 − x_34_0 ≤ 0 ∧ − x_28_post + x_28_post ≤ 0 ∧ x_28_post − x_28_post ≤ 0 ∧ − x_28_1 + x_28_1 ≤ 0 ∧ x_28_1 − x_28_1 ≤ 0 ∧ − x_28_0 + x_28_0 ≤ 0 ∧ x_28_0 − x_28_0 ≤ 0 ∧ − x_238_post + x_238_post ≤ 0 ∧ x_238_post − x_238_post ≤ 0 ∧ − x_238_0 + x_238_0 ≤ 0 ∧ x_238_0 − x_238_0 ≤ 0 ∧ − x_20_post + x_20_post ≤ 0 ∧ x_20_post − x_20_post ≤ 0 ∧ − x_20_2 + x_20_2 ≤ 0 ∧ x_20_2 − x_20_2 ≤ 0 ∧ − x_20_1 + x_20_1 ≤ 0 ∧ x_20_1 − x_20_1 ≤ 0 ∧ − x_20_0 + x_20_0 ≤ 0 ∧ x_20_0 − x_20_0 ≤ 0 ∧ − x_177_post + x_177_post ≤ 0 ∧ x_177_post − x_177_post ≤ 0 ∧ − x_177_0 + x_177_0 ≤ 0 ∧ x_177_0 − x_177_0 ≤ 0 ∧ − x_16_post + x_16_post ≤ 0 ∧ x_16_post − x_16_post ≤ 0 ∧ − x_16_1 + x_16_1 ≤ 0 ∧ x_16_1 − x_16_1 ≤ 0 ∧ − x_16_0 + x_16_0 ≤ 0 ∧ x_16_0 − x_16_0 ≤ 0 ∧ − x_14_post + x_14_post ≤ 0 ∧ x_14_post − x_14_post ≤ 0 ∧ − x_14_0 + x_14_0 ≤ 0 ∧ x_14_0 − x_14_0 ≤ 0 ∧ − tmp_48_post + tmp_48_post ≤ 0 ∧ tmp_48_post − tmp_48_post ≤ 0 ∧ − tmp_48_0 + tmp_48_0 ≤ 0 ∧ tmp_48_0 − tmp_48_0 ≤ 0 ∧ − temp_49_post + temp_49_post ≤ 0 ∧ temp_49_post − temp_49_post ≤ 0 ∧ − temp_49_0 + temp_49_0 ≤ 0 ∧ temp_49_0 − temp_49_0 ≤ 0 ∧ − temp0_45_post + temp0_45_post ≤ 0 ∧ temp0_45_post − temp0_45_post ≤ 0 ∧ − temp0_45_1 + temp0_45_1 ≤ 0 ∧ temp0_45_1 − temp0_45_1 ≤ 0 ∧ − temp0_45_0 + temp0_45_0 ≤ 0 ∧ temp0_45_0 − temp0_45_0 ≤ 0 ∧ − temp0_32_post + temp0_32_post ≤ 0 ∧ temp0_32_post − temp0_32_post ≤ 0 ∧ − temp0_32_4 + temp0_32_4 ≤ 0 ∧ temp0_32_4 − temp0_32_4 ≤ 0 ∧ − temp0_32_3 + temp0_32_3 ≤ 0 ∧ temp0_32_3 − temp0_32_3 ≤ 0 ∧ − temp0_32_2 + temp0_32_2 ≤ 0 ∧ temp0_32_2 − temp0_32_2 ≤ 0 ∧ − temp0_32_1 + temp0_32_1 ≤ 0 ∧ temp0_32_1 − temp0_32_1 ≤ 0 ∧ − temp0_32_0 + temp0_32_0 ≤ 0 ∧ temp0_32_0 − temp0_32_0 ≤ 0 ∧ − temp0_15_0 + temp0_15_0 ≤ 0 ∧ temp0_15_0 − temp0_15_0 ≤ 0 ∧ − t_23_1 + t_23_1 ≤ 0 ∧ t_23_1 − t_23_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_post + result_dot_printf_sdv_special_RETURN_VALUE_41_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_post − result_dot_printf_sdv_special_RETURN_VALUE_41_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_1 + result_dot_printf_sdv_special_RETURN_VALUE_41_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_1 − result_dot_printf_sdv_special_RETURN_VALUE_41_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_0 + result_dot_printf_sdv_special_RETURN_VALUE_41_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_0 − result_dot_printf_sdv_special_RETURN_VALUE_41_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_post + result_dot_printf_sdv_special_RETURN_VALUE_38_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_post − result_dot_printf_sdv_special_RETURN_VALUE_38_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_1 + result_dot_printf_sdv_special_RETURN_VALUE_38_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_1 − result_dot_printf_sdv_special_RETURN_VALUE_38_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_0 + result_dot_printf_sdv_special_RETURN_VALUE_38_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_0 − result_dot_printf_sdv_special_RETURN_VALUE_38_0 ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_post + result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_post − result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_1 + result_dot_nondet_sdv_special_RETURN_VALUE_13_1 ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_1 − result_dot_nondet_sdv_special_RETURN_VALUE_13_1 ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_0 + result_dot_nondet_sdv_special_RETURN_VALUE_13_0 ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_0 − result_dot_nondet_sdv_special_RETURN_VALUE_13_0 ≤ 0 ∧ − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post + result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post ≤ 0 ∧ result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post ≤ 0 ∧ − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 + result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 ≤ 0 ∧ result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 ≤ 0 ∧ − result_11_post + result_11_post ≤ 0 ∧ result_11_post − result_11_post ≤ 0 ∧ − result_11_6 + result_11_6 ≤ 0 ∧ result_11_6 − result_11_6 ≤ 0 ∧ − result_11_5 + result_11_5 ≤ 0 ∧ result_11_5 − result_11_5 ≤ 0 ∧ − result_11_4 + result_11_4 ≤ 0 ∧ result_11_4 − result_11_4 ≤ 0 ∧ − result_11_3 + result_11_3 ≤ 0 ∧ result_11_3 − result_11_3 ≤ 0 ∧ − result_11_2 + result_11_2 ≤ 0 ∧ result_11_2 − result_11_2 ≤ 0 ∧ − result_11_1 + result_11_1 ≤ 0 ∧ result_11_1 − result_11_1 ≤ 0 ∧ − result_11_0 + result_11_0 ≤ 0 ∧ result_11_0 − result_11_0 ≤ 0 ∧ − rcd_72_post + rcd_72_post ≤ 0 ∧ rcd_72_post − rcd_72_post ≤ 0 ∧ − rcd_72_0 + rcd_72_0 ≤ 0 ∧ rcd_72_0 − rcd_72_0 ≤ 0 ∧ − rcd_102_post + rcd_102_post ≤ 0 ∧ rcd_102_post − rcd_102_post ≤ 0 ∧ − rcd_102_0 + rcd_102_0 ≤ 0 ∧ rcd_102_0 − rcd_102_0 ≤ 0 ∧ − r_53_post + r_53_post ≤ 0 ∧ r_53_post − r_53_post ≤ 0 ∧ − r_53_0 + r_53_0 ≤ 0 ∧ r_53_0 − r_53_0 ≤ 0 ∧ − r_161_post + r_161_post ≤ 0 ∧ r_161_post − r_161_post ≤ 0 ∧ − r_161_0 + r_161_0 ≤ 0 ∧ r_161_0 − r_161_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 ≤ 0 ∧ − nondet_12_post + nondet_12_post ≤ 0 ∧ nondet_12_post − nondet_12_post ≤ 0 ∧ − nondet_12_1 + nondet_12_1 ≤ 0 ∧ nondet_12_1 − nondet_12_1 ≤ 0 ∧ − nondet_12_0 + nondet_12_0 ≤ 0 ∧ nondet_12_0 − nondet_12_0 ≤ 0 ∧ − lt_37_post + lt_37_post ≤ 0 ∧ lt_37_post − lt_37_post ≤ 0 ∧ − lt_37_1 + lt_37_1 ≤ 0 ∧ lt_37_1 − lt_37_1 ≤ 0 ∧ − lt_37_0 + lt_37_0 ≤ 0 ∧ lt_37_0 − lt_37_0 ≤ 0 ∧ − lt_36_post + lt_36_post ≤ 0 ∧ lt_36_post − lt_36_post ≤ 0 ∧ − lt_36_0 + lt_36_0 ≤ 0 ∧ lt_36_0 − lt_36_0 ≤ 0 ∧ − lt_237_post + lt_237_post ≤ 0 ∧ lt_237_post − lt_237_post ≤ 0 ∧ − lt_237_0 + lt_237_0 ≤ 0 ∧ lt_237_0 − lt_237_0 ≤ 0 ∧ − length_43_post + length_43_post ≤ 0 ∧ length_43_post − length_43_post ≤ 0 ∧ − length_43_0 + length_43_0 ≤ 0 ∧ length_43_0 − length_43_0 ≤ 0 ∧ − len_246_post + len_246_post ≤ 0 ∧ len_246_post − len_246_post ≤ 0 ∧ − len_246_0 + len_246_0 ≤ 0 ∧ len_246_0 − len_246_0 ≤ 0 ∧ − len_180_post + len_180_post ≤ 0 ∧ len_180_post − len_180_post ≤ 0 ∧ − len_180_0 + len_180_0 ≤ 0 ∧ len_180_0 − len_180_0 ≤ 0 ∧ − i_44_post + i_44_post ≤ 0 ∧ i_44_post − i_44_post ≤ 0 ∧ − i_44_0 + i_44_0 ≤ 0 ∧ i_44_0 − i_44_0 ≤ 0 ∧ − i_125_post + i_125_post ≤ 0 ∧ i_125_post − i_125_post ≤ 0 ∧ − i_125_0 + i_125_0 ≤ 0 ∧ i_125_0 − i_125_0 ≤ 0 ∧ − i_108_post + i_108_post ≤ 0 ∧ i_108_post − i_108_post ≤ 0 ∧ − i_108_0 + i_108_0 ≤ 0 ∧ i_108_0 − i_108_0 ≤ 0 ∧ − head_46_post + head_46_post ≤ 0 ∧ head_46_post − head_46_post ≤ 0 ∧ − head_46_0 + head_46_0 ≤ 0 ∧ head_46_0 − head_46_0 ≤ 0 ∧ − fmt_31_post + fmt_31_post ≤ 0 ∧ fmt_31_post − fmt_31_post ≤ 0 ∧ − fmt_31_4 + fmt_31_4 ≤ 0 ∧ fmt_31_4 − fmt_31_4 ≤ 0 ∧ − fmt_31_3 + fmt_31_3 ≤ 0 ∧ fmt_31_3 − fmt_31_3 ≤ 0 ∧ − fmt_31_2 + fmt_31_2 ≤ 0 ∧ fmt_31_2 − fmt_31_2 ≤ 0 ∧ − fmt_31_1 + fmt_31_1 ≤ 0 ∧ fmt_31_1 − fmt_31_1 ≤ 0 ∧ − fmt_31_0 + fmt_31_0 ≤ 0 ∧ fmt_31_0 − fmt_31_0 ≤ 0 ∧ − ct_17_post + ct_17_post ≤ 0 ∧ ct_17_post − ct_17_post ≤ 0 ∧ − ct_17_2 + ct_17_2 ≤ 0 ∧ ct_17_2 − ct_17_2 ≤ 0 ∧ − ct_17_1 + ct_17_1 ≤ 0 ∧ ct_17_1 − ct_17_1 ≤ 0 ∧ − ct_17_0 + ct_17_0 ≤ 0 ∧ ct_17_0 − ct_17_0 ≤ 0 ∧ − a_328_post + a_328_post ≤ 0 ∧ a_328_post − a_328_post ≤ 0 ∧ − a_328_0 + a_328_0 ≤ 0 ∧ a_328_0 − a_328_0 ≤ 0 ∧ − a_305_post + a_305_post ≤ 0 ∧ a_305_post − a_305_post ≤ 0 ∧ − a_305_0 + a_305_0 ≤ 0 ∧ a_305_0 − a_305_0 ≤ 0 ∧ − a_283_post + a_283_post ≤ 0 ∧ a_283_post − a_283_post ≤ 0 ∧ − a_283_0 + a_283_0 ≤ 0 ∧ a_283_0 − a_283_0 ≤ 0 ∧ − a_26_post + a_26_post ≤ 0 ∧ a_26_post − a_26_post ≤ 0 ∧ − a_26_1 + a_26_1 ≤ 0 ∧ a_26_1 − a_26_1 ≤ 0 ∧ − a_26_0 + a_26_0 ≤ 0 ∧ a_26_0 − a_26_0 ≤ 0 ∧ − a_247_post + a_247_post ≤ 0 ∧ a_247_post − a_247_post ≤ 0 ∧ − a_247_0 + a_247_0 ≤ 0 ∧ a_247_0 − a_247_0 ≤ 0 ∧ − a_197_post + a_197_post ≤ 0 ∧ a_197_post − a_197_post ≤ 0 ∧ − a_197_0 + a_197_0 ≤ 0 ∧ a_197_0 − a_197_0 ≤ 0 ∧ − a_146_0 + a_146_0 ≤ 0 ∧ a_146_0 − a_146_0 ≤ 0 | |
| 29 | 40 | 30: | 1 − x_14_0 ≤ 0 ∧ − y_19_post + y_19_post ≤ 0 ∧ y_19_post − y_19_post ≤ 0 ∧ − y_19_2 + y_19_2 ≤ 0 ∧ y_19_2 − y_19_2 ≤ 0 ∧ − y_19_1 + y_19_1 ≤ 0 ∧ y_19_1 − y_19_1 ≤ 0 ∧ − y_19_0 + y_19_0 ≤ 0 ∧ y_19_0 − y_19_0 ≤ 0 ∧ − x_SLAM_f_18_post + x_SLAM_f_18_post ≤ 0 ∧ x_SLAM_f_18_post − x_SLAM_f_18_post ≤ 0 ∧ − x_SLAM_f_18_2 + x_SLAM_f_18_2 ≤ 0 ∧ x_SLAM_f_18_2 − x_SLAM_f_18_2 ≤ 0 ∧ − x_SLAM_f_18_1 + x_SLAM_f_18_1 ≤ 0 ∧ x_SLAM_f_18_1 − x_SLAM_f_18_1 ≤ 0 ∧ − x_SLAM_f_18_0 + x_SLAM_f_18_0 ≤ 0 ∧ x_SLAM_f_18_0 − x_SLAM_f_18_0 ≤ 0 ∧ − x_34_post + x_34_post ≤ 0 ∧ x_34_post − x_34_post ≤ 0 ∧ − x_34_1 + x_34_1 ≤ 0 ∧ x_34_1 − x_34_1 ≤ 0 ∧ − x_34_0 + x_34_0 ≤ 0 ∧ x_34_0 − x_34_0 ≤ 0 ∧ − x_28_post + x_28_post ≤ 0 ∧ x_28_post − x_28_post ≤ 0 ∧ − x_28_1 + x_28_1 ≤ 0 ∧ x_28_1 − x_28_1 ≤ 0 ∧ − x_28_0 + x_28_0 ≤ 0 ∧ x_28_0 − x_28_0 ≤ 0 ∧ − x_238_post + x_238_post ≤ 0 ∧ x_238_post − x_238_post ≤ 0 ∧ − x_238_0 + x_238_0 ≤ 0 ∧ x_238_0 − x_238_0 ≤ 0 ∧ − x_20_post + x_20_post ≤ 0 ∧ x_20_post − x_20_post ≤ 0 ∧ − x_20_2 + x_20_2 ≤ 0 ∧ x_20_2 − x_20_2 ≤ 0 ∧ − x_20_1 + x_20_1 ≤ 0 ∧ x_20_1 − x_20_1 ≤ 0 ∧ − x_20_0 + x_20_0 ≤ 0 ∧ x_20_0 − x_20_0 ≤ 0 ∧ − x_177_post + x_177_post ≤ 0 ∧ x_177_post − x_177_post ≤ 0 ∧ − x_177_0 + x_177_0 ≤ 0 ∧ x_177_0 − x_177_0 ≤ 0 ∧ − x_16_post + x_16_post ≤ 0 ∧ x_16_post − x_16_post ≤ 0 ∧ − x_16_1 + x_16_1 ≤ 0 ∧ x_16_1 − x_16_1 ≤ 0 ∧ − x_16_0 + x_16_0 ≤ 0 ∧ x_16_0 − x_16_0 ≤ 0 ∧ − x_14_post + x_14_post ≤ 0 ∧ x_14_post − x_14_post ≤ 0 ∧ − x_14_0 + x_14_0 ≤ 0 ∧ x_14_0 − x_14_0 ≤ 0 ∧ − tmp_48_post + tmp_48_post ≤ 0 ∧ tmp_48_post − tmp_48_post ≤ 0 ∧ − tmp_48_0 + tmp_48_0 ≤ 0 ∧ tmp_48_0 − tmp_48_0 ≤ 0 ∧ − temp_49_post + temp_49_post ≤ 0 ∧ temp_49_post − temp_49_post ≤ 0 ∧ − temp_49_0 + temp_49_0 ≤ 0 ∧ temp_49_0 − temp_49_0 ≤ 0 ∧ − temp0_45_post + temp0_45_post ≤ 0 ∧ temp0_45_post − temp0_45_post ≤ 0 ∧ − temp0_45_1 + temp0_45_1 ≤ 0 ∧ temp0_45_1 − temp0_45_1 ≤ 0 ∧ − temp0_45_0 + temp0_45_0 ≤ 0 ∧ temp0_45_0 − temp0_45_0 ≤ 0 ∧ − temp0_32_post + temp0_32_post ≤ 0 ∧ temp0_32_post − temp0_32_post ≤ 0 ∧ − temp0_32_4 + temp0_32_4 ≤ 0 ∧ temp0_32_4 − temp0_32_4 ≤ 0 ∧ − temp0_32_3 + temp0_32_3 ≤ 0 ∧ temp0_32_3 − temp0_32_3 ≤ 0 ∧ − temp0_32_2 + temp0_32_2 ≤ 0 ∧ temp0_32_2 − temp0_32_2 ≤ 0 ∧ − temp0_32_1 + temp0_32_1 ≤ 0 ∧ temp0_32_1 − temp0_32_1 ≤ 0 ∧ − temp0_32_0 + temp0_32_0 ≤ 0 ∧ temp0_32_0 − temp0_32_0 ≤ 0 ∧ − temp0_15_0 + temp0_15_0 ≤ 0 ∧ temp0_15_0 − temp0_15_0 ≤ 0 ∧ − t_23_post + t_23_post ≤ 0 ∧ t_23_post − t_23_post ≤ 0 ∧ − t_23_1 + t_23_1 ≤ 0 ∧ t_23_1 − t_23_1 ≤ 0 ∧ − t_23_0 + t_23_0 ≤ 0 ∧ t_23_0 − t_23_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_post + result_dot_printf_sdv_special_RETURN_VALUE_41_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_post − result_dot_printf_sdv_special_RETURN_VALUE_41_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_1 + result_dot_printf_sdv_special_RETURN_VALUE_41_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_1 − result_dot_printf_sdv_special_RETURN_VALUE_41_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_0 + result_dot_printf_sdv_special_RETURN_VALUE_41_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_0 − result_dot_printf_sdv_special_RETURN_VALUE_41_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_post + result_dot_printf_sdv_special_RETURN_VALUE_38_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_post − result_dot_printf_sdv_special_RETURN_VALUE_38_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_1 + result_dot_printf_sdv_special_RETURN_VALUE_38_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_1 − result_dot_printf_sdv_special_RETURN_VALUE_38_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_0 + result_dot_printf_sdv_special_RETURN_VALUE_38_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_0 − result_dot_printf_sdv_special_RETURN_VALUE_38_0 ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_post + result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_post − result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_1 + result_dot_nondet_sdv_special_RETURN_VALUE_13_1 ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_1 − result_dot_nondet_sdv_special_RETURN_VALUE_13_1 ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_0 + result_dot_nondet_sdv_special_RETURN_VALUE_13_0 ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_0 − result_dot_nondet_sdv_special_RETURN_VALUE_13_0 ≤ 0 ∧ − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post + result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post ≤ 0 ∧ result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post ≤ 0 ∧ − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 + result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 ≤ 0 ∧ result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 ≤ 0 ∧ − result_11_post + result_11_post ≤ 0 ∧ result_11_post − result_11_post ≤ 0 ∧ − result_11_6 + result_11_6 ≤ 0 ∧ result_11_6 − result_11_6 ≤ 0 ∧ − result_11_5 + result_11_5 ≤ 0 ∧ result_11_5 − result_11_5 ≤ 0 ∧ − result_11_4 + result_11_4 ≤ 0 ∧ result_11_4 − result_11_4 ≤ 0 ∧ − result_11_3 + result_11_3 ≤ 0 ∧ result_11_3 − result_11_3 ≤ 0 ∧ − result_11_2 + result_11_2 ≤ 0 ∧ result_11_2 − result_11_2 ≤ 0 ∧ − result_11_1 + result_11_1 ≤ 0 ∧ result_11_1 − result_11_1 ≤ 0 ∧ − result_11_0 + result_11_0 ≤ 0 ∧ result_11_0 − result_11_0 ≤ 0 ∧ − rcd_72_post + rcd_72_post ≤ 0 ∧ rcd_72_post − rcd_72_post ≤ 0 ∧ − rcd_72_0 + rcd_72_0 ≤ 0 ∧ rcd_72_0 − rcd_72_0 ≤ 0 ∧ − rcd_102_post + rcd_102_post ≤ 0 ∧ rcd_102_post − rcd_102_post ≤ 0 ∧ − rcd_102_0 + rcd_102_0 ≤ 0 ∧ rcd_102_0 − rcd_102_0 ≤ 0 ∧ − r_53_post + r_53_post ≤ 0 ∧ r_53_post − r_53_post ≤ 0 ∧ − r_53_0 + r_53_0 ≤ 0 ∧ r_53_0 − r_53_0 ≤ 0 ∧ − r_161_post + r_161_post ≤ 0 ∧ r_161_post − r_161_post ≤ 0 ∧ − r_161_0 + r_161_0 ≤ 0 ∧ r_161_0 − r_161_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 ≤ 0 ∧ − nondet_12_post + nondet_12_post ≤ 0 ∧ nondet_12_post − nondet_12_post ≤ 0 ∧ − nondet_12_1 + nondet_12_1 ≤ 0 ∧ nondet_12_1 − nondet_12_1 ≤ 0 ∧ − nondet_12_0 + nondet_12_0 ≤ 0 ∧ nondet_12_0 − nondet_12_0 ≤ 0 ∧ − lt_37_post + lt_37_post ≤ 0 ∧ lt_37_post − lt_37_post ≤ 0 ∧ − lt_37_1 + lt_37_1 ≤ 0 ∧ lt_37_1 − lt_37_1 ≤ 0 ∧ − lt_37_0 + lt_37_0 ≤ 0 ∧ lt_37_0 − lt_37_0 ≤ 0 ∧ − lt_36_post + lt_36_post ≤ 0 ∧ lt_36_post − lt_36_post ≤ 0 ∧ − lt_36_0 + lt_36_0 ≤ 0 ∧ lt_36_0 − lt_36_0 ≤ 0 ∧ − lt_237_post + lt_237_post ≤ 0 ∧ lt_237_post − lt_237_post ≤ 0 ∧ − lt_237_0 + lt_237_0 ≤ 0 ∧ lt_237_0 − lt_237_0 ≤ 0 ∧ − length_43_post + length_43_post ≤ 0 ∧ length_43_post − length_43_post ≤ 0 ∧ − length_43_0 + length_43_0 ≤ 0 ∧ length_43_0 − length_43_0 ≤ 0 ∧ − len_246_post + len_246_post ≤ 0 ∧ len_246_post − len_246_post ≤ 0 ∧ − len_246_0 + len_246_0 ≤ 0 ∧ len_246_0 − len_246_0 ≤ 0 ∧ − len_180_post + len_180_post ≤ 0 ∧ len_180_post − len_180_post ≤ 0 ∧ − len_180_0 + len_180_0 ≤ 0 ∧ len_180_0 − len_180_0 ≤ 0 ∧ − i_44_post + i_44_post ≤ 0 ∧ i_44_post − i_44_post ≤ 0 ∧ − i_44_0 + i_44_0 ≤ 0 ∧ i_44_0 − i_44_0 ≤ 0 ∧ − i_125_post + i_125_post ≤ 0 ∧ i_125_post − i_125_post ≤ 0 ∧ − i_125_0 + i_125_0 ≤ 0 ∧ i_125_0 − i_125_0 ≤ 0 ∧ − i_108_post + i_108_post ≤ 0 ∧ i_108_post − i_108_post ≤ 0 ∧ − i_108_0 + i_108_0 ≤ 0 ∧ i_108_0 − i_108_0 ≤ 0 ∧ − head_46_post + head_46_post ≤ 0 ∧ head_46_post − head_46_post ≤ 0 ∧ − head_46_0 + head_46_0 ≤ 0 ∧ head_46_0 − head_46_0 ≤ 0 ∧ − fmt_31_post + fmt_31_post ≤ 0 ∧ fmt_31_post − fmt_31_post ≤ 0 ∧ − fmt_31_4 + fmt_31_4 ≤ 0 ∧ fmt_31_4 − fmt_31_4 ≤ 0 ∧ − fmt_31_3 + fmt_31_3 ≤ 0 ∧ fmt_31_3 − fmt_31_3 ≤ 0 ∧ − fmt_31_2 + fmt_31_2 ≤ 0 ∧ fmt_31_2 − fmt_31_2 ≤ 0 ∧ − fmt_31_1 + fmt_31_1 ≤ 0 ∧ fmt_31_1 − fmt_31_1 ≤ 0 ∧ − fmt_31_0 + fmt_31_0 ≤ 0 ∧ fmt_31_0 − fmt_31_0 ≤ 0 ∧ − ct_17_post + ct_17_post ≤ 0 ∧ ct_17_post − ct_17_post ≤ 0 ∧ − ct_17_2 + ct_17_2 ≤ 0 ∧ ct_17_2 − ct_17_2 ≤ 0 ∧ − ct_17_1 + ct_17_1 ≤ 0 ∧ ct_17_1 − ct_17_1 ≤ 0 ∧ − ct_17_0 + ct_17_0 ≤ 0 ∧ ct_17_0 − ct_17_0 ≤ 0 ∧ − a_328_post + a_328_post ≤ 0 ∧ a_328_post − a_328_post ≤ 0 ∧ − a_328_0 + a_328_0 ≤ 0 ∧ a_328_0 − a_328_0 ≤ 0 ∧ − a_305_post + a_305_post ≤ 0 ∧ a_305_post − a_305_post ≤ 0 ∧ − a_305_0 + a_305_0 ≤ 0 ∧ a_305_0 − a_305_0 ≤ 0 ∧ − a_283_post + a_283_post ≤ 0 ∧ a_283_post − a_283_post ≤ 0 ∧ − a_283_0 + a_283_0 ≤ 0 ∧ a_283_0 − a_283_0 ≤ 0 ∧ − a_26_post + a_26_post ≤ 0 ∧ a_26_post − a_26_post ≤ 0 ∧ − a_26_1 + a_26_1 ≤ 0 ∧ a_26_1 − a_26_1 ≤ 0 ∧ − a_26_0 + a_26_0 ≤ 0 ∧ a_26_0 − a_26_0 ≤ 0 ∧ − a_247_post + a_247_post ≤ 0 ∧ a_247_post − a_247_post ≤ 0 ∧ − a_247_0 + a_247_0 ≤ 0 ∧ a_247_0 − a_247_0 ≤ 0 ∧ − a_197_post + a_197_post ≤ 0 ∧ a_197_post − a_197_post ≤ 0 ∧ − a_197_0 + a_197_0 ≤ 0 ∧ a_197_0 − a_197_0 ≤ 0 ∧ − a_146_0 + a_146_0 ≤ 0 ∧ a_146_0 − a_146_0 ≤ 0 | |
| 29 | 41 | 30: | 1 + x_14_0 ≤ 0 ∧ − y_19_post + y_19_post ≤ 0 ∧ y_19_post − y_19_post ≤ 0 ∧ − y_19_2 + y_19_2 ≤ 0 ∧ y_19_2 − y_19_2 ≤ 0 ∧ − y_19_1 + y_19_1 ≤ 0 ∧ y_19_1 − y_19_1 ≤ 0 ∧ − y_19_0 + y_19_0 ≤ 0 ∧ y_19_0 − y_19_0 ≤ 0 ∧ − x_SLAM_f_18_post + x_SLAM_f_18_post ≤ 0 ∧ x_SLAM_f_18_post − x_SLAM_f_18_post ≤ 0 ∧ − x_SLAM_f_18_2 + x_SLAM_f_18_2 ≤ 0 ∧ x_SLAM_f_18_2 − x_SLAM_f_18_2 ≤ 0 ∧ − x_SLAM_f_18_1 + x_SLAM_f_18_1 ≤ 0 ∧ x_SLAM_f_18_1 − x_SLAM_f_18_1 ≤ 0 ∧ − x_SLAM_f_18_0 + x_SLAM_f_18_0 ≤ 0 ∧ x_SLAM_f_18_0 − x_SLAM_f_18_0 ≤ 0 ∧ − x_34_post + x_34_post ≤ 0 ∧ x_34_post − x_34_post ≤ 0 ∧ − x_34_1 + x_34_1 ≤ 0 ∧ x_34_1 − x_34_1 ≤ 0 ∧ − x_34_0 + x_34_0 ≤ 0 ∧ x_34_0 − x_34_0 ≤ 0 ∧ − x_28_post + x_28_post ≤ 0 ∧ x_28_post − x_28_post ≤ 0 ∧ − x_28_1 + x_28_1 ≤ 0 ∧ x_28_1 − x_28_1 ≤ 0 ∧ − x_28_0 + x_28_0 ≤ 0 ∧ x_28_0 − x_28_0 ≤ 0 ∧ − x_238_post + x_238_post ≤ 0 ∧ x_238_post − x_238_post ≤ 0 ∧ − x_238_0 + x_238_0 ≤ 0 ∧ x_238_0 − x_238_0 ≤ 0 ∧ − x_20_post + x_20_post ≤ 0 ∧ x_20_post − x_20_post ≤ 0 ∧ − x_20_2 + x_20_2 ≤ 0 ∧ x_20_2 − x_20_2 ≤ 0 ∧ − x_20_1 + x_20_1 ≤ 0 ∧ x_20_1 − x_20_1 ≤ 0 ∧ − x_20_0 + x_20_0 ≤ 0 ∧ x_20_0 − x_20_0 ≤ 0 ∧ − x_177_post + x_177_post ≤ 0 ∧ x_177_post − x_177_post ≤ 0 ∧ − x_177_0 + x_177_0 ≤ 0 ∧ x_177_0 − x_177_0 ≤ 0 ∧ − x_16_post + x_16_post ≤ 0 ∧ x_16_post − x_16_post ≤ 0 ∧ − x_16_1 + x_16_1 ≤ 0 ∧ x_16_1 − x_16_1 ≤ 0 ∧ − x_16_0 + x_16_0 ≤ 0 ∧ x_16_0 − x_16_0 ≤ 0 ∧ − x_14_post + x_14_post ≤ 0 ∧ x_14_post − x_14_post ≤ 0 ∧ − x_14_0 + x_14_0 ≤ 0 ∧ x_14_0 − x_14_0 ≤ 0 ∧ − tmp_48_post + tmp_48_post ≤ 0 ∧ tmp_48_post − tmp_48_post ≤ 0 ∧ − tmp_48_0 + tmp_48_0 ≤ 0 ∧ tmp_48_0 − tmp_48_0 ≤ 0 ∧ − temp_49_post + temp_49_post ≤ 0 ∧ temp_49_post − temp_49_post ≤ 0 ∧ − temp_49_0 + temp_49_0 ≤ 0 ∧ temp_49_0 − temp_49_0 ≤ 0 ∧ − temp0_45_post + temp0_45_post ≤ 0 ∧ temp0_45_post − temp0_45_post ≤ 0 ∧ − temp0_45_1 + temp0_45_1 ≤ 0 ∧ temp0_45_1 − temp0_45_1 ≤ 0 ∧ − temp0_45_0 + temp0_45_0 ≤ 0 ∧ temp0_45_0 − temp0_45_0 ≤ 0 ∧ − temp0_32_post + temp0_32_post ≤ 0 ∧ temp0_32_post − temp0_32_post ≤ 0 ∧ − temp0_32_4 + temp0_32_4 ≤ 0 ∧ temp0_32_4 − temp0_32_4 ≤ 0 ∧ − temp0_32_3 + temp0_32_3 ≤ 0 ∧ temp0_32_3 − temp0_32_3 ≤ 0 ∧ − temp0_32_2 + temp0_32_2 ≤ 0 ∧ temp0_32_2 − temp0_32_2 ≤ 0 ∧ − temp0_32_1 + temp0_32_1 ≤ 0 ∧ temp0_32_1 − temp0_32_1 ≤ 0 ∧ − temp0_32_0 + temp0_32_0 ≤ 0 ∧ temp0_32_0 − temp0_32_0 ≤ 0 ∧ − temp0_15_0 + temp0_15_0 ≤ 0 ∧ temp0_15_0 − temp0_15_0 ≤ 0 ∧ − t_23_post + t_23_post ≤ 0 ∧ t_23_post − t_23_post ≤ 0 ∧ − t_23_1 + t_23_1 ≤ 0 ∧ t_23_1 − t_23_1 ≤ 0 ∧ − t_23_0 + t_23_0 ≤ 0 ∧ t_23_0 − t_23_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_post + result_dot_printf_sdv_special_RETURN_VALUE_41_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_post − result_dot_printf_sdv_special_RETURN_VALUE_41_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_1 + result_dot_printf_sdv_special_RETURN_VALUE_41_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_1 − result_dot_printf_sdv_special_RETURN_VALUE_41_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_0 + result_dot_printf_sdv_special_RETURN_VALUE_41_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_0 − result_dot_printf_sdv_special_RETURN_VALUE_41_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_post + result_dot_printf_sdv_special_RETURN_VALUE_38_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_post − result_dot_printf_sdv_special_RETURN_VALUE_38_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_1 + result_dot_printf_sdv_special_RETURN_VALUE_38_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_1 − result_dot_printf_sdv_special_RETURN_VALUE_38_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_0 + result_dot_printf_sdv_special_RETURN_VALUE_38_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_0 − result_dot_printf_sdv_special_RETURN_VALUE_38_0 ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_post + result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_post − result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_1 + result_dot_nondet_sdv_special_RETURN_VALUE_13_1 ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_1 − result_dot_nondet_sdv_special_RETURN_VALUE_13_1 ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_0 + result_dot_nondet_sdv_special_RETURN_VALUE_13_0 ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_0 − result_dot_nondet_sdv_special_RETURN_VALUE_13_0 ≤ 0 ∧ − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post + result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post ≤ 0 ∧ result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post ≤ 0 ∧ − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 + result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 ≤ 0 ∧ result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 ≤ 0 ∧ − result_11_post + result_11_post ≤ 0 ∧ result_11_post − result_11_post ≤ 0 ∧ − result_11_6 + result_11_6 ≤ 0 ∧ result_11_6 − result_11_6 ≤ 0 ∧ − result_11_5 + result_11_5 ≤ 0 ∧ result_11_5 − result_11_5 ≤ 0 ∧ − result_11_4 + result_11_4 ≤ 0 ∧ result_11_4 − result_11_4 ≤ 0 ∧ − result_11_3 + result_11_3 ≤ 0 ∧ result_11_3 − result_11_3 ≤ 0 ∧ − result_11_2 + result_11_2 ≤ 0 ∧ result_11_2 − result_11_2 ≤ 0 ∧ − result_11_1 + result_11_1 ≤ 0 ∧ result_11_1 − result_11_1 ≤ 0 ∧ − result_11_0 + result_11_0 ≤ 0 ∧ result_11_0 − result_11_0 ≤ 0 ∧ − rcd_72_post + rcd_72_post ≤ 0 ∧ rcd_72_post − rcd_72_post ≤ 0 ∧ − rcd_72_0 + rcd_72_0 ≤ 0 ∧ rcd_72_0 − rcd_72_0 ≤ 0 ∧ − rcd_102_post + rcd_102_post ≤ 0 ∧ rcd_102_post − rcd_102_post ≤ 0 ∧ − rcd_102_0 + rcd_102_0 ≤ 0 ∧ rcd_102_0 − rcd_102_0 ≤ 0 ∧ − r_53_post + r_53_post ≤ 0 ∧ r_53_post − r_53_post ≤ 0 ∧ − r_53_0 + r_53_0 ≤ 0 ∧ r_53_0 − r_53_0 ≤ 0 ∧ − r_161_post + r_161_post ≤ 0 ∧ r_161_post − r_161_post ≤ 0 ∧ − r_161_0 + r_161_0 ≤ 0 ∧ r_161_0 − r_161_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 ≤ 0 ∧ − nondet_12_post + nondet_12_post ≤ 0 ∧ nondet_12_post − nondet_12_post ≤ 0 ∧ − nondet_12_1 + nondet_12_1 ≤ 0 ∧ nondet_12_1 − nondet_12_1 ≤ 0 ∧ − nondet_12_0 + nondet_12_0 ≤ 0 ∧ nondet_12_0 − nondet_12_0 ≤ 0 ∧ − lt_37_post + lt_37_post ≤ 0 ∧ lt_37_post − lt_37_post ≤ 0 ∧ − lt_37_1 + lt_37_1 ≤ 0 ∧ lt_37_1 − lt_37_1 ≤ 0 ∧ − lt_37_0 + lt_37_0 ≤ 0 ∧ lt_37_0 − lt_37_0 ≤ 0 ∧ − lt_36_post + lt_36_post ≤ 0 ∧ lt_36_post − lt_36_post ≤ 0 ∧ − lt_36_0 + lt_36_0 ≤ 0 ∧ lt_36_0 − lt_36_0 ≤ 0 ∧ − lt_237_post + lt_237_post ≤ 0 ∧ lt_237_post − lt_237_post ≤ 0 ∧ − lt_237_0 + lt_237_0 ≤ 0 ∧ lt_237_0 − lt_237_0 ≤ 0 ∧ − length_43_post + length_43_post ≤ 0 ∧ length_43_post − length_43_post ≤ 0 ∧ − length_43_0 + length_43_0 ≤ 0 ∧ length_43_0 − length_43_0 ≤ 0 ∧ − len_246_post + len_246_post ≤ 0 ∧ len_246_post − len_246_post ≤ 0 ∧ − len_246_0 + len_246_0 ≤ 0 ∧ len_246_0 − len_246_0 ≤ 0 ∧ − len_180_post + len_180_post ≤ 0 ∧ len_180_post − len_180_post ≤ 0 ∧ − len_180_0 + len_180_0 ≤ 0 ∧ len_180_0 − len_180_0 ≤ 0 ∧ − i_44_post + i_44_post ≤ 0 ∧ i_44_post − i_44_post ≤ 0 ∧ − i_44_0 + i_44_0 ≤ 0 ∧ i_44_0 − i_44_0 ≤ 0 ∧ − i_125_post + i_125_post ≤ 0 ∧ i_125_post − i_125_post ≤ 0 ∧ − i_125_0 + i_125_0 ≤ 0 ∧ i_125_0 − i_125_0 ≤ 0 ∧ − i_108_post + i_108_post ≤ 0 ∧ i_108_post − i_108_post ≤ 0 ∧ − i_108_0 + i_108_0 ≤ 0 ∧ i_108_0 − i_108_0 ≤ 0 ∧ − head_46_post + head_46_post ≤ 0 ∧ head_46_post − head_46_post ≤ 0 ∧ − head_46_0 + head_46_0 ≤ 0 ∧ head_46_0 − head_46_0 ≤ 0 ∧ − fmt_31_post + fmt_31_post ≤ 0 ∧ fmt_31_post − fmt_31_post ≤ 0 ∧ − fmt_31_4 + fmt_31_4 ≤ 0 ∧ fmt_31_4 − fmt_31_4 ≤ 0 ∧ − fmt_31_3 + fmt_31_3 ≤ 0 ∧ fmt_31_3 − fmt_31_3 ≤ 0 ∧ − fmt_31_2 + fmt_31_2 ≤ 0 ∧ fmt_31_2 − fmt_31_2 ≤ 0 ∧ − fmt_31_1 + fmt_31_1 ≤ 0 ∧ fmt_31_1 − fmt_31_1 ≤ 0 ∧ − fmt_31_0 + fmt_31_0 ≤ 0 ∧ fmt_31_0 − fmt_31_0 ≤ 0 ∧ − ct_17_post + ct_17_post ≤ 0 ∧ ct_17_post − ct_17_post ≤ 0 ∧ − ct_17_2 + ct_17_2 ≤ 0 ∧ ct_17_2 − ct_17_2 ≤ 0 ∧ − ct_17_1 + ct_17_1 ≤ 0 ∧ ct_17_1 − ct_17_1 ≤ 0 ∧ − ct_17_0 + ct_17_0 ≤ 0 ∧ ct_17_0 − ct_17_0 ≤ 0 ∧ − a_328_post + a_328_post ≤ 0 ∧ a_328_post − a_328_post ≤ 0 ∧ − a_328_0 + a_328_0 ≤ 0 ∧ a_328_0 − a_328_0 ≤ 0 ∧ − a_305_post + a_305_post ≤ 0 ∧ a_305_post − a_305_post ≤ 0 ∧ − a_305_0 + a_305_0 ≤ 0 ∧ a_305_0 − a_305_0 ≤ 0 ∧ − a_283_post + a_283_post ≤ 0 ∧ a_283_post − a_283_post ≤ 0 ∧ − a_283_0 + a_283_0 ≤ 0 ∧ a_283_0 − a_283_0 ≤ 0 ∧ − a_26_post + a_26_post ≤ 0 ∧ a_26_post − a_26_post ≤ 0 ∧ − a_26_1 + a_26_1 ≤ 0 ∧ a_26_1 − a_26_1 ≤ 0 ∧ − a_26_0 + a_26_0 ≤ 0 ∧ a_26_0 − a_26_0 ≤ 0 ∧ − a_247_post + a_247_post ≤ 0 ∧ a_247_post − a_247_post ≤ 0 ∧ − a_247_0 + a_247_0 ≤ 0 ∧ a_247_0 − a_247_0 ≤ 0 ∧ − a_197_post + a_197_post ≤ 0 ∧ a_197_post − a_197_post ≤ 0 ∧ − a_197_0 + a_197_0 ≤ 0 ∧ a_197_0 − a_197_0 ≤ 0 ∧ − a_146_0 + a_146_0 ≤ 0 ∧ a_146_0 − a_146_0 ≤ 0 | |
| 30 | 42 | 31: | 1 + x_14_0 − y_19_0 ≤ 0 ∧ − y_19_post + y_19_post ≤ 0 ∧ y_19_post − y_19_post ≤ 0 ∧ − y_19_2 + y_19_2 ≤ 0 ∧ y_19_2 − y_19_2 ≤ 0 ∧ − y_19_1 + y_19_1 ≤ 0 ∧ y_19_1 − y_19_1 ≤ 0 ∧ − y_19_0 + y_19_0 ≤ 0 ∧ y_19_0 − y_19_0 ≤ 0 ∧ − x_SLAM_f_18_post + x_SLAM_f_18_post ≤ 0 ∧ x_SLAM_f_18_post − x_SLAM_f_18_post ≤ 0 ∧ − x_SLAM_f_18_2 + x_SLAM_f_18_2 ≤ 0 ∧ x_SLAM_f_18_2 − x_SLAM_f_18_2 ≤ 0 ∧ − x_SLAM_f_18_1 + x_SLAM_f_18_1 ≤ 0 ∧ x_SLAM_f_18_1 − x_SLAM_f_18_1 ≤ 0 ∧ − x_SLAM_f_18_0 + x_SLAM_f_18_0 ≤ 0 ∧ x_SLAM_f_18_0 − x_SLAM_f_18_0 ≤ 0 ∧ − x_34_post + x_34_post ≤ 0 ∧ x_34_post − x_34_post ≤ 0 ∧ − x_34_1 + x_34_1 ≤ 0 ∧ x_34_1 − x_34_1 ≤ 0 ∧ − x_34_0 + x_34_0 ≤ 0 ∧ x_34_0 − x_34_0 ≤ 0 ∧ − x_28_post + x_28_post ≤ 0 ∧ x_28_post − x_28_post ≤ 0 ∧ − x_28_1 + x_28_1 ≤ 0 ∧ x_28_1 − x_28_1 ≤ 0 ∧ − x_28_0 + x_28_0 ≤ 0 ∧ x_28_0 − x_28_0 ≤ 0 ∧ − x_238_post + x_238_post ≤ 0 ∧ x_238_post − x_238_post ≤ 0 ∧ − x_238_0 + x_238_0 ≤ 0 ∧ x_238_0 − x_238_0 ≤ 0 ∧ − x_20_post + x_20_post ≤ 0 ∧ x_20_post − x_20_post ≤ 0 ∧ − x_20_2 + x_20_2 ≤ 0 ∧ x_20_2 − x_20_2 ≤ 0 ∧ − x_20_1 + x_20_1 ≤ 0 ∧ x_20_1 − x_20_1 ≤ 0 ∧ − x_20_0 + x_20_0 ≤ 0 ∧ x_20_0 − x_20_0 ≤ 0 ∧ − x_177_post + x_177_post ≤ 0 ∧ x_177_post − x_177_post ≤ 0 ∧ − x_177_0 + x_177_0 ≤ 0 ∧ x_177_0 − x_177_0 ≤ 0 ∧ − x_16_post + x_16_post ≤ 0 ∧ x_16_post − x_16_post ≤ 0 ∧ − x_16_1 + x_16_1 ≤ 0 ∧ x_16_1 − x_16_1 ≤ 0 ∧ − x_16_0 + x_16_0 ≤ 0 ∧ x_16_0 − x_16_0 ≤ 0 ∧ − x_14_post + x_14_post ≤ 0 ∧ x_14_post − x_14_post ≤ 0 ∧ − x_14_0 + x_14_0 ≤ 0 ∧ x_14_0 − x_14_0 ≤ 0 ∧ − tmp_48_post + tmp_48_post ≤ 0 ∧ tmp_48_post − tmp_48_post ≤ 0 ∧ − tmp_48_0 + tmp_48_0 ≤ 0 ∧ tmp_48_0 − tmp_48_0 ≤ 0 ∧ − temp_49_post + temp_49_post ≤ 0 ∧ temp_49_post − temp_49_post ≤ 0 ∧ − temp_49_0 + temp_49_0 ≤ 0 ∧ temp_49_0 − temp_49_0 ≤ 0 ∧ − temp0_45_post + temp0_45_post ≤ 0 ∧ temp0_45_post − temp0_45_post ≤ 0 ∧ − temp0_45_1 + temp0_45_1 ≤ 0 ∧ temp0_45_1 − temp0_45_1 ≤ 0 ∧ − temp0_45_0 + temp0_45_0 ≤ 0 ∧ temp0_45_0 − temp0_45_0 ≤ 0 ∧ − temp0_32_post + temp0_32_post ≤ 0 ∧ temp0_32_post − temp0_32_post ≤ 0 ∧ − temp0_32_4 + temp0_32_4 ≤ 0 ∧ temp0_32_4 − temp0_32_4 ≤ 0 ∧ − temp0_32_3 + temp0_32_3 ≤ 0 ∧ temp0_32_3 − temp0_32_3 ≤ 0 ∧ − temp0_32_2 + temp0_32_2 ≤ 0 ∧ temp0_32_2 − temp0_32_2 ≤ 0 ∧ − temp0_32_1 + temp0_32_1 ≤ 0 ∧ temp0_32_1 − temp0_32_1 ≤ 0 ∧ − temp0_32_0 + temp0_32_0 ≤ 0 ∧ temp0_32_0 − temp0_32_0 ≤ 0 ∧ − temp0_15_0 + temp0_15_0 ≤ 0 ∧ temp0_15_0 − temp0_15_0 ≤ 0 ∧ − t_23_post + t_23_post ≤ 0 ∧ t_23_post − t_23_post ≤ 0 ∧ − t_23_1 + t_23_1 ≤ 0 ∧ t_23_1 − t_23_1 ≤ 0 ∧ − t_23_0 + t_23_0 ≤ 0 ∧ t_23_0 − t_23_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_post + result_dot_printf_sdv_special_RETURN_VALUE_41_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_post − result_dot_printf_sdv_special_RETURN_VALUE_41_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_1 + result_dot_printf_sdv_special_RETURN_VALUE_41_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_1 − result_dot_printf_sdv_special_RETURN_VALUE_41_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_0 + result_dot_printf_sdv_special_RETURN_VALUE_41_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_0 − result_dot_printf_sdv_special_RETURN_VALUE_41_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_post + result_dot_printf_sdv_special_RETURN_VALUE_38_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_post − result_dot_printf_sdv_special_RETURN_VALUE_38_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_1 + result_dot_printf_sdv_special_RETURN_VALUE_38_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_1 − result_dot_printf_sdv_special_RETURN_VALUE_38_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_0 + result_dot_printf_sdv_special_RETURN_VALUE_38_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_0 − result_dot_printf_sdv_special_RETURN_VALUE_38_0 ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_post + result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_post − result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_1 + result_dot_nondet_sdv_special_RETURN_VALUE_13_1 ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_1 − result_dot_nondet_sdv_special_RETURN_VALUE_13_1 ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_0 + result_dot_nondet_sdv_special_RETURN_VALUE_13_0 ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_0 − result_dot_nondet_sdv_special_RETURN_VALUE_13_0 ≤ 0 ∧ − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post + result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post ≤ 0 ∧ result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post ≤ 0 ∧ − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 + result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 ≤ 0 ∧ result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 ≤ 0 ∧ − result_11_post + result_11_post ≤ 0 ∧ result_11_post − result_11_post ≤ 0 ∧ − result_11_6 + result_11_6 ≤ 0 ∧ result_11_6 − result_11_6 ≤ 0 ∧ − result_11_5 + result_11_5 ≤ 0 ∧ result_11_5 − result_11_5 ≤ 0 ∧ − result_11_4 + result_11_4 ≤ 0 ∧ result_11_4 − result_11_4 ≤ 0 ∧ − result_11_3 + result_11_3 ≤ 0 ∧ result_11_3 − result_11_3 ≤ 0 ∧ − result_11_2 + result_11_2 ≤ 0 ∧ result_11_2 − result_11_2 ≤ 0 ∧ − result_11_1 + result_11_1 ≤ 0 ∧ result_11_1 − result_11_1 ≤ 0 ∧ − result_11_0 + result_11_0 ≤ 0 ∧ result_11_0 − result_11_0 ≤ 0 ∧ − rcd_72_post + rcd_72_post ≤ 0 ∧ rcd_72_post − rcd_72_post ≤ 0 ∧ − rcd_72_0 + rcd_72_0 ≤ 0 ∧ rcd_72_0 − rcd_72_0 ≤ 0 ∧ − rcd_102_post + rcd_102_post ≤ 0 ∧ rcd_102_post − rcd_102_post ≤ 0 ∧ − rcd_102_0 + rcd_102_0 ≤ 0 ∧ rcd_102_0 − rcd_102_0 ≤ 0 ∧ − r_53_post + r_53_post ≤ 0 ∧ r_53_post − r_53_post ≤ 0 ∧ − r_53_0 + r_53_0 ≤ 0 ∧ r_53_0 − r_53_0 ≤ 0 ∧ − r_161_post + r_161_post ≤ 0 ∧ r_161_post − r_161_post ≤ 0 ∧ − r_161_0 + r_161_0 ≤ 0 ∧ r_161_0 − r_161_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 ≤ 0 ∧ − nondet_12_post + nondet_12_post ≤ 0 ∧ nondet_12_post − nondet_12_post ≤ 0 ∧ − nondet_12_1 + nondet_12_1 ≤ 0 ∧ nondet_12_1 − nondet_12_1 ≤ 0 ∧ − nondet_12_0 + nondet_12_0 ≤ 0 ∧ nondet_12_0 − nondet_12_0 ≤ 0 ∧ − lt_37_post + lt_37_post ≤ 0 ∧ lt_37_post − lt_37_post ≤ 0 ∧ − lt_37_1 + lt_37_1 ≤ 0 ∧ lt_37_1 − lt_37_1 ≤ 0 ∧ − lt_37_0 + lt_37_0 ≤ 0 ∧ lt_37_0 − lt_37_0 ≤ 0 ∧ − lt_36_post + lt_36_post ≤ 0 ∧ lt_36_post − lt_36_post ≤ 0 ∧ − lt_36_0 + lt_36_0 ≤ 0 ∧ lt_36_0 − lt_36_0 ≤ 0 ∧ − lt_237_post + lt_237_post ≤ 0 ∧ lt_237_post − lt_237_post ≤ 0 ∧ − lt_237_0 + lt_237_0 ≤ 0 ∧ lt_237_0 − lt_237_0 ≤ 0 ∧ − length_43_post + length_43_post ≤ 0 ∧ length_43_post − length_43_post ≤ 0 ∧ − length_43_0 + length_43_0 ≤ 0 ∧ length_43_0 − length_43_0 ≤ 0 ∧ − len_246_post + len_246_post ≤ 0 ∧ len_246_post − len_246_post ≤ 0 ∧ − len_246_0 + len_246_0 ≤ 0 ∧ len_246_0 − len_246_0 ≤ 0 ∧ − len_180_post + len_180_post ≤ 0 ∧ len_180_post − len_180_post ≤ 0 ∧ − len_180_0 + len_180_0 ≤ 0 ∧ len_180_0 − len_180_0 ≤ 0 ∧ − i_44_post + i_44_post ≤ 0 ∧ i_44_post − i_44_post ≤ 0 ∧ − i_44_0 + i_44_0 ≤ 0 ∧ i_44_0 − i_44_0 ≤ 0 ∧ − i_125_post + i_125_post ≤ 0 ∧ i_125_post − i_125_post ≤ 0 ∧ − i_125_0 + i_125_0 ≤ 0 ∧ i_125_0 − i_125_0 ≤ 0 ∧ − i_108_post + i_108_post ≤ 0 ∧ i_108_post − i_108_post ≤ 0 ∧ − i_108_0 + i_108_0 ≤ 0 ∧ i_108_0 − i_108_0 ≤ 0 ∧ − head_46_post + head_46_post ≤ 0 ∧ head_46_post − head_46_post ≤ 0 ∧ − head_46_0 + head_46_0 ≤ 0 ∧ head_46_0 − head_46_0 ≤ 0 ∧ − fmt_31_post + fmt_31_post ≤ 0 ∧ fmt_31_post − fmt_31_post ≤ 0 ∧ − fmt_31_4 + fmt_31_4 ≤ 0 ∧ fmt_31_4 − fmt_31_4 ≤ 0 ∧ − fmt_31_3 + fmt_31_3 ≤ 0 ∧ fmt_31_3 − fmt_31_3 ≤ 0 ∧ − fmt_31_2 + fmt_31_2 ≤ 0 ∧ fmt_31_2 − fmt_31_2 ≤ 0 ∧ − fmt_31_1 + fmt_31_1 ≤ 0 ∧ fmt_31_1 − fmt_31_1 ≤ 0 ∧ − fmt_31_0 + fmt_31_0 ≤ 0 ∧ fmt_31_0 − fmt_31_0 ≤ 0 ∧ − ct_17_post + ct_17_post ≤ 0 ∧ ct_17_post − ct_17_post ≤ 0 ∧ − ct_17_2 + ct_17_2 ≤ 0 ∧ ct_17_2 − ct_17_2 ≤ 0 ∧ − ct_17_1 + ct_17_1 ≤ 0 ∧ ct_17_1 − ct_17_1 ≤ 0 ∧ − ct_17_0 + ct_17_0 ≤ 0 ∧ ct_17_0 − ct_17_0 ≤ 0 ∧ − a_328_post + a_328_post ≤ 0 ∧ a_328_post − a_328_post ≤ 0 ∧ − a_328_0 + a_328_0 ≤ 0 ∧ a_328_0 − a_328_0 ≤ 0 ∧ − a_305_post + a_305_post ≤ 0 ∧ a_305_post − a_305_post ≤ 0 ∧ − a_305_0 + a_305_0 ≤ 0 ∧ a_305_0 − a_305_0 ≤ 0 ∧ − a_283_post + a_283_post ≤ 0 ∧ a_283_post − a_283_post ≤ 0 ∧ − a_283_0 + a_283_0 ≤ 0 ∧ a_283_0 − a_283_0 ≤ 0 ∧ − a_26_post + a_26_post ≤ 0 ∧ a_26_post − a_26_post ≤ 0 ∧ − a_26_1 + a_26_1 ≤ 0 ∧ a_26_1 − a_26_1 ≤ 0 ∧ − a_26_0 + a_26_0 ≤ 0 ∧ a_26_0 − a_26_0 ≤ 0 ∧ − a_247_post + a_247_post ≤ 0 ∧ a_247_post − a_247_post ≤ 0 ∧ − a_247_0 + a_247_0 ≤ 0 ∧ a_247_0 − a_247_0 ≤ 0 ∧ − a_197_post + a_197_post ≤ 0 ∧ a_197_post − a_197_post ≤ 0 ∧ − a_197_0 + a_197_0 ≤ 0 ∧ a_197_0 − a_197_0 ≤ 0 ∧ − a_146_0 + a_146_0 ≤ 0 ∧ a_146_0 − a_146_0 ≤ 0 | |
| 30 | 43 | 31: | 1 − x_14_0 + y_19_0 ≤ 0 ∧ − y_19_post + y_19_post ≤ 0 ∧ y_19_post − y_19_post ≤ 0 ∧ − y_19_2 + y_19_2 ≤ 0 ∧ y_19_2 − y_19_2 ≤ 0 ∧ − y_19_1 + y_19_1 ≤ 0 ∧ y_19_1 − y_19_1 ≤ 0 ∧ − y_19_0 + y_19_0 ≤ 0 ∧ y_19_0 − y_19_0 ≤ 0 ∧ − x_SLAM_f_18_post + x_SLAM_f_18_post ≤ 0 ∧ x_SLAM_f_18_post − x_SLAM_f_18_post ≤ 0 ∧ − x_SLAM_f_18_2 + x_SLAM_f_18_2 ≤ 0 ∧ x_SLAM_f_18_2 − x_SLAM_f_18_2 ≤ 0 ∧ − x_SLAM_f_18_1 + x_SLAM_f_18_1 ≤ 0 ∧ x_SLAM_f_18_1 − x_SLAM_f_18_1 ≤ 0 ∧ − x_SLAM_f_18_0 + x_SLAM_f_18_0 ≤ 0 ∧ x_SLAM_f_18_0 − x_SLAM_f_18_0 ≤ 0 ∧ − x_34_post + x_34_post ≤ 0 ∧ x_34_post − x_34_post ≤ 0 ∧ − x_34_1 + x_34_1 ≤ 0 ∧ x_34_1 − x_34_1 ≤ 0 ∧ − x_34_0 + x_34_0 ≤ 0 ∧ x_34_0 − x_34_0 ≤ 0 ∧ − x_28_post + x_28_post ≤ 0 ∧ x_28_post − x_28_post ≤ 0 ∧ − x_28_1 + x_28_1 ≤ 0 ∧ x_28_1 − x_28_1 ≤ 0 ∧ − x_28_0 + x_28_0 ≤ 0 ∧ x_28_0 − x_28_0 ≤ 0 ∧ − x_238_post + x_238_post ≤ 0 ∧ x_238_post − x_238_post ≤ 0 ∧ − x_238_0 + x_238_0 ≤ 0 ∧ x_238_0 − x_238_0 ≤ 0 ∧ − x_20_post + x_20_post ≤ 0 ∧ x_20_post − x_20_post ≤ 0 ∧ − x_20_2 + x_20_2 ≤ 0 ∧ x_20_2 − x_20_2 ≤ 0 ∧ − x_20_1 + x_20_1 ≤ 0 ∧ x_20_1 − x_20_1 ≤ 0 ∧ − x_20_0 + x_20_0 ≤ 0 ∧ x_20_0 − x_20_0 ≤ 0 ∧ − x_177_post + x_177_post ≤ 0 ∧ x_177_post − x_177_post ≤ 0 ∧ − x_177_0 + x_177_0 ≤ 0 ∧ x_177_0 − x_177_0 ≤ 0 ∧ − x_16_post + x_16_post ≤ 0 ∧ x_16_post − x_16_post ≤ 0 ∧ − x_16_1 + x_16_1 ≤ 0 ∧ x_16_1 − x_16_1 ≤ 0 ∧ − x_16_0 + x_16_0 ≤ 0 ∧ x_16_0 − x_16_0 ≤ 0 ∧ − x_14_post + x_14_post ≤ 0 ∧ x_14_post − x_14_post ≤ 0 ∧ − x_14_0 + x_14_0 ≤ 0 ∧ x_14_0 − x_14_0 ≤ 0 ∧ − tmp_48_post + tmp_48_post ≤ 0 ∧ tmp_48_post − tmp_48_post ≤ 0 ∧ − tmp_48_0 + tmp_48_0 ≤ 0 ∧ tmp_48_0 − tmp_48_0 ≤ 0 ∧ − temp_49_post + temp_49_post ≤ 0 ∧ temp_49_post − temp_49_post ≤ 0 ∧ − temp_49_0 + temp_49_0 ≤ 0 ∧ temp_49_0 − temp_49_0 ≤ 0 ∧ − temp0_45_post + temp0_45_post ≤ 0 ∧ temp0_45_post − temp0_45_post ≤ 0 ∧ − temp0_45_1 + temp0_45_1 ≤ 0 ∧ temp0_45_1 − temp0_45_1 ≤ 0 ∧ − temp0_45_0 + temp0_45_0 ≤ 0 ∧ temp0_45_0 − temp0_45_0 ≤ 0 ∧ − temp0_32_post + temp0_32_post ≤ 0 ∧ temp0_32_post − temp0_32_post ≤ 0 ∧ − temp0_32_4 + temp0_32_4 ≤ 0 ∧ temp0_32_4 − temp0_32_4 ≤ 0 ∧ − temp0_32_3 + temp0_32_3 ≤ 0 ∧ temp0_32_3 − temp0_32_3 ≤ 0 ∧ − temp0_32_2 + temp0_32_2 ≤ 0 ∧ temp0_32_2 − temp0_32_2 ≤ 0 ∧ − temp0_32_1 + temp0_32_1 ≤ 0 ∧ temp0_32_1 − temp0_32_1 ≤ 0 ∧ − temp0_32_0 + temp0_32_0 ≤ 0 ∧ temp0_32_0 − temp0_32_0 ≤ 0 ∧ − temp0_15_0 + temp0_15_0 ≤ 0 ∧ temp0_15_0 − temp0_15_0 ≤ 0 ∧ − t_23_post + t_23_post ≤ 0 ∧ t_23_post − t_23_post ≤ 0 ∧ − t_23_1 + t_23_1 ≤ 0 ∧ t_23_1 − t_23_1 ≤ 0 ∧ − t_23_0 + t_23_0 ≤ 0 ∧ t_23_0 − t_23_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_post + result_dot_printf_sdv_special_RETURN_VALUE_41_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_post − result_dot_printf_sdv_special_RETURN_VALUE_41_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_1 + result_dot_printf_sdv_special_RETURN_VALUE_41_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_1 − result_dot_printf_sdv_special_RETURN_VALUE_41_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_0 + result_dot_printf_sdv_special_RETURN_VALUE_41_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_0 − result_dot_printf_sdv_special_RETURN_VALUE_41_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_post + result_dot_printf_sdv_special_RETURN_VALUE_38_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_post − result_dot_printf_sdv_special_RETURN_VALUE_38_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_1 + result_dot_printf_sdv_special_RETURN_VALUE_38_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_1 − result_dot_printf_sdv_special_RETURN_VALUE_38_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_0 + result_dot_printf_sdv_special_RETURN_VALUE_38_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_0 − result_dot_printf_sdv_special_RETURN_VALUE_38_0 ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_post + result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_post − result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_1 + result_dot_nondet_sdv_special_RETURN_VALUE_13_1 ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_1 − result_dot_nondet_sdv_special_RETURN_VALUE_13_1 ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_0 + result_dot_nondet_sdv_special_RETURN_VALUE_13_0 ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_0 − result_dot_nondet_sdv_special_RETURN_VALUE_13_0 ≤ 0 ∧ − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post + result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post ≤ 0 ∧ result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post ≤ 0 ∧ − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 + result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 ≤ 0 ∧ result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 ≤ 0 ∧ − result_11_post + result_11_post ≤ 0 ∧ result_11_post − result_11_post ≤ 0 ∧ − result_11_6 + result_11_6 ≤ 0 ∧ result_11_6 − result_11_6 ≤ 0 ∧ − result_11_5 + result_11_5 ≤ 0 ∧ result_11_5 − result_11_5 ≤ 0 ∧ − result_11_4 + result_11_4 ≤ 0 ∧ result_11_4 − result_11_4 ≤ 0 ∧ − result_11_3 + result_11_3 ≤ 0 ∧ result_11_3 − result_11_3 ≤ 0 ∧ − result_11_2 + result_11_2 ≤ 0 ∧ result_11_2 − result_11_2 ≤ 0 ∧ − result_11_1 + result_11_1 ≤ 0 ∧ result_11_1 − result_11_1 ≤ 0 ∧ − result_11_0 + result_11_0 ≤ 0 ∧ result_11_0 − result_11_0 ≤ 0 ∧ − rcd_72_post + rcd_72_post ≤ 0 ∧ rcd_72_post − rcd_72_post ≤ 0 ∧ − rcd_72_0 + rcd_72_0 ≤ 0 ∧ rcd_72_0 − rcd_72_0 ≤ 0 ∧ − rcd_102_post + rcd_102_post ≤ 0 ∧ rcd_102_post − rcd_102_post ≤ 0 ∧ − rcd_102_0 + rcd_102_0 ≤ 0 ∧ rcd_102_0 − rcd_102_0 ≤ 0 ∧ − r_53_post + r_53_post ≤ 0 ∧ r_53_post − r_53_post ≤ 0 ∧ − r_53_0 + r_53_0 ≤ 0 ∧ r_53_0 − r_53_0 ≤ 0 ∧ − r_161_post + r_161_post ≤ 0 ∧ r_161_post − r_161_post ≤ 0 ∧ − r_161_0 + r_161_0 ≤ 0 ∧ r_161_0 − r_161_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 ≤ 0 ∧ − nondet_12_post + nondet_12_post ≤ 0 ∧ nondet_12_post − nondet_12_post ≤ 0 ∧ − nondet_12_1 + nondet_12_1 ≤ 0 ∧ nondet_12_1 − nondet_12_1 ≤ 0 ∧ − nondet_12_0 + nondet_12_0 ≤ 0 ∧ nondet_12_0 − nondet_12_0 ≤ 0 ∧ − lt_37_post + lt_37_post ≤ 0 ∧ lt_37_post − lt_37_post ≤ 0 ∧ − lt_37_1 + lt_37_1 ≤ 0 ∧ lt_37_1 − lt_37_1 ≤ 0 ∧ − lt_37_0 + lt_37_0 ≤ 0 ∧ lt_37_0 − lt_37_0 ≤ 0 ∧ − lt_36_post + lt_36_post ≤ 0 ∧ lt_36_post − lt_36_post ≤ 0 ∧ − lt_36_0 + lt_36_0 ≤ 0 ∧ lt_36_0 − lt_36_0 ≤ 0 ∧ − lt_237_post + lt_237_post ≤ 0 ∧ lt_237_post − lt_237_post ≤ 0 ∧ − lt_237_0 + lt_237_0 ≤ 0 ∧ lt_237_0 − lt_237_0 ≤ 0 ∧ − length_43_post + length_43_post ≤ 0 ∧ length_43_post − length_43_post ≤ 0 ∧ − length_43_0 + length_43_0 ≤ 0 ∧ length_43_0 − length_43_0 ≤ 0 ∧ − len_246_post + len_246_post ≤ 0 ∧ len_246_post − len_246_post ≤ 0 ∧ − len_246_0 + len_246_0 ≤ 0 ∧ len_246_0 − len_246_0 ≤ 0 ∧ − len_180_post + len_180_post ≤ 0 ∧ len_180_post − len_180_post ≤ 0 ∧ − len_180_0 + len_180_0 ≤ 0 ∧ len_180_0 − len_180_0 ≤ 0 ∧ − i_44_post + i_44_post ≤ 0 ∧ i_44_post − i_44_post ≤ 0 ∧ − i_44_0 + i_44_0 ≤ 0 ∧ i_44_0 − i_44_0 ≤ 0 ∧ − i_125_post + i_125_post ≤ 0 ∧ i_125_post − i_125_post ≤ 0 ∧ − i_125_0 + i_125_0 ≤ 0 ∧ i_125_0 − i_125_0 ≤ 0 ∧ − i_108_post + i_108_post ≤ 0 ∧ i_108_post − i_108_post ≤ 0 ∧ − i_108_0 + i_108_0 ≤ 0 ∧ i_108_0 − i_108_0 ≤ 0 ∧ − head_46_post + head_46_post ≤ 0 ∧ head_46_post − head_46_post ≤ 0 ∧ − head_46_0 + head_46_0 ≤ 0 ∧ head_46_0 − head_46_0 ≤ 0 ∧ − fmt_31_post + fmt_31_post ≤ 0 ∧ fmt_31_post − fmt_31_post ≤ 0 ∧ − fmt_31_4 + fmt_31_4 ≤ 0 ∧ fmt_31_4 − fmt_31_4 ≤ 0 ∧ − fmt_31_3 + fmt_31_3 ≤ 0 ∧ fmt_31_3 − fmt_31_3 ≤ 0 ∧ − fmt_31_2 + fmt_31_2 ≤ 0 ∧ fmt_31_2 − fmt_31_2 ≤ 0 ∧ − fmt_31_1 + fmt_31_1 ≤ 0 ∧ fmt_31_1 − fmt_31_1 ≤ 0 ∧ − fmt_31_0 + fmt_31_0 ≤ 0 ∧ fmt_31_0 − fmt_31_0 ≤ 0 ∧ − ct_17_post + ct_17_post ≤ 0 ∧ ct_17_post − ct_17_post ≤ 0 ∧ − ct_17_2 + ct_17_2 ≤ 0 ∧ ct_17_2 − ct_17_2 ≤ 0 ∧ − ct_17_1 + ct_17_1 ≤ 0 ∧ ct_17_1 − ct_17_1 ≤ 0 ∧ − ct_17_0 + ct_17_0 ≤ 0 ∧ ct_17_0 − ct_17_0 ≤ 0 ∧ − a_328_post + a_328_post ≤ 0 ∧ a_328_post − a_328_post ≤ 0 ∧ − a_328_0 + a_328_0 ≤ 0 ∧ a_328_0 − a_328_0 ≤ 0 ∧ − a_305_post + a_305_post ≤ 0 ∧ a_305_post − a_305_post ≤ 0 ∧ − a_305_0 + a_305_0 ≤ 0 ∧ a_305_0 − a_305_0 ≤ 0 ∧ − a_283_post + a_283_post ≤ 0 ∧ a_283_post − a_283_post ≤ 0 ∧ − a_283_0 + a_283_0 ≤ 0 ∧ a_283_0 − a_283_0 ≤ 0 ∧ − a_26_post + a_26_post ≤ 0 ∧ a_26_post − a_26_post ≤ 0 ∧ − a_26_1 + a_26_1 ≤ 0 ∧ a_26_1 − a_26_1 ≤ 0 ∧ − a_26_0 + a_26_0 ≤ 0 ∧ a_26_0 − a_26_0 ≤ 0 ∧ − a_247_post + a_247_post ≤ 0 ∧ a_247_post − a_247_post ≤ 0 ∧ − a_247_0 + a_247_0 ≤ 0 ∧ a_247_0 − a_247_0 ≤ 0 ∧ − a_197_post + a_197_post ≤ 0 ∧ a_197_post − a_197_post ≤ 0 ∧ − a_197_0 + a_197_0 ≤ 0 ∧ a_197_0 − a_197_0 ≤ 0 ∧ − a_146_0 + a_146_0 ≤ 0 ∧ a_146_0 − a_146_0 ≤ 0 | |
| 31 | 44 | 32: | 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 1 − result_dot_nondet_sdv_special_RETURN_VALUE_13_0 ≤ 0 ∧ −1 + result_dot_nondet_sdv_special_RETURN_VALUE_13_0 ≤ 0 ∧ − x_20_0 + y_19_0 ≤ 0 ∧ x_20_0 − y_19_0 ≤ 0 ∧ result_11_post − temp0_15_0 ≤ 0 ∧ − result_11_post + temp0_15_0 ≤ 0 ∧ ct_17_0 − ct_17_post ≤ 0 ∧ − ct_17_0 + ct_17_post ≤ 0 ∧ result_11_0 − result_11_post ≤ 0 ∧ − result_11_0 + result_11_post ≤ 0 ∧ t_23_0 − t_23_post ≤ 0 ∧ − t_23_0 + t_23_post ≤ 0 ∧ x_14_0 − x_14_post ≤ 0 ∧ − x_14_0 + x_14_post ≤ 0 ∧ x_16_0 − x_16_post ≤ 0 ∧ − x_16_0 + x_16_post ≤ 0 ∧ x_20_0 − x_20_post ≤ 0 ∧ − x_20_0 + x_20_post ≤ 0 ∧ x_SLAM_f_18_0 − x_SLAM_f_18_post ≤ 0 ∧ − x_SLAM_f_18_0 + x_SLAM_f_18_post ≤ 0 ∧ y_19_0 − y_19_post ≤ 0 ∧ − y_19_0 + y_19_post ≤ 0 ∧ − y_19_2 + y_19_2 ≤ 0 ∧ y_19_2 − y_19_2 ≤ 0 ∧ − x_SLAM_f_18_2 + x_SLAM_f_18_2 ≤ 0 ∧ x_SLAM_f_18_2 − x_SLAM_f_18_2 ≤ 0 ∧ − x_34_post + x_34_post ≤ 0 ∧ x_34_post − x_34_post ≤ 0 ∧ − x_34_1 + x_34_1 ≤ 0 ∧ x_34_1 − x_34_1 ≤ 0 ∧ − x_34_0 + x_34_0 ≤ 0 ∧ x_34_0 − x_34_0 ≤ 0 ∧ − x_28_post + x_28_post ≤ 0 ∧ x_28_post − x_28_post ≤ 0 ∧ − x_28_1 + x_28_1 ≤ 0 ∧ x_28_1 − x_28_1 ≤ 0 ∧ − x_28_0 + x_28_0 ≤ 0 ∧ x_28_0 − x_28_0 ≤ 0 ∧ − x_238_post + x_238_post ≤ 0 ∧ x_238_post − x_238_post ≤ 0 ∧ − x_238_0 + x_238_0 ≤ 0 ∧ x_238_0 − x_238_0 ≤ 0 ∧ − x_20_2 + x_20_2 ≤ 0 ∧ x_20_2 − x_20_2 ≤ 0 ∧ − x_177_post + x_177_post ≤ 0 ∧ x_177_post − x_177_post ≤ 0 ∧ − x_177_0 + x_177_0 ≤ 0 ∧ x_177_0 − x_177_0 ≤ 0 ∧ − x_16_1 + x_16_1 ≤ 0 ∧ x_16_1 − x_16_1 ≤ 0 ∧ − tmp_48_post + tmp_48_post ≤ 0 ∧ tmp_48_post − tmp_48_post ≤ 0 ∧ − tmp_48_0 + tmp_48_0 ≤ 0 ∧ tmp_48_0 − tmp_48_0 ≤ 0 ∧ − temp_49_post + temp_49_post ≤ 0 ∧ temp_49_post − temp_49_post ≤ 0 ∧ − temp_49_0 + temp_49_0 ≤ 0 ∧ temp_49_0 − temp_49_0 ≤ 0 ∧ − temp0_45_post + temp0_45_post ≤ 0 ∧ temp0_45_post − temp0_45_post ≤ 0 ∧ − temp0_45_1 + temp0_45_1 ≤ 0 ∧ temp0_45_1 − temp0_45_1 ≤ 0 ∧ − temp0_45_0 + temp0_45_0 ≤ 0 ∧ temp0_45_0 − temp0_45_0 ≤ 0 ∧ − temp0_32_post + temp0_32_post ≤ 0 ∧ temp0_32_post − temp0_32_post ≤ 0 ∧ − temp0_32_4 + temp0_32_4 ≤ 0 ∧ temp0_32_4 − temp0_32_4 ≤ 0 ∧ − temp0_32_3 + temp0_32_3 ≤ 0 ∧ temp0_32_3 − temp0_32_3 ≤ 0 ∧ − temp0_32_2 + temp0_32_2 ≤ 0 ∧ temp0_32_2 − temp0_32_2 ≤ 0 ∧ − temp0_32_1 + temp0_32_1 ≤ 0 ∧ temp0_32_1 − temp0_32_1 ≤ 0 ∧ − temp0_32_0 + temp0_32_0 ≤ 0 ∧ temp0_32_0 − temp0_32_0 ≤ 0 ∧ − temp0_15_0 + temp0_15_0 ≤ 0 ∧ temp0_15_0 − temp0_15_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_post + result_dot_printf_sdv_special_RETURN_VALUE_41_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_post − result_dot_printf_sdv_special_RETURN_VALUE_41_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_1 + result_dot_printf_sdv_special_RETURN_VALUE_41_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_1 − result_dot_printf_sdv_special_RETURN_VALUE_41_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_0 + result_dot_printf_sdv_special_RETURN_VALUE_41_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_0 − result_dot_printf_sdv_special_RETURN_VALUE_41_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_post + result_dot_printf_sdv_special_RETURN_VALUE_38_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_post − result_dot_printf_sdv_special_RETURN_VALUE_38_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_1 + result_dot_printf_sdv_special_RETURN_VALUE_38_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_1 − result_dot_printf_sdv_special_RETURN_VALUE_38_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_0 + result_dot_printf_sdv_special_RETURN_VALUE_38_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_0 − result_dot_printf_sdv_special_RETURN_VALUE_38_0 ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_post + result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_post − result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_1 + result_dot_nondet_sdv_special_RETURN_VALUE_13_1 ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_1 − result_dot_nondet_sdv_special_RETURN_VALUE_13_1 ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_0 + result_dot_nondet_sdv_special_RETURN_VALUE_13_0 ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_0 − result_dot_nondet_sdv_special_RETURN_VALUE_13_0 ≤ 0 ∧ − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post + result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post ≤ 0 ∧ result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post ≤ 0 ∧ − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 + result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 ≤ 0 ∧ result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 ≤ 0 ∧ − result_11_6 + result_11_6 ≤ 0 ∧ result_11_6 − result_11_6 ≤ 0 ∧ − result_11_5 + result_11_5 ≤ 0 ∧ result_11_5 − result_11_5 ≤ 0 ∧ − result_11_4 + result_11_4 ≤ 0 ∧ result_11_4 − result_11_4 ≤ 0 ∧ − result_11_3 + result_11_3 ≤ 0 ∧ result_11_3 − result_11_3 ≤ 0 ∧ − result_11_2 + result_11_2 ≤ 0 ∧ result_11_2 − result_11_2 ≤ 0 ∧ − result_11_1 + result_11_1 ≤ 0 ∧ result_11_1 − result_11_1 ≤ 0 ∧ − rcd_72_post + rcd_72_post ≤ 0 ∧ rcd_72_post − rcd_72_post ≤ 0 ∧ − rcd_72_0 + rcd_72_0 ≤ 0 ∧ rcd_72_0 − rcd_72_0 ≤ 0 ∧ − rcd_102_post + rcd_102_post ≤ 0 ∧ rcd_102_post − rcd_102_post ≤ 0 ∧ − rcd_102_0 + rcd_102_0 ≤ 0 ∧ rcd_102_0 − rcd_102_0 ≤ 0 ∧ − r_53_post + r_53_post ≤ 0 ∧ r_53_post − r_53_post ≤ 0 ∧ − r_53_0 + r_53_0 ≤ 0 ∧ r_53_0 − r_53_0 ≤ 0 ∧ − r_161_post + r_161_post ≤ 0 ∧ r_161_post − r_161_post ≤ 0 ∧ − r_161_0 + r_161_0 ≤ 0 ∧ r_161_0 − r_161_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 ≤ 0 ∧ − nondet_12_post + nondet_12_post ≤ 0 ∧ nondet_12_post − nondet_12_post ≤ 0 ∧ − nondet_12_1 + nondet_12_1 ≤ 0 ∧ nondet_12_1 − nondet_12_1 ≤ 0 ∧ − nondet_12_0 + nondet_12_0 ≤ 0 ∧ nondet_12_0 − nondet_12_0 ≤ 0 ∧ − lt_37_post + lt_37_post ≤ 0 ∧ lt_37_post − lt_37_post ≤ 0 ∧ − lt_37_1 + lt_37_1 ≤ 0 ∧ lt_37_1 − lt_37_1 ≤ 0 ∧ − lt_37_0 + lt_37_0 ≤ 0 ∧ lt_37_0 − lt_37_0 ≤ 0 ∧ − lt_36_post + lt_36_post ≤ 0 ∧ lt_36_post − lt_36_post ≤ 0 ∧ − lt_36_0 + lt_36_0 ≤ 0 ∧ lt_36_0 − lt_36_0 ≤ 0 ∧ − lt_237_post + lt_237_post ≤ 0 ∧ lt_237_post − lt_237_post ≤ 0 ∧ − lt_237_0 + lt_237_0 ≤ 0 ∧ lt_237_0 − lt_237_0 ≤ 0 ∧ − length_43_post + length_43_post ≤ 0 ∧ length_43_post − length_43_post ≤ 0 ∧ − length_43_0 + length_43_0 ≤ 0 ∧ length_43_0 − length_43_0 ≤ 0 ∧ − len_246_post + len_246_post ≤ 0 ∧ len_246_post − len_246_post ≤ 0 ∧ − len_246_0 + len_246_0 ≤ 0 ∧ len_246_0 − len_246_0 ≤ 0 ∧ − len_180_post + len_180_post ≤ 0 ∧ len_180_post − len_180_post ≤ 0 ∧ − len_180_0 + len_180_0 ≤ 0 ∧ len_180_0 − len_180_0 ≤ 0 ∧ − i_44_post + i_44_post ≤ 0 ∧ i_44_post − i_44_post ≤ 0 ∧ − i_44_0 + i_44_0 ≤ 0 ∧ i_44_0 − i_44_0 ≤ 0 ∧ − i_125_post + i_125_post ≤ 0 ∧ i_125_post − i_125_post ≤ 0 ∧ − i_125_0 + i_125_0 ≤ 0 ∧ i_125_0 − i_125_0 ≤ 0 ∧ − i_108_post + i_108_post ≤ 0 ∧ i_108_post − i_108_post ≤ 0 ∧ − i_108_0 + i_108_0 ≤ 0 ∧ i_108_0 − i_108_0 ≤ 0 ∧ − head_46_post + head_46_post ≤ 0 ∧ head_46_post − head_46_post ≤ 0 ∧ − head_46_0 + head_46_0 ≤ 0 ∧ head_46_0 − head_46_0 ≤ 0 ∧ − fmt_31_post + fmt_31_post ≤ 0 ∧ fmt_31_post − fmt_31_post ≤ 0 ∧ − fmt_31_4 + fmt_31_4 ≤ 0 ∧ fmt_31_4 − fmt_31_4 ≤ 0 ∧ − fmt_31_3 + fmt_31_3 ≤ 0 ∧ fmt_31_3 − fmt_31_3 ≤ 0 ∧ − fmt_31_2 + fmt_31_2 ≤ 0 ∧ fmt_31_2 − fmt_31_2 ≤ 0 ∧ − fmt_31_1 + fmt_31_1 ≤ 0 ∧ fmt_31_1 − fmt_31_1 ≤ 0 ∧ − fmt_31_0 + fmt_31_0 ≤ 0 ∧ fmt_31_0 − fmt_31_0 ≤ 0 ∧ − ct_17_2 + ct_17_2 ≤ 0 ∧ ct_17_2 − ct_17_2 ≤ 0 ∧ − a_328_post + a_328_post ≤ 0 ∧ a_328_post − a_328_post ≤ 0 ∧ − a_328_0 + a_328_0 ≤ 0 ∧ a_328_0 − a_328_0 ≤ 0 ∧ − a_305_post + a_305_post ≤ 0 ∧ a_305_post − a_305_post ≤ 0 ∧ − a_305_0 + a_305_0 ≤ 0 ∧ a_305_0 − a_305_0 ≤ 0 ∧ − a_283_post + a_283_post ≤ 0 ∧ a_283_post − a_283_post ≤ 0 ∧ − a_283_0 + a_283_0 ≤ 0 ∧ a_283_0 − a_283_0 ≤ 0 ∧ − a_26_post + a_26_post ≤ 0 ∧ a_26_post − a_26_post ≤ 0 ∧ − a_26_1 + a_26_1 ≤ 0 ∧ a_26_1 − a_26_1 ≤ 0 ∧ − a_26_0 + a_26_0 ≤ 0 ∧ a_26_0 − a_26_0 ≤ 0 ∧ − a_247_post + a_247_post ≤ 0 ∧ a_247_post − a_247_post ≤ 0 ∧ − a_247_0 + a_247_0 ≤ 0 ∧ a_247_0 − a_247_0 ≤ 0 ∧ − a_197_post + a_197_post ≤ 0 ∧ a_197_post − a_197_post ≤ 0 ∧ − a_197_0 + a_197_0 ≤ 0 ∧ a_197_0 − a_197_0 ≤ 0 ∧ − a_146_0 + a_146_0 ≤ 0 ∧ a_146_0 − a_146_0 ≤ 0 | |
| 32 | 45 | 3: | 1 − x_14_0 ≤ 0 ∧ − y_19_post + y_19_post ≤ 0 ∧ y_19_post − y_19_post ≤ 0 ∧ − y_19_2 + y_19_2 ≤ 0 ∧ y_19_2 − y_19_2 ≤ 0 ∧ − y_19_1 + y_19_1 ≤ 0 ∧ y_19_1 − y_19_1 ≤ 0 ∧ − y_19_0 + y_19_0 ≤ 0 ∧ y_19_0 − y_19_0 ≤ 0 ∧ − x_SLAM_f_18_post + x_SLAM_f_18_post ≤ 0 ∧ x_SLAM_f_18_post − x_SLAM_f_18_post ≤ 0 ∧ − x_SLAM_f_18_2 + x_SLAM_f_18_2 ≤ 0 ∧ x_SLAM_f_18_2 − x_SLAM_f_18_2 ≤ 0 ∧ − x_SLAM_f_18_1 + x_SLAM_f_18_1 ≤ 0 ∧ x_SLAM_f_18_1 − x_SLAM_f_18_1 ≤ 0 ∧ − x_SLAM_f_18_0 + x_SLAM_f_18_0 ≤ 0 ∧ x_SLAM_f_18_0 − x_SLAM_f_18_0 ≤ 0 ∧ − x_34_post + x_34_post ≤ 0 ∧ x_34_post − x_34_post ≤ 0 ∧ − x_34_1 + x_34_1 ≤ 0 ∧ x_34_1 − x_34_1 ≤ 0 ∧ − x_34_0 + x_34_0 ≤ 0 ∧ x_34_0 − x_34_0 ≤ 0 ∧ − x_28_post + x_28_post ≤ 0 ∧ x_28_post − x_28_post ≤ 0 ∧ − x_28_1 + x_28_1 ≤ 0 ∧ x_28_1 − x_28_1 ≤ 0 ∧ − x_28_0 + x_28_0 ≤ 0 ∧ x_28_0 − x_28_0 ≤ 0 ∧ − x_238_post + x_238_post ≤ 0 ∧ x_238_post − x_238_post ≤ 0 ∧ − x_238_0 + x_238_0 ≤ 0 ∧ x_238_0 − x_238_0 ≤ 0 ∧ − x_20_post + x_20_post ≤ 0 ∧ x_20_post − x_20_post ≤ 0 ∧ − x_20_2 + x_20_2 ≤ 0 ∧ x_20_2 − x_20_2 ≤ 0 ∧ − x_20_1 + x_20_1 ≤ 0 ∧ x_20_1 − x_20_1 ≤ 0 ∧ − x_20_0 + x_20_0 ≤ 0 ∧ x_20_0 − x_20_0 ≤ 0 ∧ − x_177_post + x_177_post ≤ 0 ∧ x_177_post − x_177_post ≤ 0 ∧ − x_177_0 + x_177_0 ≤ 0 ∧ x_177_0 − x_177_0 ≤ 0 ∧ − x_16_post + x_16_post ≤ 0 ∧ x_16_post − x_16_post ≤ 0 ∧ − x_16_1 + x_16_1 ≤ 0 ∧ x_16_1 − x_16_1 ≤ 0 ∧ − x_16_0 + x_16_0 ≤ 0 ∧ x_16_0 − x_16_0 ≤ 0 ∧ − x_14_post + x_14_post ≤ 0 ∧ x_14_post − x_14_post ≤ 0 ∧ − x_14_0 + x_14_0 ≤ 0 ∧ x_14_0 − x_14_0 ≤ 0 ∧ − tmp_48_post + tmp_48_post ≤ 0 ∧ tmp_48_post − tmp_48_post ≤ 0 ∧ − tmp_48_0 + tmp_48_0 ≤ 0 ∧ tmp_48_0 − tmp_48_0 ≤ 0 ∧ − temp_49_post + temp_49_post ≤ 0 ∧ temp_49_post − temp_49_post ≤ 0 ∧ − temp_49_0 + temp_49_0 ≤ 0 ∧ temp_49_0 − temp_49_0 ≤ 0 ∧ − temp0_45_post + temp0_45_post ≤ 0 ∧ temp0_45_post − temp0_45_post ≤ 0 ∧ − temp0_45_1 + temp0_45_1 ≤ 0 ∧ temp0_45_1 − temp0_45_1 ≤ 0 ∧ − temp0_45_0 + temp0_45_0 ≤ 0 ∧ temp0_45_0 − temp0_45_0 ≤ 0 ∧ − temp0_32_post + temp0_32_post ≤ 0 ∧ temp0_32_post − temp0_32_post ≤ 0 ∧ − temp0_32_4 + temp0_32_4 ≤ 0 ∧ temp0_32_4 − temp0_32_4 ≤ 0 ∧ − temp0_32_3 + temp0_32_3 ≤ 0 ∧ temp0_32_3 − temp0_32_3 ≤ 0 ∧ − temp0_32_2 + temp0_32_2 ≤ 0 ∧ temp0_32_2 − temp0_32_2 ≤ 0 ∧ − temp0_32_1 + temp0_32_1 ≤ 0 ∧ temp0_32_1 − temp0_32_1 ≤ 0 ∧ − temp0_32_0 + temp0_32_0 ≤ 0 ∧ temp0_32_0 − temp0_32_0 ≤ 0 ∧ − temp0_15_0 + temp0_15_0 ≤ 0 ∧ temp0_15_0 − temp0_15_0 ≤ 0 ∧ − t_23_post + t_23_post ≤ 0 ∧ t_23_post − t_23_post ≤ 0 ∧ − t_23_1 + t_23_1 ≤ 0 ∧ t_23_1 − t_23_1 ≤ 0 ∧ − t_23_0 + t_23_0 ≤ 0 ∧ t_23_0 − t_23_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_post + result_dot_printf_sdv_special_RETURN_VALUE_41_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_post − result_dot_printf_sdv_special_RETURN_VALUE_41_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_1 + result_dot_printf_sdv_special_RETURN_VALUE_41_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_1 − result_dot_printf_sdv_special_RETURN_VALUE_41_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_0 + result_dot_printf_sdv_special_RETURN_VALUE_41_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_0 − result_dot_printf_sdv_special_RETURN_VALUE_41_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_post + result_dot_printf_sdv_special_RETURN_VALUE_38_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_post − result_dot_printf_sdv_special_RETURN_VALUE_38_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_1 + result_dot_printf_sdv_special_RETURN_VALUE_38_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_1 − result_dot_printf_sdv_special_RETURN_VALUE_38_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_0 + result_dot_printf_sdv_special_RETURN_VALUE_38_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_0 − result_dot_printf_sdv_special_RETURN_VALUE_38_0 ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_post + result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_post − result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_1 + result_dot_nondet_sdv_special_RETURN_VALUE_13_1 ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_1 − result_dot_nondet_sdv_special_RETURN_VALUE_13_1 ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_0 + result_dot_nondet_sdv_special_RETURN_VALUE_13_0 ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_0 − result_dot_nondet_sdv_special_RETURN_VALUE_13_0 ≤ 0 ∧ − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post + result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post ≤ 0 ∧ result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post ≤ 0 ∧ − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 + result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 ≤ 0 ∧ result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 ≤ 0 ∧ − result_11_post + result_11_post ≤ 0 ∧ result_11_post − result_11_post ≤ 0 ∧ − result_11_6 + result_11_6 ≤ 0 ∧ result_11_6 − result_11_6 ≤ 0 ∧ − result_11_5 + result_11_5 ≤ 0 ∧ result_11_5 − result_11_5 ≤ 0 ∧ − result_11_4 + result_11_4 ≤ 0 ∧ result_11_4 − result_11_4 ≤ 0 ∧ − result_11_3 + result_11_3 ≤ 0 ∧ result_11_3 − result_11_3 ≤ 0 ∧ − result_11_2 + result_11_2 ≤ 0 ∧ result_11_2 − result_11_2 ≤ 0 ∧ − result_11_1 + result_11_1 ≤ 0 ∧ result_11_1 − result_11_1 ≤ 0 ∧ − result_11_0 + result_11_0 ≤ 0 ∧ result_11_0 − result_11_0 ≤ 0 ∧ − rcd_72_post + rcd_72_post ≤ 0 ∧ rcd_72_post − rcd_72_post ≤ 0 ∧ − rcd_72_0 + rcd_72_0 ≤ 0 ∧ rcd_72_0 − rcd_72_0 ≤ 0 ∧ − rcd_102_post + rcd_102_post ≤ 0 ∧ rcd_102_post − rcd_102_post ≤ 0 ∧ − rcd_102_0 + rcd_102_0 ≤ 0 ∧ rcd_102_0 − rcd_102_0 ≤ 0 ∧ − r_53_post + r_53_post ≤ 0 ∧ r_53_post − r_53_post ≤ 0 ∧ − r_53_0 + r_53_0 ≤ 0 ∧ r_53_0 − r_53_0 ≤ 0 ∧ − r_161_post + r_161_post ≤ 0 ∧ r_161_post − r_161_post ≤ 0 ∧ − r_161_0 + r_161_0 ≤ 0 ∧ r_161_0 − r_161_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 ≤ 0 ∧ − nondet_12_post + nondet_12_post ≤ 0 ∧ nondet_12_post − nondet_12_post ≤ 0 ∧ − nondet_12_1 + nondet_12_1 ≤ 0 ∧ nondet_12_1 − nondet_12_1 ≤ 0 ∧ − nondet_12_0 + nondet_12_0 ≤ 0 ∧ nondet_12_0 − nondet_12_0 ≤ 0 ∧ − lt_37_post + lt_37_post ≤ 0 ∧ lt_37_post − lt_37_post ≤ 0 ∧ − lt_37_1 + lt_37_1 ≤ 0 ∧ lt_37_1 − lt_37_1 ≤ 0 ∧ − lt_37_0 + lt_37_0 ≤ 0 ∧ lt_37_0 − lt_37_0 ≤ 0 ∧ − lt_36_post + lt_36_post ≤ 0 ∧ lt_36_post − lt_36_post ≤ 0 ∧ − lt_36_0 + lt_36_0 ≤ 0 ∧ lt_36_0 − lt_36_0 ≤ 0 ∧ − lt_237_post + lt_237_post ≤ 0 ∧ lt_237_post − lt_237_post ≤ 0 ∧ − lt_237_0 + lt_237_0 ≤ 0 ∧ lt_237_0 − lt_237_0 ≤ 0 ∧ − length_43_post + length_43_post ≤ 0 ∧ length_43_post − length_43_post ≤ 0 ∧ − length_43_0 + length_43_0 ≤ 0 ∧ length_43_0 − length_43_0 ≤ 0 ∧ − len_246_post + len_246_post ≤ 0 ∧ len_246_post − len_246_post ≤ 0 ∧ − len_246_0 + len_246_0 ≤ 0 ∧ len_246_0 − len_246_0 ≤ 0 ∧ − len_180_post + len_180_post ≤ 0 ∧ len_180_post − len_180_post ≤ 0 ∧ − len_180_0 + len_180_0 ≤ 0 ∧ len_180_0 − len_180_0 ≤ 0 ∧ − i_44_post + i_44_post ≤ 0 ∧ i_44_post − i_44_post ≤ 0 ∧ − i_44_0 + i_44_0 ≤ 0 ∧ i_44_0 − i_44_0 ≤ 0 ∧ − i_125_post + i_125_post ≤ 0 ∧ i_125_post − i_125_post ≤ 0 ∧ − i_125_0 + i_125_0 ≤ 0 ∧ i_125_0 − i_125_0 ≤ 0 ∧ − i_108_post + i_108_post ≤ 0 ∧ i_108_post − i_108_post ≤ 0 ∧ − i_108_0 + i_108_0 ≤ 0 ∧ i_108_0 − i_108_0 ≤ 0 ∧ − head_46_post + head_46_post ≤ 0 ∧ head_46_post − head_46_post ≤ 0 ∧ − head_46_0 + head_46_0 ≤ 0 ∧ head_46_0 − head_46_0 ≤ 0 ∧ − fmt_31_post + fmt_31_post ≤ 0 ∧ fmt_31_post − fmt_31_post ≤ 0 ∧ − fmt_31_4 + fmt_31_4 ≤ 0 ∧ fmt_31_4 − fmt_31_4 ≤ 0 ∧ − fmt_31_3 + fmt_31_3 ≤ 0 ∧ fmt_31_3 − fmt_31_3 ≤ 0 ∧ − fmt_31_2 + fmt_31_2 ≤ 0 ∧ fmt_31_2 − fmt_31_2 ≤ 0 ∧ − fmt_31_1 + fmt_31_1 ≤ 0 ∧ fmt_31_1 − fmt_31_1 ≤ 0 ∧ − fmt_31_0 + fmt_31_0 ≤ 0 ∧ fmt_31_0 − fmt_31_0 ≤ 0 ∧ − ct_17_post + ct_17_post ≤ 0 ∧ ct_17_post − ct_17_post ≤ 0 ∧ − ct_17_2 + ct_17_2 ≤ 0 ∧ ct_17_2 − ct_17_2 ≤ 0 ∧ − ct_17_1 + ct_17_1 ≤ 0 ∧ ct_17_1 − ct_17_1 ≤ 0 ∧ − ct_17_0 + ct_17_0 ≤ 0 ∧ ct_17_0 − ct_17_0 ≤ 0 ∧ − a_328_post + a_328_post ≤ 0 ∧ a_328_post − a_328_post ≤ 0 ∧ − a_328_0 + a_328_0 ≤ 0 ∧ a_328_0 − a_328_0 ≤ 0 ∧ − a_305_post + a_305_post ≤ 0 ∧ a_305_post − a_305_post ≤ 0 ∧ − a_305_0 + a_305_0 ≤ 0 ∧ a_305_0 − a_305_0 ≤ 0 ∧ − a_283_post + a_283_post ≤ 0 ∧ a_283_post − a_283_post ≤ 0 ∧ − a_283_0 + a_283_0 ≤ 0 ∧ a_283_0 − a_283_0 ≤ 0 ∧ − a_26_post + a_26_post ≤ 0 ∧ a_26_post − a_26_post ≤ 0 ∧ − a_26_1 + a_26_1 ≤ 0 ∧ a_26_1 − a_26_1 ≤ 0 ∧ − a_26_0 + a_26_0 ≤ 0 ∧ a_26_0 − a_26_0 ≤ 0 ∧ − a_247_post + a_247_post ≤ 0 ∧ a_247_post − a_247_post ≤ 0 ∧ − a_247_0 + a_247_0 ≤ 0 ∧ a_247_0 − a_247_0 ≤ 0 ∧ − a_197_post + a_197_post ≤ 0 ∧ a_197_post − a_197_post ≤ 0 ∧ − a_197_0 + a_197_0 ≤ 0 ∧ a_197_0 − a_197_0 ≤ 0 ∧ − a_146_0 + a_146_0 ≤ 0 ∧ a_146_0 − a_146_0 ≤ 0 | |
| 32 | 46 | 3: | 1 + x_14_0 ≤ 0 ∧ − y_19_post + y_19_post ≤ 0 ∧ y_19_post − y_19_post ≤ 0 ∧ − y_19_2 + y_19_2 ≤ 0 ∧ y_19_2 − y_19_2 ≤ 0 ∧ − y_19_1 + y_19_1 ≤ 0 ∧ y_19_1 − y_19_1 ≤ 0 ∧ − y_19_0 + y_19_0 ≤ 0 ∧ y_19_0 − y_19_0 ≤ 0 ∧ − x_SLAM_f_18_post + x_SLAM_f_18_post ≤ 0 ∧ x_SLAM_f_18_post − x_SLAM_f_18_post ≤ 0 ∧ − x_SLAM_f_18_2 + x_SLAM_f_18_2 ≤ 0 ∧ x_SLAM_f_18_2 − x_SLAM_f_18_2 ≤ 0 ∧ − x_SLAM_f_18_1 + x_SLAM_f_18_1 ≤ 0 ∧ x_SLAM_f_18_1 − x_SLAM_f_18_1 ≤ 0 ∧ − x_SLAM_f_18_0 + x_SLAM_f_18_0 ≤ 0 ∧ x_SLAM_f_18_0 − x_SLAM_f_18_0 ≤ 0 ∧ − x_34_post + x_34_post ≤ 0 ∧ x_34_post − x_34_post ≤ 0 ∧ − x_34_1 + x_34_1 ≤ 0 ∧ x_34_1 − x_34_1 ≤ 0 ∧ − x_34_0 + x_34_0 ≤ 0 ∧ x_34_0 − x_34_0 ≤ 0 ∧ − x_28_post + x_28_post ≤ 0 ∧ x_28_post − x_28_post ≤ 0 ∧ − x_28_1 + x_28_1 ≤ 0 ∧ x_28_1 − x_28_1 ≤ 0 ∧ − x_28_0 + x_28_0 ≤ 0 ∧ x_28_0 − x_28_0 ≤ 0 ∧ − x_238_post + x_238_post ≤ 0 ∧ x_238_post − x_238_post ≤ 0 ∧ − x_238_0 + x_238_0 ≤ 0 ∧ x_238_0 − x_238_0 ≤ 0 ∧ − x_20_post + x_20_post ≤ 0 ∧ x_20_post − x_20_post ≤ 0 ∧ − x_20_2 + x_20_2 ≤ 0 ∧ x_20_2 − x_20_2 ≤ 0 ∧ − x_20_1 + x_20_1 ≤ 0 ∧ x_20_1 − x_20_1 ≤ 0 ∧ − x_20_0 + x_20_0 ≤ 0 ∧ x_20_0 − x_20_0 ≤ 0 ∧ − x_177_post + x_177_post ≤ 0 ∧ x_177_post − x_177_post ≤ 0 ∧ − x_177_0 + x_177_0 ≤ 0 ∧ x_177_0 − x_177_0 ≤ 0 ∧ − x_16_post + x_16_post ≤ 0 ∧ x_16_post − x_16_post ≤ 0 ∧ − x_16_1 + x_16_1 ≤ 0 ∧ x_16_1 − x_16_1 ≤ 0 ∧ − x_16_0 + x_16_0 ≤ 0 ∧ x_16_0 − x_16_0 ≤ 0 ∧ − x_14_post + x_14_post ≤ 0 ∧ x_14_post − x_14_post ≤ 0 ∧ − x_14_0 + x_14_0 ≤ 0 ∧ x_14_0 − x_14_0 ≤ 0 ∧ − tmp_48_post + tmp_48_post ≤ 0 ∧ tmp_48_post − tmp_48_post ≤ 0 ∧ − tmp_48_0 + tmp_48_0 ≤ 0 ∧ tmp_48_0 − tmp_48_0 ≤ 0 ∧ − temp_49_post + temp_49_post ≤ 0 ∧ temp_49_post − temp_49_post ≤ 0 ∧ − temp_49_0 + temp_49_0 ≤ 0 ∧ temp_49_0 − temp_49_0 ≤ 0 ∧ − temp0_45_post + temp0_45_post ≤ 0 ∧ temp0_45_post − temp0_45_post ≤ 0 ∧ − temp0_45_1 + temp0_45_1 ≤ 0 ∧ temp0_45_1 − temp0_45_1 ≤ 0 ∧ − temp0_45_0 + temp0_45_0 ≤ 0 ∧ temp0_45_0 − temp0_45_0 ≤ 0 ∧ − temp0_32_post + temp0_32_post ≤ 0 ∧ temp0_32_post − temp0_32_post ≤ 0 ∧ − temp0_32_4 + temp0_32_4 ≤ 0 ∧ temp0_32_4 − temp0_32_4 ≤ 0 ∧ − temp0_32_3 + temp0_32_3 ≤ 0 ∧ temp0_32_3 − temp0_32_3 ≤ 0 ∧ − temp0_32_2 + temp0_32_2 ≤ 0 ∧ temp0_32_2 − temp0_32_2 ≤ 0 ∧ − temp0_32_1 + temp0_32_1 ≤ 0 ∧ temp0_32_1 − temp0_32_1 ≤ 0 ∧ − temp0_32_0 + temp0_32_0 ≤ 0 ∧ temp0_32_0 − temp0_32_0 ≤ 0 ∧ − temp0_15_0 + temp0_15_0 ≤ 0 ∧ temp0_15_0 − temp0_15_0 ≤ 0 ∧ − t_23_post + t_23_post ≤ 0 ∧ t_23_post − t_23_post ≤ 0 ∧ − t_23_1 + t_23_1 ≤ 0 ∧ t_23_1 − t_23_1 ≤ 0 ∧ − t_23_0 + t_23_0 ≤ 0 ∧ t_23_0 − t_23_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_post + result_dot_printf_sdv_special_RETURN_VALUE_41_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_post − result_dot_printf_sdv_special_RETURN_VALUE_41_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_1 + result_dot_printf_sdv_special_RETURN_VALUE_41_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_1 − result_dot_printf_sdv_special_RETURN_VALUE_41_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_0 + result_dot_printf_sdv_special_RETURN_VALUE_41_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_0 − result_dot_printf_sdv_special_RETURN_VALUE_41_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_post + result_dot_printf_sdv_special_RETURN_VALUE_38_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_post − result_dot_printf_sdv_special_RETURN_VALUE_38_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_1 + result_dot_printf_sdv_special_RETURN_VALUE_38_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_1 − result_dot_printf_sdv_special_RETURN_VALUE_38_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_0 + result_dot_printf_sdv_special_RETURN_VALUE_38_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_0 − result_dot_printf_sdv_special_RETURN_VALUE_38_0 ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_post + result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_post − result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_1 + result_dot_nondet_sdv_special_RETURN_VALUE_13_1 ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_1 − result_dot_nondet_sdv_special_RETURN_VALUE_13_1 ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_0 + result_dot_nondet_sdv_special_RETURN_VALUE_13_0 ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_0 − result_dot_nondet_sdv_special_RETURN_VALUE_13_0 ≤ 0 ∧ − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post + result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post ≤ 0 ∧ result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post ≤ 0 ∧ − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 + result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 ≤ 0 ∧ result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 ≤ 0 ∧ − result_11_post + result_11_post ≤ 0 ∧ result_11_post − result_11_post ≤ 0 ∧ − result_11_6 + result_11_6 ≤ 0 ∧ result_11_6 − result_11_6 ≤ 0 ∧ − result_11_5 + result_11_5 ≤ 0 ∧ result_11_5 − result_11_5 ≤ 0 ∧ − result_11_4 + result_11_4 ≤ 0 ∧ result_11_4 − result_11_4 ≤ 0 ∧ − result_11_3 + result_11_3 ≤ 0 ∧ result_11_3 − result_11_3 ≤ 0 ∧ − result_11_2 + result_11_2 ≤ 0 ∧ result_11_2 − result_11_2 ≤ 0 ∧ − result_11_1 + result_11_1 ≤ 0 ∧ result_11_1 − result_11_1 ≤ 0 ∧ − result_11_0 + result_11_0 ≤ 0 ∧ result_11_0 − result_11_0 ≤ 0 ∧ − rcd_72_post + rcd_72_post ≤ 0 ∧ rcd_72_post − rcd_72_post ≤ 0 ∧ − rcd_72_0 + rcd_72_0 ≤ 0 ∧ rcd_72_0 − rcd_72_0 ≤ 0 ∧ − rcd_102_post + rcd_102_post ≤ 0 ∧ rcd_102_post − rcd_102_post ≤ 0 ∧ − rcd_102_0 + rcd_102_0 ≤ 0 ∧ rcd_102_0 − rcd_102_0 ≤ 0 ∧ − r_53_post + r_53_post ≤ 0 ∧ r_53_post − r_53_post ≤ 0 ∧ − r_53_0 + r_53_0 ≤ 0 ∧ r_53_0 − r_53_0 ≤ 0 ∧ − r_161_post + r_161_post ≤ 0 ∧ r_161_post − r_161_post ≤ 0 ∧ − r_161_0 + r_161_0 ≤ 0 ∧ r_161_0 − r_161_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 ≤ 0 ∧ − nondet_12_post + nondet_12_post ≤ 0 ∧ nondet_12_post − nondet_12_post ≤ 0 ∧ − nondet_12_1 + nondet_12_1 ≤ 0 ∧ nondet_12_1 − nondet_12_1 ≤ 0 ∧ − nondet_12_0 + nondet_12_0 ≤ 0 ∧ nondet_12_0 − nondet_12_0 ≤ 0 ∧ − lt_37_post + lt_37_post ≤ 0 ∧ lt_37_post − lt_37_post ≤ 0 ∧ − lt_37_1 + lt_37_1 ≤ 0 ∧ lt_37_1 − lt_37_1 ≤ 0 ∧ − lt_37_0 + lt_37_0 ≤ 0 ∧ lt_37_0 − lt_37_0 ≤ 0 ∧ − lt_36_post + lt_36_post ≤ 0 ∧ lt_36_post − lt_36_post ≤ 0 ∧ − lt_36_0 + lt_36_0 ≤ 0 ∧ lt_36_0 − lt_36_0 ≤ 0 ∧ − lt_237_post + lt_237_post ≤ 0 ∧ lt_237_post − lt_237_post ≤ 0 ∧ − lt_237_0 + lt_237_0 ≤ 0 ∧ lt_237_0 − lt_237_0 ≤ 0 ∧ − length_43_post + length_43_post ≤ 0 ∧ length_43_post − length_43_post ≤ 0 ∧ − length_43_0 + length_43_0 ≤ 0 ∧ length_43_0 − length_43_0 ≤ 0 ∧ − len_246_post + len_246_post ≤ 0 ∧ len_246_post − len_246_post ≤ 0 ∧ − len_246_0 + len_246_0 ≤ 0 ∧ len_246_0 − len_246_0 ≤ 0 ∧ − len_180_post + len_180_post ≤ 0 ∧ len_180_post − len_180_post ≤ 0 ∧ − len_180_0 + len_180_0 ≤ 0 ∧ len_180_0 − len_180_0 ≤ 0 ∧ − i_44_post + i_44_post ≤ 0 ∧ i_44_post − i_44_post ≤ 0 ∧ − i_44_0 + i_44_0 ≤ 0 ∧ i_44_0 − i_44_0 ≤ 0 ∧ − i_125_post + i_125_post ≤ 0 ∧ i_125_post − i_125_post ≤ 0 ∧ − i_125_0 + i_125_0 ≤ 0 ∧ i_125_0 − i_125_0 ≤ 0 ∧ − i_108_post + i_108_post ≤ 0 ∧ i_108_post − i_108_post ≤ 0 ∧ − i_108_0 + i_108_0 ≤ 0 ∧ i_108_0 − i_108_0 ≤ 0 ∧ − head_46_post + head_46_post ≤ 0 ∧ head_46_post − head_46_post ≤ 0 ∧ − head_46_0 + head_46_0 ≤ 0 ∧ head_46_0 − head_46_0 ≤ 0 ∧ − fmt_31_post + fmt_31_post ≤ 0 ∧ fmt_31_post − fmt_31_post ≤ 0 ∧ − fmt_31_4 + fmt_31_4 ≤ 0 ∧ fmt_31_4 − fmt_31_4 ≤ 0 ∧ − fmt_31_3 + fmt_31_3 ≤ 0 ∧ fmt_31_3 − fmt_31_3 ≤ 0 ∧ − fmt_31_2 + fmt_31_2 ≤ 0 ∧ fmt_31_2 − fmt_31_2 ≤ 0 ∧ − fmt_31_1 + fmt_31_1 ≤ 0 ∧ fmt_31_1 − fmt_31_1 ≤ 0 ∧ − fmt_31_0 + fmt_31_0 ≤ 0 ∧ fmt_31_0 − fmt_31_0 ≤ 0 ∧ − ct_17_post + ct_17_post ≤ 0 ∧ ct_17_post − ct_17_post ≤ 0 ∧ − ct_17_2 + ct_17_2 ≤ 0 ∧ ct_17_2 − ct_17_2 ≤ 0 ∧ − ct_17_1 + ct_17_1 ≤ 0 ∧ ct_17_1 − ct_17_1 ≤ 0 ∧ − ct_17_0 + ct_17_0 ≤ 0 ∧ ct_17_0 − ct_17_0 ≤ 0 ∧ − a_328_post + a_328_post ≤ 0 ∧ a_328_post − a_328_post ≤ 0 ∧ − a_328_0 + a_328_0 ≤ 0 ∧ a_328_0 − a_328_0 ≤ 0 ∧ − a_305_post + a_305_post ≤ 0 ∧ a_305_post − a_305_post ≤ 0 ∧ − a_305_0 + a_305_0 ≤ 0 ∧ a_305_0 − a_305_0 ≤ 0 ∧ − a_283_post + a_283_post ≤ 0 ∧ a_283_post − a_283_post ≤ 0 ∧ − a_283_0 + a_283_0 ≤ 0 ∧ a_283_0 − a_283_0 ≤ 0 ∧ − a_26_post + a_26_post ≤ 0 ∧ a_26_post − a_26_post ≤ 0 ∧ − a_26_1 + a_26_1 ≤ 0 ∧ a_26_1 − a_26_1 ≤ 0 ∧ − a_26_0 + a_26_0 ≤ 0 ∧ a_26_0 − a_26_0 ≤ 0 ∧ − a_247_post + a_247_post ≤ 0 ∧ a_247_post − a_247_post ≤ 0 ∧ − a_247_0 + a_247_0 ≤ 0 ∧ a_247_0 − a_247_0 ≤ 0 ∧ − a_197_post + a_197_post ≤ 0 ∧ a_197_post − a_197_post ≤ 0 ∧ − a_197_0 + a_197_0 ≤ 0 ∧ a_197_0 − a_197_0 ≤ 0 ∧ − a_146_0 + a_146_0 ≤ 0 ∧ a_146_0 − a_146_0 ≤ 0 | |
| 20 | 47 | 33: | 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 1 + i_44_0 − length_43_0 ≤ 0 ∧ − temp_49_0 + tmp_48_post ≤ 0 ∧ temp_49_0 − tmp_48_post ≤ 0 ∧ head_46_post − tmp_48_post ≤ 0 ∧ − head_46_post + tmp_48_post ≤ 0 ∧ −1 − i_44_0 + i_44_post ≤ 0 ∧ 1 + i_44_0 − i_44_post ≤ 0 ∧ 2 − i_44_post ≤ 0 ∧ −2 + i_44_post ≤ 0 ∧ − length_43_0 + result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ length_43_0 − result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ head_46_post − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post ≤ 0 ∧ − head_46_post + result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post ≤ 0 ∧ head_46_post − tmp_48_post ≤ 0 ∧ − head_46_post + tmp_48_post ≤ 0 ∧ result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post − tmp_48_post ≤ 0 ∧ − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post + tmp_48_post ≤ 0 ∧ 1 − length_43_0 ≤ 0 ∧ 2 − length_43_0 ≤ 0 ∧ head_46_0 − head_46_post ≤ 0 ∧ − head_46_0 + head_46_post ≤ 0 ∧ i_44_0 − i_44_post ≤ 0 ∧ − i_44_0 + i_44_post ≤ 0 ∧ rcd_72_0 − rcd_72_post ≤ 0 ∧ − rcd_72_0 + rcd_72_post ≤ 0 ∧ result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post ≤ 0 ∧ − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 + result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_0 − result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_0 + result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ temp_49_0 − temp_49_post ≤ 0 ∧ − temp_49_0 + temp_49_post ≤ 0 ∧ tmp_48_0 − tmp_48_post ≤ 0 ∧ − tmp_48_0 + tmp_48_post ≤ 0 ∧ − y_19_post + y_19_post ≤ 0 ∧ y_19_post − y_19_post ≤ 0 ∧ − y_19_2 + y_19_2 ≤ 0 ∧ y_19_2 − y_19_2 ≤ 0 ∧ − y_19_1 + y_19_1 ≤ 0 ∧ y_19_1 − y_19_1 ≤ 0 ∧ − y_19_0 + y_19_0 ≤ 0 ∧ y_19_0 − y_19_0 ≤ 0 ∧ − x_SLAM_f_18_post + x_SLAM_f_18_post ≤ 0 ∧ x_SLAM_f_18_post − x_SLAM_f_18_post ≤ 0 ∧ − x_SLAM_f_18_2 + x_SLAM_f_18_2 ≤ 0 ∧ x_SLAM_f_18_2 − x_SLAM_f_18_2 ≤ 0 ∧ − x_SLAM_f_18_1 + x_SLAM_f_18_1 ≤ 0 ∧ x_SLAM_f_18_1 − x_SLAM_f_18_1 ≤ 0 ∧ − x_SLAM_f_18_0 + x_SLAM_f_18_0 ≤ 0 ∧ x_SLAM_f_18_0 − x_SLAM_f_18_0 ≤ 0 ∧ − x_34_post + x_34_post ≤ 0 ∧ x_34_post − x_34_post ≤ 0 ∧ − x_34_1 + x_34_1 ≤ 0 ∧ x_34_1 − x_34_1 ≤ 0 ∧ − x_34_0 + x_34_0 ≤ 0 ∧ x_34_0 − x_34_0 ≤ 0 ∧ − x_28_post + x_28_post ≤ 0 ∧ x_28_post − x_28_post ≤ 0 ∧ − x_28_1 + x_28_1 ≤ 0 ∧ x_28_1 − x_28_1 ≤ 0 ∧ − x_28_0 + x_28_0 ≤ 0 ∧ x_28_0 − x_28_0 ≤ 0 ∧ − x_238_post + x_238_post ≤ 0 ∧ x_238_post − x_238_post ≤ 0 ∧ − x_238_0 + x_238_0 ≤ 0 ∧ x_238_0 − x_238_0 ≤ 0 ∧ − x_20_post + x_20_post ≤ 0 ∧ x_20_post − x_20_post ≤ 0 ∧ − x_20_2 + x_20_2 ≤ 0 ∧ x_20_2 − x_20_2 ≤ 0 ∧ − x_20_1 + x_20_1 ≤ 0 ∧ x_20_1 − x_20_1 ≤ 0 ∧ − x_20_0 + x_20_0 ≤ 0 ∧ x_20_0 − x_20_0 ≤ 0 ∧ − x_177_post + x_177_post ≤ 0 ∧ x_177_post − x_177_post ≤ 0 ∧ − x_177_0 + x_177_0 ≤ 0 ∧ x_177_0 − x_177_0 ≤ 0 ∧ − x_16_post + x_16_post ≤ 0 ∧ x_16_post − x_16_post ≤ 0 ∧ − x_16_1 + x_16_1 ≤ 0 ∧ x_16_1 − x_16_1 ≤ 0 ∧ − x_16_0 + x_16_0 ≤ 0 ∧ x_16_0 − x_16_0 ≤ 0 ∧ − x_14_post + x_14_post ≤ 0 ∧ x_14_post − x_14_post ≤ 0 ∧ − x_14_0 + x_14_0 ≤ 0 ∧ x_14_0 − x_14_0 ≤ 0 ∧ − temp0_45_post + temp0_45_post ≤ 0 ∧ temp0_45_post − temp0_45_post ≤ 0 ∧ − temp0_45_1 + temp0_45_1 ≤ 0 ∧ temp0_45_1 − temp0_45_1 ≤ 0 ∧ − temp0_45_0 + temp0_45_0 ≤ 0 ∧ temp0_45_0 − temp0_45_0 ≤ 0 ∧ − temp0_32_post + temp0_32_post ≤ 0 ∧ temp0_32_post − temp0_32_post ≤ 0 ∧ − temp0_32_4 + temp0_32_4 ≤ 0 ∧ temp0_32_4 − temp0_32_4 ≤ 0 ∧ − temp0_32_3 + temp0_32_3 ≤ 0 ∧ temp0_32_3 − temp0_32_3 ≤ 0 ∧ − temp0_32_2 + temp0_32_2 ≤ 0 ∧ temp0_32_2 − temp0_32_2 ≤ 0 ∧ − temp0_32_1 + temp0_32_1 ≤ 0 ∧ temp0_32_1 − temp0_32_1 ≤ 0 ∧ − temp0_32_0 + temp0_32_0 ≤ 0 ∧ temp0_32_0 − temp0_32_0 ≤ 0 ∧ − temp0_15_0 + temp0_15_0 ≤ 0 ∧ temp0_15_0 − temp0_15_0 ≤ 0 ∧ − t_23_post + t_23_post ≤ 0 ∧ t_23_post − t_23_post ≤ 0 ∧ − t_23_1 + t_23_1 ≤ 0 ∧ t_23_1 − t_23_1 ≤ 0 ∧ − t_23_0 + t_23_0 ≤ 0 ∧ t_23_0 − t_23_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_post + result_dot_printf_sdv_special_RETURN_VALUE_41_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_post − result_dot_printf_sdv_special_RETURN_VALUE_41_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_1 + result_dot_printf_sdv_special_RETURN_VALUE_41_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_1 − result_dot_printf_sdv_special_RETURN_VALUE_41_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_0 + result_dot_printf_sdv_special_RETURN_VALUE_41_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_0 − result_dot_printf_sdv_special_RETURN_VALUE_41_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_post + result_dot_printf_sdv_special_RETURN_VALUE_38_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_post − result_dot_printf_sdv_special_RETURN_VALUE_38_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_1 + result_dot_printf_sdv_special_RETURN_VALUE_38_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_1 − result_dot_printf_sdv_special_RETURN_VALUE_38_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_0 + result_dot_printf_sdv_special_RETURN_VALUE_38_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_0 − result_dot_printf_sdv_special_RETURN_VALUE_38_0 ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_1 + result_dot_nondet_sdv_special_RETURN_VALUE_13_1 ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_1 − result_dot_nondet_sdv_special_RETURN_VALUE_13_1 ≤ 0 ∧ − result_11_post + result_11_post ≤ 0 ∧ result_11_post − result_11_post ≤ 0 ∧ − result_11_6 + result_11_6 ≤ 0 ∧ result_11_6 − result_11_6 ≤ 0 ∧ − result_11_5 + result_11_5 ≤ 0 ∧ result_11_5 − result_11_5 ≤ 0 ∧ − result_11_4 + result_11_4 ≤ 0 ∧ result_11_4 − result_11_4 ≤ 0 ∧ − result_11_3 + result_11_3 ≤ 0 ∧ result_11_3 − result_11_3 ≤ 0 ∧ − result_11_2 + result_11_2 ≤ 0 ∧ result_11_2 − result_11_2 ≤ 0 ∧ − result_11_1 + result_11_1 ≤ 0 ∧ result_11_1 − result_11_1 ≤ 0 ∧ − result_11_0 + result_11_0 ≤ 0 ∧ result_11_0 − result_11_0 ≤ 0 ∧ − rcd_102_post + rcd_102_post ≤ 0 ∧ rcd_102_post − rcd_102_post ≤ 0 ∧ − rcd_102_0 + rcd_102_0 ≤ 0 ∧ rcd_102_0 − rcd_102_0 ≤ 0 ∧ − r_53_post + r_53_post ≤ 0 ∧ r_53_post − r_53_post ≤ 0 ∧ − r_53_0 + r_53_0 ≤ 0 ∧ r_53_0 − r_53_0 ≤ 0 ∧ − r_161_post + r_161_post ≤ 0 ∧ r_161_post − r_161_post ≤ 0 ∧ − r_161_0 + r_161_0 ≤ 0 ∧ r_161_0 − r_161_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 ≤ 0 ∧ − nondet_12_post + nondet_12_post ≤ 0 ∧ nondet_12_post − nondet_12_post ≤ 0 ∧ − nondet_12_1 + nondet_12_1 ≤ 0 ∧ nondet_12_1 − nondet_12_1 ≤ 0 ∧ − nondet_12_0 + nondet_12_0 ≤ 0 ∧ nondet_12_0 − nondet_12_0 ≤ 0 ∧ − lt_37_post + lt_37_post ≤ 0 ∧ lt_37_post − lt_37_post ≤ 0 ∧ − lt_37_1 + lt_37_1 ≤ 0 ∧ lt_37_1 − lt_37_1 ≤ 0 ∧ − lt_37_0 + lt_37_0 ≤ 0 ∧ lt_37_0 − lt_37_0 ≤ 0 ∧ − lt_36_post + lt_36_post ≤ 0 ∧ lt_36_post − lt_36_post ≤ 0 ∧ − lt_36_0 + lt_36_0 ≤ 0 ∧ lt_36_0 − lt_36_0 ≤ 0 ∧ − lt_237_post + lt_237_post ≤ 0 ∧ lt_237_post − lt_237_post ≤ 0 ∧ − lt_237_0 + lt_237_0 ≤ 0 ∧ lt_237_0 − lt_237_0 ≤ 0 ∧ − length_43_post + length_43_post ≤ 0 ∧ length_43_post − length_43_post ≤ 0 ∧ − length_43_0 + length_43_0 ≤ 0 ∧ length_43_0 − length_43_0 ≤ 0 ∧ − len_246_post + len_246_post ≤ 0 ∧ len_246_post − len_246_post ≤ 0 ∧ − len_246_0 + len_246_0 ≤ 0 ∧ len_246_0 − len_246_0 ≤ 0 ∧ − len_180_post + len_180_post ≤ 0 ∧ len_180_post − len_180_post ≤ 0 ∧ − len_180_0 + len_180_0 ≤ 0 ∧ len_180_0 − len_180_0 ≤ 0 ∧ − i_125_post + i_125_post ≤ 0 ∧ i_125_post − i_125_post ≤ 0 ∧ − i_125_0 + i_125_0 ≤ 0 ∧ i_125_0 − i_125_0 ≤ 0 ∧ − i_108_post + i_108_post ≤ 0 ∧ i_108_post − i_108_post ≤ 0 ∧ − i_108_0 + i_108_0 ≤ 0 ∧ i_108_0 − i_108_0 ≤ 0 ∧ − fmt_31_post + fmt_31_post ≤ 0 ∧ fmt_31_post − fmt_31_post ≤ 0 ∧ − fmt_31_4 + fmt_31_4 ≤ 0 ∧ fmt_31_4 − fmt_31_4 ≤ 0 ∧ − fmt_31_3 + fmt_31_3 ≤ 0 ∧ fmt_31_3 − fmt_31_3 ≤ 0 ∧ − fmt_31_2 + fmt_31_2 ≤ 0 ∧ fmt_31_2 − fmt_31_2 ≤ 0 ∧ − fmt_31_1 + fmt_31_1 ≤ 0 ∧ fmt_31_1 − fmt_31_1 ≤ 0 ∧ − fmt_31_0 + fmt_31_0 ≤ 0 ∧ fmt_31_0 − fmt_31_0 ≤ 0 ∧ − ct_17_post + ct_17_post ≤ 0 ∧ ct_17_post − ct_17_post ≤ 0 ∧ − ct_17_2 + ct_17_2 ≤ 0 ∧ ct_17_2 − ct_17_2 ≤ 0 ∧ − ct_17_1 + ct_17_1 ≤ 0 ∧ ct_17_1 − ct_17_1 ≤ 0 ∧ − ct_17_0 + ct_17_0 ≤ 0 ∧ ct_17_0 − ct_17_0 ≤ 0 ∧ − a_328_post + a_328_post ≤ 0 ∧ a_328_post − a_328_post ≤ 0 ∧ − a_328_0 + a_328_0 ≤ 0 ∧ a_328_0 − a_328_0 ≤ 0 ∧ − a_305_post + a_305_post ≤ 0 ∧ a_305_post − a_305_post ≤ 0 ∧ − a_305_0 + a_305_0 ≤ 0 ∧ a_305_0 − a_305_0 ≤ 0 ∧ − a_283_post + a_283_post ≤ 0 ∧ a_283_post − a_283_post ≤ 0 ∧ − a_283_0 + a_283_0 ≤ 0 ∧ a_283_0 − a_283_0 ≤ 0 ∧ − a_26_post + a_26_post ≤ 0 ∧ a_26_post − a_26_post ≤ 0 ∧ − a_26_1 + a_26_1 ≤ 0 ∧ a_26_1 − a_26_1 ≤ 0 ∧ − a_26_0 + a_26_0 ≤ 0 ∧ a_26_0 − a_26_0 ≤ 0 ∧ − a_247_post + a_247_post ≤ 0 ∧ a_247_post − a_247_post ≤ 0 ∧ − a_247_0 + a_247_0 ≤ 0 ∧ a_247_0 − a_247_0 ≤ 0 ∧ − a_197_post + a_197_post ≤ 0 ∧ a_197_post − a_197_post ≤ 0 ∧ − a_197_0 + a_197_0 ≤ 0 ∧ a_197_0 − a_197_0 ≤ 0 ∧ − a_146_0 + a_146_0 ≤ 0 ∧ a_146_0 − a_146_0 ≤ 0 | |
| 33 | 48 | 34: | 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ − i_44_0 ≤ 0 ∧ − i_44_0 + length_43_0 ≤ 0 ∧ − head_46_0 + temp0_45_1 ≤ 0 ∧ head_46_0 − temp0_45_1 ≤ 0 ∧ result_11_1 − temp0_45_1 ≤ 0 ∧ − result_11_1 + temp0_45_1 ≤ 0 ∧ − result_11_1 + x_14_post ≤ 0 ∧ result_11_1 − x_14_post ≤ 0 ∧ a_26_post − x_14_post ≤ 0 ∧ − a_26_post + x_14_post ≤ 0 ∧ − a_26_post + x_28_post ≤ 0 ∧ a_26_post − x_28_post ≤ 0 ∧ fmt_31_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post ≤ 0 ∧ − fmt_31_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post ≤ 0 ∧ temp0_32_1 ≤ 0 ∧ − temp0_32_1 ≤ 0 ∧ result_11_3 − temp0_32_1 ≤ 0 ∧ − result_11_3 + temp0_32_1 ≤ 0 ∧ − result_11_3 + result_dot_printf_sdv_special_RETURN_VALUE_41_post ≤ 0 ∧ result_11_3 − result_dot_printf_sdv_special_RETURN_VALUE_41_post ≤ 0 ∧ a_26_0 − a_26_post ≤ 0 ∧ − a_26_0 + a_26_post ≤ 0 ∧ fmt_31_0 − fmt_31_post ≤ 0 ∧ − fmt_31_0 + fmt_31_post ≤ 0 ∧ head_46_0 − head_46_post ≤ 0 ∧ − head_46_0 + head_46_post ≤ 0 ∧ i_125_0 − i_125_post ≤ 0 ∧ − i_125_0 + i_125_post ≤ 0 ∧ i_44_0 − i_44_post ≤ 0 ∧ − i_44_0 + i_44_post ≤ 0 ∧ length_43_0 − length_43_post ≤ 0 ∧ − length_43_0 + length_43_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post ≤ 0 ∧ result_11_0 − result_11_post ≤ 0 ∧ − result_11_0 + result_11_post ≤ 0 ∧ result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post ≤ 0 ∧ − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 + result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_0 − result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_0 + result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_0 − result_dot_printf_sdv_special_RETURN_VALUE_41_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_0 + result_dot_printf_sdv_special_RETURN_VALUE_41_post ≤ 0 ∧ temp0_32_0 − temp0_32_post ≤ 0 ∧ − temp0_32_0 + temp0_32_post ≤ 0 ∧ temp0_45_0 − temp0_45_post ≤ 0 ∧ − temp0_45_0 + temp0_45_post ≤ 0 ∧ temp_49_0 − temp_49_post ≤ 0 ∧ − temp_49_0 + temp_49_post ≤ 0 ∧ tmp_48_0 − tmp_48_post ≤ 0 ∧ − tmp_48_0 + tmp_48_post ≤ 0 ∧ x_14_0 − x_14_post ≤ 0 ∧ − x_14_0 + x_14_post ≤ 0 ∧ x_28_0 − x_28_post ≤ 0 ∧ − x_28_0 + x_28_post ≤ 0 ∧ − y_19_post + y_19_post ≤ 0 ∧ y_19_post − y_19_post ≤ 0 ∧ − y_19_2 + y_19_2 ≤ 0 ∧ y_19_2 − y_19_2 ≤ 0 ∧ − y_19_1 + y_19_1 ≤ 0 ∧ y_19_1 − y_19_1 ≤ 0 ∧ − y_19_0 + y_19_0 ≤ 0 ∧ y_19_0 − y_19_0 ≤ 0 ∧ − x_SLAM_f_18_post + x_SLAM_f_18_post ≤ 0 ∧ x_SLAM_f_18_post − x_SLAM_f_18_post ≤ 0 ∧ − x_SLAM_f_18_2 + x_SLAM_f_18_2 ≤ 0 ∧ x_SLAM_f_18_2 − x_SLAM_f_18_2 ≤ 0 ∧ − x_SLAM_f_18_1 + x_SLAM_f_18_1 ≤ 0 ∧ x_SLAM_f_18_1 − x_SLAM_f_18_1 ≤ 0 ∧ − x_SLAM_f_18_0 + x_SLAM_f_18_0 ≤ 0 ∧ x_SLAM_f_18_0 − x_SLAM_f_18_0 ≤ 0 ∧ − x_34_post + x_34_post ≤ 0 ∧ x_34_post − x_34_post ≤ 0 ∧ − x_34_1 + x_34_1 ≤ 0 ∧ x_34_1 − x_34_1 ≤ 0 ∧ − x_34_0 + x_34_0 ≤ 0 ∧ x_34_0 − x_34_0 ≤ 0 ∧ − x_28_1 + x_28_1 ≤ 0 ∧ x_28_1 − x_28_1 ≤ 0 ∧ − x_238_post + x_238_post ≤ 0 ∧ x_238_post − x_238_post ≤ 0 ∧ − x_238_0 + x_238_0 ≤ 0 ∧ x_238_0 − x_238_0 ≤ 0 ∧ − x_20_post + x_20_post ≤ 0 ∧ x_20_post − x_20_post ≤ 0 ∧ − x_20_2 + x_20_2 ≤ 0 ∧ x_20_2 − x_20_2 ≤ 0 ∧ − x_20_1 + x_20_1 ≤ 0 ∧ x_20_1 − x_20_1 ≤ 0 ∧ − x_20_0 + x_20_0 ≤ 0 ∧ x_20_0 − x_20_0 ≤ 0 ∧ − x_177_post + x_177_post ≤ 0 ∧ x_177_post − x_177_post ≤ 0 ∧ − x_177_0 + x_177_0 ≤ 0 ∧ x_177_0 − x_177_0 ≤ 0 ∧ − x_16_post + x_16_post ≤ 0 ∧ x_16_post − x_16_post ≤ 0 ∧ − x_16_1 + x_16_1 ≤ 0 ∧ x_16_1 − x_16_1 ≤ 0 ∧ − x_16_0 + x_16_0 ≤ 0 ∧ x_16_0 − x_16_0 ≤ 0 ∧ − temp0_32_4 + temp0_32_4 ≤ 0 ∧ temp0_32_4 − temp0_32_4 ≤ 0 ∧ − temp0_32_3 + temp0_32_3 ≤ 0 ∧ temp0_32_3 − temp0_32_3 ≤ 0 ∧ − temp0_32_2 + temp0_32_2 ≤ 0 ∧ temp0_32_2 − temp0_32_2 ≤ 0 ∧ − temp0_15_0 + temp0_15_0 ≤ 0 ∧ temp0_15_0 − temp0_15_0 ≤ 0 ∧ − t_23_post + t_23_post ≤ 0 ∧ t_23_post − t_23_post ≤ 0 ∧ − t_23_1 + t_23_1 ≤ 0 ∧ t_23_1 − t_23_1 ≤ 0 ∧ − t_23_0 + t_23_0 ≤ 0 ∧ t_23_0 − t_23_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_1 + result_dot_printf_sdv_special_RETURN_VALUE_41_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_1 − result_dot_printf_sdv_special_RETURN_VALUE_41_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_post + result_dot_printf_sdv_special_RETURN_VALUE_38_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_post − result_dot_printf_sdv_special_RETURN_VALUE_38_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_1 + result_dot_printf_sdv_special_RETURN_VALUE_38_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_1 − result_dot_printf_sdv_special_RETURN_VALUE_38_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_0 + result_dot_printf_sdv_special_RETURN_VALUE_38_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_0 − result_dot_printf_sdv_special_RETURN_VALUE_38_0 ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_1 + result_dot_nondet_sdv_special_RETURN_VALUE_13_1 ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_1 − result_dot_nondet_sdv_special_RETURN_VALUE_13_1 ≤ 0 ∧ − result_11_6 + result_11_6 ≤ 0 ∧ result_11_6 − result_11_6 ≤ 0 ∧ − result_11_5 + result_11_5 ≤ 0 ∧ result_11_5 − result_11_5 ≤ 0 ∧ − result_11_4 + result_11_4 ≤ 0 ∧ result_11_4 − result_11_4 ≤ 0 ∧ − rcd_72_post + rcd_72_post ≤ 0 ∧ rcd_72_post − rcd_72_post ≤ 0 ∧ − rcd_72_0 + rcd_72_0 ≤ 0 ∧ rcd_72_0 − rcd_72_0 ≤ 0 ∧ − rcd_102_post + rcd_102_post ≤ 0 ∧ rcd_102_post − rcd_102_post ≤ 0 ∧ − rcd_102_0 + rcd_102_0 ≤ 0 ∧ rcd_102_0 − rcd_102_0 ≤ 0 ∧ − r_53_post + r_53_post ≤ 0 ∧ r_53_post − r_53_post ≤ 0 ∧ − r_53_0 + r_53_0 ≤ 0 ∧ r_53_0 − r_53_0 ≤ 0 ∧ − r_161_post + r_161_post ≤ 0 ∧ r_161_post − r_161_post ≤ 0 ∧ − r_161_0 + r_161_0 ≤ 0 ∧ r_161_0 − r_161_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 ≤ 0 ∧ − nondet_12_post + nondet_12_post ≤ 0 ∧ nondet_12_post − nondet_12_post ≤ 0 ∧ − nondet_12_1 + nondet_12_1 ≤ 0 ∧ nondet_12_1 − nondet_12_1 ≤ 0 ∧ − nondet_12_0 + nondet_12_0 ≤ 0 ∧ nondet_12_0 − nondet_12_0 ≤ 0 ∧ − lt_37_post + lt_37_post ≤ 0 ∧ lt_37_post − lt_37_post ≤ 0 ∧ − lt_37_1 + lt_37_1 ≤ 0 ∧ lt_37_1 − lt_37_1 ≤ 0 ∧ − lt_37_0 + lt_37_0 ≤ 0 ∧ lt_37_0 − lt_37_0 ≤ 0 ∧ − lt_36_post + lt_36_post ≤ 0 ∧ lt_36_post − lt_36_post ≤ 0 ∧ − lt_36_0 + lt_36_0 ≤ 0 ∧ lt_36_0 − lt_36_0 ≤ 0 ∧ − lt_237_post + lt_237_post ≤ 0 ∧ lt_237_post − lt_237_post ≤ 0 ∧ − lt_237_0 + lt_237_0 ≤ 0 ∧ lt_237_0 − lt_237_0 ≤ 0 ∧ − len_246_post + len_246_post ≤ 0 ∧ len_246_post − len_246_post ≤ 0 ∧ − len_246_0 + len_246_0 ≤ 0 ∧ len_246_0 − len_246_0 ≤ 0 ∧ − len_180_post + len_180_post ≤ 0 ∧ len_180_post − len_180_post ≤ 0 ∧ − len_180_0 + len_180_0 ≤ 0 ∧ len_180_0 − len_180_0 ≤ 0 ∧ − i_108_post + i_108_post ≤ 0 ∧ i_108_post − i_108_post ≤ 0 ∧ − i_108_0 + i_108_0 ≤ 0 ∧ i_108_0 − i_108_0 ≤ 0 ∧ − fmt_31_4 + fmt_31_4 ≤ 0 ∧ fmt_31_4 − fmt_31_4 ≤ 0 ∧ − fmt_31_3 + fmt_31_3 ≤ 0 ∧ fmt_31_3 − fmt_31_3 ≤ 0 ∧ − fmt_31_2 + fmt_31_2 ≤ 0 ∧ fmt_31_2 − fmt_31_2 ≤ 0 ∧ − ct_17_post + ct_17_post ≤ 0 ∧ ct_17_post − ct_17_post ≤ 0 ∧ − ct_17_2 + ct_17_2 ≤ 0 ∧ ct_17_2 − ct_17_2 ≤ 0 ∧ − ct_17_1 + ct_17_1 ≤ 0 ∧ ct_17_1 − ct_17_1 ≤ 0 ∧ − ct_17_0 + ct_17_0 ≤ 0 ∧ ct_17_0 − ct_17_0 ≤ 0 ∧ − a_328_post + a_328_post ≤ 0 ∧ a_328_post − a_328_post ≤ 0 ∧ − a_328_0 + a_328_0 ≤ 0 ∧ a_328_0 − a_328_0 ≤ 0 ∧ − a_305_post + a_305_post ≤ 0 ∧ a_305_post − a_305_post ≤ 0 ∧ − a_305_0 + a_305_0 ≤ 0 ∧ a_305_0 − a_305_0 ≤ 0 ∧ − a_283_post + a_283_post ≤ 0 ∧ a_283_post − a_283_post ≤ 0 ∧ − a_283_0 + a_283_0 ≤ 0 ∧ a_283_0 − a_283_0 ≤ 0 ∧ − a_26_1 + a_26_1 ≤ 0 ∧ a_26_1 − a_26_1 ≤ 0 ∧ − a_247_post + a_247_post ≤ 0 ∧ a_247_post − a_247_post ≤ 0 ∧ − a_247_0 + a_247_0 ≤ 0 ∧ a_247_0 − a_247_0 ≤ 0 ∧ − a_197_post + a_197_post ≤ 0 ∧ a_197_post − a_197_post ≤ 0 ∧ − a_197_0 + a_197_0 ≤ 0 ∧ a_197_0 − a_197_0 ≤ 0 ∧ − a_146_0 + a_146_0 ≤ 0 ∧ a_146_0 − a_146_0 ≤ 0 | |
| 34 | 49 | 35: | 1 − x_28_0 ≤ 0 ∧ − y_19_post + y_19_post ≤ 0 ∧ y_19_post − y_19_post ≤ 0 ∧ − y_19_2 + y_19_2 ≤ 0 ∧ y_19_2 − y_19_2 ≤ 0 ∧ − y_19_1 + y_19_1 ≤ 0 ∧ y_19_1 − y_19_1 ≤ 0 ∧ − y_19_0 + y_19_0 ≤ 0 ∧ y_19_0 − y_19_0 ≤ 0 ∧ − x_SLAM_f_18_post + x_SLAM_f_18_post ≤ 0 ∧ x_SLAM_f_18_post − x_SLAM_f_18_post ≤ 0 ∧ − x_SLAM_f_18_2 + x_SLAM_f_18_2 ≤ 0 ∧ x_SLAM_f_18_2 − x_SLAM_f_18_2 ≤ 0 ∧ − x_SLAM_f_18_1 + x_SLAM_f_18_1 ≤ 0 ∧ x_SLAM_f_18_1 − x_SLAM_f_18_1 ≤ 0 ∧ − x_SLAM_f_18_0 + x_SLAM_f_18_0 ≤ 0 ∧ x_SLAM_f_18_0 − x_SLAM_f_18_0 ≤ 0 ∧ − x_34_post + x_34_post ≤ 0 ∧ x_34_post − x_34_post ≤ 0 ∧ − x_34_1 + x_34_1 ≤ 0 ∧ x_34_1 − x_34_1 ≤ 0 ∧ − x_34_0 + x_34_0 ≤ 0 ∧ x_34_0 − x_34_0 ≤ 0 ∧ − x_28_post + x_28_post ≤ 0 ∧ x_28_post − x_28_post ≤ 0 ∧ − x_28_1 + x_28_1 ≤ 0 ∧ x_28_1 − x_28_1 ≤ 0 ∧ − x_28_0 + x_28_0 ≤ 0 ∧ x_28_0 − x_28_0 ≤ 0 ∧ − x_238_post + x_238_post ≤ 0 ∧ x_238_post − x_238_post ≤ 0 ∧ − x_238_0 + x_238_0 ≤ 0 ∧ x_238_0 − x_238_0 ≤ 0 ∧ − x_20_post + x_20_post ≤ 0 ∧ x_20_post − x_20_post ≤ 0 ∧ − x_20_2 + x_20_2 ≤ 0 ∧ x_20_2 − x_20_2 ≤ 0 ∧ − x_20_1 + x_20_1 ≤ 0 ∧ x_20_1 − x_20_1 ≤ 0 ∧ − x_20_0 + x_20_0 ≤ 0 ∧ x_20_0 − x_20_0 ≤ 0 ∧ − x_177_post + x_177_post ≤ 0 ∧ x_177_post − x_177_post ≤ 0 ∧ − x_177_0 + x_177_0 ≤ 0 ∧ x_177_0 − x_177_0 ≤ 0 ∧ − x_16_post + x_16_post ≤ 0 ∧ x_16_post − x_16_post ≤ 0 ∧ − x_16_1 + x_16_1 ≤ 0 ∧ x_16_1 − x_16_1 ≤ 0 ∧ − x_16_0 + x_16_0 ≤ 0 ∧ x_16_0 − x_16_0 ≤ 0 ∧ − x_14_post + x_14_post ≤ 0 ∧ x_14_post − x_14_post ≤ 0 ∧ − x_14_0 + x_14_0 ≤ 0 ∧ x_14_0 − x_14_0 ≤ 0 ∧ − tmp_48_post + tmp_48_post ≤ 0 ∧ tmp_48_post − tmp_48_post ≤ 0 ∧ − tmp_48_0 + tmp_48_0 ≤ 0 ∧ tmp_48_0 − tmp_48_0 ≤ 0 ∧ − temp_49_post + temp_49_post ≤ 0 ∧ temp_49_post − temp_49_post ≤ 0 ∧ − temp_49_0 + temp_49_0 ≤ 0 ∧ temp_49_0 − temp_49_0 ≤ 0 ∧ − temp0_45_post + temp0_45_post ≤ 0 ∧ temp0_45_post − temp0_45_post ≤ 0 ∧ − temp0_45_1 + temp0_45_1 ≤ 0 ∧ temp0_45_1 − temp0_45_1 ≤ 0 ∧ − temp0_45_0 + temp0_45_0 ≤ 0 ∧ temp0_45_0 − temp0_45_0 ≤ 0 ∧ − temp0_32_post + temp0_32_post ≤ 0 ∧ temp0_32_post − temp0_32_post ≤ 0 ∧ − temp0_32_4 + temp0_32_4 ≤ 0 ∧ temp0_32_4 − temp0_32_4 ≤ 0 ∧ − temp0_32_3 + temp0_32_3 ≤ 0 ∧ temp0_32_3 − temp0_32_3 ≤ 0 ∧ − temp0_32_2 + temp0_32_2 ≤ 0 ∧ temp0_32_2 − temp0_32_2 ≤ 0 ∧ − temp0_32_1 + temp0_32_1 ≤ 0 ∧ temp0_32_1 − temp0_32_1 ≤ 0 ∧ − temp0_32_0 + temp0_32_0 ≤ 0 ∧ temp0_32_0 − temp0_32_0 ≤ 0 ∧ − temp0_15_0 + temp0_15_0 ≤ 0 ∧ temp0_15_0 − temp0_15_0 ≤ 0 ∧ − t_23_post + t_23_post ≤ 0 ∧ t_23_post − t_23_post ≤ 0 ∧ − t_23_1 + t_23_1 ≤ 0 ∧ t_23_1 − t_23_1 ≤ 0 ∧ − t_23_0 + t_23_0 ≤ 0 ∧ t_23_0 − t_23_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_post + result_dot_printf_sdv_special_RETURN_VALUE_41_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_post − result_dot_printf_sdv_special_RETURN_VALUE_41_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_1 + result_dot_printf_sdv_special_RETURN_VALUE_41_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_1 − result_dot_printf_sdv_special_RETURN_VALUE_41_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_0 + result_dot_printf_sdv_special_RETURN_VALUE_41_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_0 − result_dot_printf_sdv_special_RETURN_VALUE_41_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_post + result_dot_printf_sdv_special_RETURN_VALUE_38_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_post − result_dot_printf_sdv_special_RETURN_VALUE_38_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_1 + result_dot_printf_sdv_special_RETURN_VALUE_38_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_1 − result_dot_printf_sdv_special_RETURN_VALUE_38_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_0 + result_dot_printf_sdv_special_RETURN_VALUE_38_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_0 − result_dot_printf_sdv_special_RETURN_VALUE_38_0 ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_post + result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_post − result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_1 + result_dot_nondet_sdv_special_RETURN_VALUE_13_1 ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_1 − result_dot_nondet_sdv_special_RETURN_VALUE_13_1 ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_0 + result_dot_nondet_sdv_special_RETURN_VALUE_13_0 ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_0 − result_dot_nondet_sdv_special_RETURN_VALUE_13_0 ≤ 0 ∧ − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post + result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post ≤ 0 ∧ result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post ≤ 0 ∧ − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 + result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 ≤ 0 ∧ result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 ≤ 0 ∧ − result_11_post + result_11_post ≤ 0 ∧ result_11_post − result_11_post ≤ 0 ∧ − result_11_6 + result_11_6 ≤ 0 ∧ result_11_6 − result_11_6 ≤ 0 ∧ − result_11_5 + result_11_5 ≤ 0 ∧ result_11_5 − result_11_5 ≤ 0 ∧ − result_11_4 + result_11_4 ≤ 0 ∧ result_11_4 − result_11_4 ≤ 0 ∧ − result_11_3 + result_11_3 ≤ 0 ∧ result_11_3 − result_11_3 ≤ 0 ∧ − result_11_2 + result_11_2 ≤ 0 ∧ result_11_2 − result_11_2 ≤ 0 ∧ − result_11_1 + result_11_1 ≤ 0 ∧ result_11_1 − result_11_1 ≤ 0 ∧ − result_11_0 + result_11_0 ≤ 0 ∧ result_11_0 − result_11_0 ≤ 0 ∧ − rcd_72_post + rcd_72_post ≤ 0 ∧ rcd_72_post − rcd_72_post ≤ 0 ∧ − rcd_72_0 + rcd_72_0 ≤ 0 ∧ rcd_72_0 − rcd_72_0 ≤ 0 ∧ − rcd_102_post + rcd_102_post ≤ 0 ∧ rcd_102_post − rcd_102_post ≤ 0 ∧ − rcd_102_0 + rcd_102_0 ≤ 0 ∧ rcd_102_0 − rcd_102_0 ≤ 0 ∧ − r_53_post + r_53_post ≤ 0 ∧ r_53_post − r_53_post ≤ 0 ∧ − r_53_0 + r_53_0 ≤ 0 ∧ r_53_0 − r_53_0 ≤ 0 ∧ − r_161_post + r_161_post ≤ 0 ∧ r_161_post − r_161_post ≤ 0 ∧ − r_161_0 + r_161_0 ≤ 0 ∧ r_161_0 − r_161_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 ≤ 0 ∧ − nondet_12_post + nondet_12_post ≤ 0 ∧ nondet_12_post − nondet_12_post ≤ 0 ∧ − nondet_12_1 + nondet_12_1 ≤ 0 ∧ nondet_12_1 − nondet_12_1 ≤ 0 ∧ − nondet_12_0 + nondet_12_0 ≤ 0 ∧ nondet_12_0 − nondet_12_0 ≤ 0 ∧ − lt_37_post + lt_37_post ≤ 0 ∧ lt_37_post − lt_37_post ≤ 0 ∧ − lt_37_1 + lt_37_1 ≤ 0 ∧ lt_37_1 − lt_37_1 ≤ 0 ∧ − lt_37_0 + lt_37_0 ≤ 0 ∧ lt_37_0 − lt_37_0 ≤ 0 ∧ − lt_36_post + lt_36_post ≤ 0 ∧ lt_36_post − lt_36_post ≤ 0 ∧ − lt_36_0 + lt_36_0 ≤ 0 ∧ lt_36_0 − lt_36_0 ≤ 0 ∧ − lt_237_post + lt_237_post ≤ 0 ∧ lt_237_post − lt_237_post ≤ 0 ∧ − lt_237_0 + lt_237_0 ≤ 0 ∧ lt_237_0 − lt_237_0 ≤ 0 ∧ − length_43_post + length_43_post ≤ 0 ∧ length_43_post − length_43_post ≤ 0 ∧ − length_43_0 + length_43_0 ≤ 0 ∧ length_43_0 − length_43_0 ≤ 0 ∧ − len_246_post + len_246_post ≤ 0 ∧ len_246_post − len_246_post ≤ 0 ∧ − len_246_0 + len_246_0 ≤ 0 ∧ len_246_0 − len_246_0 ≤ 0 ∧ − len_180_post + len_180_post ≤ 0 ∧ len_180_post − len_180_post ≤ 0 ∧ − len_180_0 + len_180_0 ≤ 0 ∧ len_180_0 − len_180_0 ≤ 0 ∧ − i_44_post + i_44_post ≤ 0 ∧ i_44_post − i_44_post ≤ 0 ∧ − i_44_0 + i_44_0 ≤ 0 ∧ i_44_0 − i_44_0 ≤ 0 ∧ − i_125_post + i_125_post ≤ 0 ∧ i_125_post − i_125_post ≤ 0 ∧ − i_125_0 + i_125_0 ≤ 0 ∧ i_125_0 − i_125_0 ≤ 0 ∧ − i_108_post + i_108_post ≤ 0 ∧ i_108_post − i_108_post ≤ 0 ∧ − i_108_0 + i_108_0 ≤ 0 ∧ i_108_0 − i_108_0 ≤ 0 ∧ − head_46_post + head_46_post ≤ 0 ∧ head_46_post − head_46_post ≤ 0 ∧ − head_46_0 + head_46_0 ≤ 0 ∧ head_46_0 − head_46_0 ≤ 0 ∧ − fmt_31_post + fmt_31_post ≤ 0 ∧ fmt_31_post − fmt_31_post ≤ 0 ∧ − fmt_31_4 + fmt_31_4 ≤ 0 ∧ fmt_31_4 − fmt_31_4 ≤ 0 ∧ − fmt_31_3 + fmt_31_3 ≤ 0 ∧ fmt_31_3 − fmt_31_3 ≤ 0 ∧ − fmt_31_2 + fmt_31_2 ≤ 0 ∧ fmt_31_2 − fmt_31_2 ≤ 0 ∧ − fmt_31_1 + fmt_31_1 ≤ 0 ∧ fmt_31_1 − fmt_31_1 ≤ 0 ∧ − fmt_31_0 + fmt_31_0 ≤ 0 ∧ fmt_31_0 − fmt_31_0 ≤ 0 ∧ − ct_17_post + ct_17_post ≤ 0 ∧ ct_17_post − ct_17_post ≤ 0 ∧ − ct_17_2 + ct_17_2 ≤ 0 ∧ ct_17_2 − ct_17_2 ≤ 0 ∧ − ct_17_1 + ct_17_1 ≤ 0 ∧ ct_17_1 − ct_17_1 ≤ 0 ∧ − ct_17_0 + ct_17_0 ≤ 0 ∧ ct_17_0 − ct_17_0 ≤ 0 ∧ − a_328_post + a_328_post ≤ 0 ∧ a_328_post − a_328_post ≤ 0 ∧ − a_328_0 + a_328_0 ≤ 0 ∧ a_328_0 − a_328_0 ≤ 0 ∧ − a_305_post + a_305_post ≤ 0 ∧ a_305_post − a_305_post ≤ 0 ∧ − a_305_0 + a_305_0 ≤ 0 ∧ a_305_0 − a_305_0 ≤ 0 ∧ − a_283_post + a_283_post ≤ 0 ∧ a_283_post − a_283_post ≤ 0 ∧ − a_283_0 + a_283_0 ≤ 0 ∧ a_283_0 − a_283_0 ≤ 0 ∧ − a_26_post + a_26_post ≤ 0 ∧ a_26_post − a_26_post ≤ 0 ∧ − a_26_1 + a_26_1 ≤ 0 ∧ a_26_1 − a_26_1 ≤ 0 ∧ − a_26_0 + a_26_0 ≤ 0 ∧ a_26_0 − a_26_0 ≤ 0 ∧ − a_247_post + a_247_post ≤ 0 ∧ a_247_post − a_247_post ≤ 0 ∧ − a_247_0 + a_247_0 ≤ 0 ∧ a_247_0 − a_247_0 ≤ 0 ∧ − a_197_post + a_197_post ≤ 0 ∧ a_197_post − a_197_post ≤ 0 ∧ − a_197_0 + a_197_0 ≤ 0 ∧ a_197_0 − a_197_0 ≤ 0 ∧ − a_146_0 + a_146_0 ≤ 0 ∧ a_146_0 − a_146_0 ≤ 0 | |
| 34 | 50 | 35: | 1 + x_28_0 ≤ 0 ∧ − y_19_post + y_19_post ≤ 0 ∧ y_19_post − y_19_post ≤ 0 ∧ − y_19_2 + y_19_2 ≤ 0 ∧ y_19_2 − y_19_2 ≤ 0 ∧ − y_19_1 + y_19_1 ≤ 0 ∧ y_19_1 − y_19_1 ≤ 0 ∧ − y_19_0 + y_19_0 ≤ 0 ∧ y_19_0 − y_19_0 ≤ 0 ∧ − x_SLAM_f_18_post + x_SLAM_f_18_post ≤ 0 ∧ x_SLAM_f_18_post − x_SLAM_f_18_post ≤ 0 ∧ − x_SLAM_f_18_2 + x_SLAM_f_18_2 ≤ 0 ∧ x_SLAM_f_18_2 − x_SLAM_f_18_2 ≤ 0 ∧ − x_SLAM_f_18_1 + x_SLAM_f_18_1 ≤ 0 ∧ x_SLAM_f_18_1 − x_SLAM_f_18_1 ≤ 0 ∧ − x_SLAM_f_18_0 + x_SLAM_f_18_0 ≤ 0 ∧ x_SLAM_f_18_0 − x_SLAM_f_18_0 ≤ 0 ∧ − x_34_post + x_34_post ≤ 0 ∧ x_34_post − x_34_post ≤ 0 ∧ − x_34_1 + x_34_1 ≤ 0 ∧ x_34_1 − x_34_1 ≤ 0 ∧ − x_34_0 + x_34_0 ≤ 0 ∧ x_34_0 − x_34_0 ≤ 0 ∧ − x_28_post + x_28_post ≤ 0 ∧ x_28_post − x_28_post ≤ 0 ∧ − x_28_1 + x_28_1 ≤ 0 ∧ x_28_1 − x_28_1 ≤ 0 ∧ − x_28_0 + x_28_0 ≤ 0 ∧ x_28_0 − x_28_0 ≤ 0 ∧ − x_238_post + x_238_post ≤ 0 ∧ x_238_post − x_238_post ≤ 0 ∧ − x_238_0 + x_238_0 ≤ 0 ∧ x_238_0 − x_238_0 ≤ 0 ∧ − x_20_post + x_20_post ≤ 0 ∧ x_20_post − x_20_post ≤ 0 ∧ − x_20_2 + x_20_2 ≤ 0 ∧ x_20_2 − x_20_2 ≤ 0 ∧ − x_20_1 + x_20_1 ≤ 0 ∧ x_20_1 − x_20_1 ≤ 0 ∧ − x_20_0 + x_20_0 ≤ 0 ∧ x_20_0 − x_20_0 ≤ 0 ∧ − x_177_post + x_177_post ≤ 0 ∧ x_177_post − x_177_post ≤ 0 ∧ − x_177_0 + x_177_0 ≤ 0 ∧ x_177_0 − x_177_0 ≤ 0 ∧ − x_16_post + x_16_post ≤ 0 ∧ x_16_post − x_16_post ≤ 0 ∧ − x_16_1 + x_16_1 ≤ 0 ∧ x_16_1 − x_16_1 ≤ 0 ∧ − x_16_0 + x_16_0 ≤ 0 ∧ x_16_0 − x_16_0 ≤ 0 ∧ − x_14_post + x_14_post ≤ 0 ∧ x_14_post − x_14_post ≤ 0 ∧ − x_14_0 + x_14_0 ≤ 0 ∧ x_14_0 − x_14_0 ≤ 0 ∧ − tmp_48_post + tmp_48_post ≤ 0 ∧ tmp_48_post − tmp_48_post ≤ 0 ∧ − tmp_48_0 + tmp_48_0 ≤ 0 ∧ tmp_48_0 − tmp_48_0 ≤ 0 ∧ − temp_49_post + temp_49_post ≤ 0 ∧ temp_49_post − temp_49_post ≤ 0 ∧ − temp_49_0 + temp_49_0 ≤ 0 ∧ temp_49_0 − temp_49_0 ≤ 0 ∧ − temp0_45_post + temp0_45_post ≤ 0 ∧ temp0_45_post − temp0_45_post ≤ 0 ∧ − temp0_45_1 + temp0_45_1 ≤ 0 ∧ temp0_45_1 − temp0_45_1 ≤ 0 ∧ − temp0_45_0 + temp0_45_0 ≤ 0 ∧ temp0_45_0 − temp0_45_0 ≤ 0 ∧ − temp0_32_post + temp0_32_post ≤ 0 ∧ temp0_32_post − temp0_32_post ≤ 0 ∧ − temp0_32_4 + temp0_32_4 ≤ 0 ∧ temp0_32_4 − temp0_32_4 ≤ 0 ∧ − temp0_32_3 + temp0_32_3 ≤ 0 ∧ temp0_32_3 − temp0_32_3 ≤ 0 ∧ − temp0_32_2 + temp0_32_2 ≤ 0 ∧ temp0_32_2 − temp0_32_2 ≤ 0 ∧ − temp0_32_1 + temp0_32_1 ≤ 0 ∧ temp0_32_1 − temp0_32_1 ≤ 0 ∧ − temp0_32_0 + temp0_32_0 ≤ 0 ∧ temp0_32_0 − temp0_32_0 ≤ 0 ∧ − temp0_15_0 + temp0_15_0 ≤ 0 ∧ temp0_15_0 − temp0_15_0 ≤ 0 ∧ − t_23_post + t_23_post ≤ 0 ∧ t_23_post − t_23_post ≤ 0 ∧ − t_23_1 + t_23_1 ≤ 0 ∧ t_23_1 − t_23_1 ≤ 0 ∧ − t_23_0 + t_23_0 ≤ 0 ∧ t_23_0 − t_23_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_post + result_dot_printf_sdv_special_RETURN_VALUE_41_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_post − result_dot_printf_sdv_special_RETURN_VALUE_41_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_1 + result_dot_printf_sdv_special_RETURN_VALUE_41_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_1 − result_dot_printf_sdv_special_RETURN_VALUE_41_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_0 + result_dot_printf_sdv_special_RETURN_VALUE_41_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_0 − result_dot_printf_sdv_special_RETURN_VALUE_41_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_post + result_dot_printf_sdv_special_RETURN_VALUE_38_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_post − result_dot_printf_sdv_special_RETURN_VALUE_38_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_1 + result_dot_printf_sdv_special_RETURN_VALUE_38_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_1 − result_dot_printf_sdv_special_RETURN_VALUE_38_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_0 + result_dot_printf_sdv_special_RETURN_VALUE_38_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_0 − result_dot_printf_sdv_special_RETURN_VALUE_38_0 ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_post + result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_post − result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_1 + result_dot_nondet_sdv_special_RETURN_VALUE_13_1 ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_1 − result_dot_nondet_sdv_special_RETURN_VALUE_13_1 ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_0 + result_dot_nondet_sdv_special_RETURN_VALUE_13_0 ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_0 − result_dot_nondet_sdv_special_RETURN_VALUE_13_0 ≤ 0 ∧ − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post + result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post ≤ 0 ∧ result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post ≤ 0 ∧ − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 + result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 ≤ 0 ∧ result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 ≤ 0 ∧ − result_11_post + result_11_post ≤ 0 ∧ result_11_post − result_11_post ≤ 0 ∧ − result_11_6 + result_11_6 ≤ 0 ∧ result_11_6 − result_11_6 ≤ 0 ∧ − result_11_5 + result_11_5 ≤ 0 ∧ result_11_5 − result_11_5 ≤ 0 ∧ − result_11_4 + result_11_4 ≤ 0 ∧ result_11_4 − result_11_4 ≤ 0 ∧ − result_11_3 + result_11_3 ≤ 0 ∧ result_11_3 − result_11_3 ≤ 0 ∧ − result_11_2 + result_11_2 ≤ 0 ∧ result_11_2 − result_11_2 ≤ 0 ∧ − result_11_1 + result_11_1 ≤ 0 ∧ result_11_1 − result_11_1 ≤ 0 ∧ − result_11_0 + result_11_0 ≤ 0 ∧ result_11_0 − result_11_0 ≤ 0 ∧ − rcd_72_post + rcd_72_post ≤ 0 ∧ rcd_72_post − rcd_72_post ≤ 0 ∧ − rcd_72_0 + rcd_72_0 ≤ 0 ∧ rcd_72_0 − rcd_72_0 ≤ 0 ∧ − rcd_102_post + rcd_102_post ≤ 0 ∧ rcd_102_post − rcd_102_post ≤ 0 ∧ − rcd_102_0 + rcd_102_0 ≤ 0 ∧ rcd_102_0 − rcd_102_0 ≤ 0 ∧ − r_53_post + r_53_post ≤ 0 ∧ r_53_post − r_53_post ≤ 0 ∧ − r_53_0 + r_53_0 ≤ 0 ∧ r_53_0 − r_53_0 ≤ 0 ∧ − r_161_post + r_161_post ≤ 0 ∧ r_161_post − r_161_post ≤ 0 ∧ − r_161_0 + r_161_0 ≤ 0 ∧ r_161_0 − r_161_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 ≤ 0 ∧ − nondet_12_post + nondet_12_post ≤ 0 ∧ nondet_12_post − nondet_12_post ≤ 0 ∧ − nondet_12_1 + nondet_12_1 ≤ 0 ∧ nondet_12_1 − nondet_12_1 ≤ 0 ∧ − nondet_12_0 + nondet_12_0 ≤ 0 ∧ nondet_12_0 − nondet_12_0 ≤ 0 ∧ − lt_37_post + lt_37_post ≤ 0 ∧ lt_37_post − lt_37_post ≤ 0 ∧ − lt_37_1 + lt_37_1 ≤ 0 ∧ lt_37_1 − lt_37_1 ≤ 0 ∧ − lt_37_0 + lt_37_0 ≤ 0 ∧ lt_37_0 − lt_37_0 ≤ 0 ∧ − lt_36_post + lt_36_post ≤ 0 ∧ lt_36_post − lt_36_post ≤ 0 ∧ − lt_36_0 + lt_36_0 ≤ 0 ∧ lt_36_0 − lt_36_0 ≤ 0 ∧ − lt_237_post + lt_237_post ≤ 0 ∧ lt_237_post − lt_237_post ≤ 0 ∧ − lt_237_0 + lt_237_0 ≤ 0 ∧ lt_237_0 − lt_237_0 ≤ 0 ∧ − length_43_post + length_43_post ≤ 0 ∧ length_43_post − length_43_post ≤ 0 ∧ − length_43_0 + length_43_0 ≤ 0 ∧ length_43_0 − length_43_0 ≤ 0 ∧ − len_246_post + len_246_post ≤ 0 ∧ len_246_post − len_246_post ≤ 0 ∧ − len_246_0 + len_246_0 ≤ 0 ∧ len_246_0 − len_246_0 ≤ 0 ∧ − len_180_post + len_180_post ≤ 0 ∧ len_180_post − len_180_post ≤ 0 ∧ − len_180_0 + len_180_0 ≤ 0 ∧ len_180_0 − len_180_0 ≤ 0 ∧ − i_44_post + i_44_post ≤ 0 ∧ i_44_post − i_44_post ≤ 0 ∧ − i_44_0 + i_44_0 ≤ 0 ∧ i_44_0 − i_44_0 ≤ 0 ∧ − i_125_post + i_125_post ≤ 0 ∧ i_125_post − i_125_post ≤ 0 ∧ − i_125_0 + i_125_0 ≤ 0 ∧ i_125_0 − i_125_0 ≤ 0 ∧ − i_108_post + i_108_post ≤ 0 ∧ i_108_post − i_108_post ≤ 0 ∧ − i_108_0 + i_108_0 ≤ 0 ∧ i_108_0 − i_108_0 ≤ 0 ∧ − head_46_post + head_46_post ≤ 0 ∧ head_46_post − head_46_post ≤ 0 ∧ − head_46_0 + head_46_0 ≤ 0 ∧ head_46_0 − head_46_0 ≤ 0 ∧ − fmt_31_post + fmt_31_post ≤ 0 ∧ fmt_31_post − fmt_31_post ≤ 0 ∧ − fmt_31_4 + fmt_31_4 ≤ 0 ∧ fmt_31_4 − fmt_31_4 ≤ 0 ∧ − fmt_31_3 + fmt_31_3 ≤ 0 ∧ fmt_31_3 − fmt_31_3 ≤ 0 ∧ − fmt_31_2 + fmt_31_2 ≤ 0 ∧ fmt_31_2 − fmt_31_2 ≤ 0 ∧ − fmt_31_1 + fmt_31_1 ≤ 0 ∧ fmt_31_1 − fmt_31_1 ≤ 0 ∧ − fmt_31_0 + fmt_31_0 ≤ 0 ∧ fmt_31_0 − fmt_31_0 ≤ 0 ∧ − ct_17_post + ct_17_post ≤ 0 ∧ ct_17_post − ct_17_post ≤ 0 ∧ − ct_17_2 + ct_17_2 ≤ 0 ∧ ct_17_2 − ct_17_2 ≤ 0 ∧ − ct_17_1 + ct_17_1 ≤ 0 ∧ ct_17_1 − ct_17_1 ≤ 0 ∧ − ct_17_0 + ct_17_0 ≤ 0 ∧ ct_17_0 − ct_17_0 ≤ 0 ∧ − a_328_post + a_328_post ≤ 0 ∧ a_328_post − a_328_post ≤ 0 ∧ − a_328_0 + a_328_0 ≤ 0 ∧ a_328_0 − a_328_0 ≤ 0 ∧ − a_305_post + a_305_post ≤ 0 ∧ a_305_post − a_305_post ≤ 0 ∧ − a_305_0 + a_305_0 ≤ 0 ∧ a_305_0 − a_305_0 ≤ 0 ∧ − a_283_post + a_283_post ≤ 0 ∧ a_283_post − a_283_post ≤ 0 ∧ − a_283_0 + a_283_0 ≤ 0 ∧ a_283_0 − a_283_0 ≤ 0 ∧ − a_26_post + a_26_post ≤ 0 ∧ a_26_post − a_26_post ≤ 0 ∧ − a_26_1 + a_26_1 ≤ 0 ∧ a_26_1 − a_26_1 ≤ 0 ∧ − a_26_0 + a_26_0 ≤ 0 ∧ a_26_0 − a_26_0 ≤ 0 ∧ − a_247_post + a_247_post ≤ 0 ∧ a_247_post − a_247_post ≤ 0 ∧ − a_247_0 + a_247_0 ≤ 0 ∧ a_247_0 − a_247_0 ≤ 0 ∧ − a_197_post + a_197_post ≤ 0 ∧ a_197_post − a_197_post ≤ 0 ∧ − a_197_0 + a_197_0 ≤ 0 ∧ a_197_0 − a_197_0 ≤ 0 ∧ − a_146_0 + a_146_0 ≤ 0 ∧ a_146_0 − a_146_0 ≤ 0 | |
| 35 | 51 | 36: | 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ − x_28_0 + x_34_1 ≤ 0 ∧ x_28_0 − x_34_1 ≤ 0 ∧ fmt_31_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 ≤ 0 ∧ − fmt_31_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 ≤ 0 ∧ temp0_32_1 ≤ 0 ∧ − temp0_32_1 ≤ 0 ∧ result_11_1 − temp0_32_1 ≤ 0 ∧ − result_11_1 + temp0_32_1 ≤ 0 ∧ − result_11_1 + result_dot_printf_sdv_special_RETURN_VALUE_38_1 ≤ 0 ∧ result_11_1 − result_dot_printf_sdv_special_RETURN_VALUE_38_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_0 ≤ 0 ∧ − a_26_0 + x_14_0 ≤ 0 ∧ a_26_0 − x_14_0 ≤ 0 ∧ fmt_31_0 − fmt_31_post ≤ 0 ∧ − fmt_31_0 + fmt_31_post ≤ 0 ∧ lt_36_0 − lt_36_post ≤ 0 ∧ − lt_36_0 + lt_36_post ≤ 0 ∧ lt_37_0 − lt_37_post ≤ 0 ∧ − lt_37_0 + lt_37_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post ≤ 0 ∧ result_11_0 − result_11_post ≤ 0 ∧ − result_11_0 + result_11_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_0 − result_dot_printf_sdv_special_RETURN_VALUE_38_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_0 + result_dot_printf_sdv_special_RETURN_VALUE_38_post ≤ 0 ∧ temp0_32_0 − temp0_32_post ≤ 0 ∧ − temp0_32_0 + temp0_32_post ≤ 0 ∧ x_34_0 − x_34_post ≤ 0 ∧ − x_34_0 + x_34_post ≤ 0 ∧ − y_19_post + y_19_post ≤ 0 ∧ y_19_post − y_19_post ≤ 0 ∧ − y_19_2 + y_19_2 ≤ 0 ∧ y_19_2 − y_19_2 ≤ 0 ∧ − y_19_1 + y_19_1 ≤ 0 ∧ y_19_1 − y_19_1 ≤ 0 ∧ − y_19_0 + y_19_0 ≤ 0 ∧ y_19_0 − y_19_0 ≤ 0 ∧ − x_SLAM_f_18_post + x_SLAM_f_18_post ≤ 0 ∧ x_SLAM_f_18_post − x_SLAM_f_18_post ≤ 0 ∧ − x_SLAM_f_18_2 + x_SLAM_f_18_2 ≤ 0 ∧ x_SLAM_f_18_2 − x_SLAM_f_18_2 ≤ 0 ∧ − x_SLAM_f_18_1 + x_SLAM_f_18_1 ≤ 0 ∧ x_SLAM_f_18_1 − x_SLAM_f_18_1 ≤ 0 ∧ − x_SLAM_f_18_0 + x_SLAM_f_18_0 ≤ 0 ∧ x_SLAM_f_18_0 − x_SLAM_f_18_0 ≤ 0 ∧ − x_28_post + x_28_post ≤ 0 ∧ x_28_post − x_28_post ≤ 0 ∧ − x_28_1 + x_28_1 ≤ 0 ∧ x_28_1 − x_28_1 ≤ 0 ∧ − x_28_0 + x_28_0 ≤ 0 ∧ x_28_0 − x_28_0 ≤ 0 ∧ − x_238_post + x_238_post ≤ 0 ∧ x_238_post − x_238_post ≤ 0 ∧ − x_238_0 + x_238_0 ≤ 0 ∧ x_238_0 − x_238_0 ≤ 0 ∧ − x_20_post + x_20_post ≤ 0 ∧ x_20_post − x_20_post ≤ 0 ∧ − x_20_2 + x_20_2 ≤ 0 ∧ x_20_2 − x_20_2 ≤ 0 ∧ − x_20_1 + x_20_1 ≤ 0 ∧ x_20_1 − x_20_1 ≤ 0 ∧ − x_20_0 + x_20_0 ≤ 0 ∧ x_20_0 − x_20_0 ≤ 0 ∧ − x_177_post + x_177_post ≤ 0 ∧ x_177_post − x_177_post ≤ 0 ∧ − x_177_0 + x_177_0 ≤ 0 ∧ x_177_0 − x_177_0 ≤ 0 ∧ − x_16_post + x_16_post ≤ 0 ∧ x_16_post − x_16_post ≤ 0 ∧ − x_16_1 + x_16_1 ≤ 0 ∧ x_16_1 − x_16_1 ≤ 0 ∧ − x_16_0 + x_16_0 ≤ 0 ∧ x_16_0 − x_16_0 ≤ 0 ∧ − x_14_post + x_14_post ≤ 0 ∧ x_14_post − x_14_post ≤ 0 ∧ − x_14_0 + x_14_0 ≤ 0 ∧ x_14_0 − x_14_0 ≤ 0 ∧ − tmp_48_post + tmp_48_post ≤ 0 ∧ tmp_48_post − tmp_48_post ≤ 0 ∧ − tmp_48_0 + tmp_48_0 ≤ 0 ∧ tmp_48_0 − tmp_48_0 ≤ 0 ∧ − temp_49_post + temp_49_post ≤ 0 ∧ temp_49_post − temp_49_post ≤ 0 ∧ − temp_49_0 + temp_49_0 ≤ 0 ∧ temp_49_0 − temp_49_0 ≤ 0 ∧ − temp0_45_post + temp0_45_post ≤ 0 ∧ temp0_45_post − temp0_45_post ≤ 0 ∧ − temp0_45_1 + temp0_45_1 ≤ 0 ∧ temp0_45_1 − temp0_45_1 ≤ 0 ∧ − temp0_45_0 + temp0_45_0 ≤ 0 ∧ temp0_45_0 − temp0_45_0 ≤ 0 ∧ − temp0_32_4 + temp0_32_4 ≤ 0 ∧ temp0_32_4 − temp0_32_4 ≤ 0 ∧ − temp0_32_3 + temp0_32_3 ≤ 0 ∧ temp0_32_3 − temp0_32_3 ≤ 0 ∧ − temp0_15_0 + temp0_15_0 ≤ 0 ∧ temp0_15_0 − temp0_15_0 ≤ 0 ∧ − t_23_post + t_23_post ≤ 0 ∧ t_23_post − t_23_post ≤ 0 ∧ − t_23_1 + t_23_1 ≤ 0 ∧ t_23_1 − t_23_1 ≤ 0 ∧ − t_23_0 + t_23_0 ≤ 0 ∧ t_23_0 − t_23_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_post + result_dot_printf_sdv_special_RETURN_VALUE_41_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_post − result_dot_printf_sdv_special_RETURN_VALUE_41_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_1 + result_dot_printf_sdv_special_RETURN_VALUE_41_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_1 − result_dot_printf_sdv_special_RETURN_VALUE_41_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_0 + result_dot_printf_sdv_special_RETURN_VALUE_41_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_0 − result_dot_printf_sdv_special_RETURN_VALUE_41_0 ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_post + result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_post − result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_1 + result_dot_nondet_sdv_special_RETURN_VALUE_13_1 ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_1 − result_dot_nondet_sdv_special_RETURN_VALUE_13_1 ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_0 + result_dot_nondet_sdv_special_RETURN_VALUE_13_0 ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_0 − result_dot_nondet_sdv_special_RETURN_VALUE_13_0 ≤ 0 ∧ − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post + result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post ≤ 0 ∧ result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post ≤ 0 ∧ − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 + result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 ≤ 0 ∧ result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 ≤ 0 ∧ − result_11_6 + result_11_6 ≤ 0 ∧ result_11_6 − result_11_6 ≤ 0 ∧ − result_11_5 + result_11_5 ≤ 0 ∧ result_11_5 − result_11_5 ≤ 0 ∧ − result_11_4 + result_11_4 ≤ 0 ∧ result_11_4 − result_11_4 ≤ 0 ∧ − result_11_3 + result_11_3 ≤ 0 ∧ result_11_3 − result_11_3 ≤ 0 ∧ − result_11_2 + result_11_2 ≤ 0 ∧ result_11_2 − result_11_2 ≤ 0 ∧ − rcd_72_post + rcd_72_post ≤ 0 ∧ rcd_72_post − rcd_72_post ≤ 0 ∧ − rcd_72_0 + rcd_72_0 ≤ 0 ∧ rcd_72_0 − rcd_72_0 ≤ 0 ∧ − rcd_102_post + rcd_102_post ≤ 0 ∧ rcd_102_post − rcd_102_post ≤ 0 ∧ − rcd_102_0 + rcd_102_0 ≤ 0 ∧ rcd_102_0 − rcd_102_0 ≤ 0 ∧ − r_53_post + r_53_post ≤ 0 ∧ r_53_post − r_53_post ≤ 0 ∧ − r_53_0 + r_53_0 ≤ 0 ∧ r_53_0 − r_53_0 ≤ 0 ∧ − r_161_post + r_161_post ≤ 0 ∧ r_161_post − r_161_post ≤ 0 ∧ − r_161_0 + r_161_0 ≤ 0 ∧ r_161_0 − r_161_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 ≤ 0 ∧ − nondet_12_post + nondet_12_post ≤ 0 ∧ nondet_12_post − nondet_12_post ≤ 0 ∧ − nondet_12_1 + nondet_12_1 ≤ 0 ∧ nondet_12_1 − nondet_12_1 ≤ 0 ∧ − nondet_12_0 + nondet_12_0 ≤ 0 ∧ nondet_12_0 − nondet_12_0 ≤ 0 ∧ − lt_237_post + lt_237_post ≤ 0 ∧ lt_237_post − lt_237_post ≤ 0 ∧ − lt_237_0 + lt_237_0 ≤ 0 ∧ lt_237_0 − lt_237_0 ≤ 0 ∧ − length_43_post + length_43_post ≤ 0 ∧ length_43_post − length_43_post ≤ 0 ∧ − length_43_0 + length_43_0 ≤ 0 ∧ length_43_0 − length_43_0 ≤ 0 ∧ − len_246_post + len_246_post ≤ 0 ∧ len_246_post − len_246_post ≤ 0 ∧ − len_246_0 + len_246_0 ≤ 0 ∧ len_246_0 − len_246_0 ≤ 0 ∧ − len_180_post + len_180_post ≤ 0 ∧ len_180_post − len_180_post ≤ 0 ∧ − len_180_0 + len_180_0 ≤ 0 ∧ len_180_0 − len_180_0 ≤ 0 ∧ − i_44_post + i_44_post ≤ 0 ∧ i_44_post − i_44_post ≤ 0 ∧ − i_44_0 + i_44_0 ≤ 0 ∧ i_44_0 − i_44_0 ≤ 0 ∧ − i_125_post + i_125_post ≤ 0 ∧ i_125_post − i_125_post ≤ 0 ∧ − i_125_0 + i_125_0 ≤ 0 ∧ i_125_0 − i_125_0 ≤ 0 ∧ − i_108_post + i_108_post ≤ 0 ∧ i_108_post − i_108_post ≤ 0 ∧ − i_108_0 + i_108_0 ≤ 0 ∧ i_108_0 − i_108_0 ≤ 0 ∧ − head_46_post + head_46_post ≤ 0 ∧ head_46_post − head_46_post ≤ 0 ∧ − head_46_0 + head_46_0 ≤ 0 ∧ head_46_0 − head_46_0 ≤ 0 ∧ − fmt_31_4 + fmt_31_4 ≤ 0 ∧ fmt_31_4 − fmt_31_4 ≤ 0 ∧ − fmt_31_3 + fmt_31_3 ≤ 0 ∧ fmt_31_3 − fmt_31_3 ≤ 0 ∧ − ct_17_post + ct_17_post ≤ 0 ∧ ct_17_post − ct_17_post ≤ 0 ∧ − ct_17_2 + ct_17_2 ≤ 0 ∧ ct_17_2 − ct_17_2 ≤ 0 ∧ − ct_17_1 + ct_17_1 ≤ 0 ∧ ct_17_1 − ct_17_1 ≤ 0 ∧ − ct_17_0 + ct_17_0 ≤ 0 ∧ ct_17_0 − ct_17_0 ≤ 0 ∧ − a_328_post + a_328_post ≤ 0 ∧ a_328_post − a_328_post ≤ 0 ∧ − a_328_0 + a_328_0 ≤ 0 ∧ a_328_0 − a_328_0 ≤ 0 ∧ − a_305_post + a_305_post ≤ 0 ∧ a_305_post − a_305_post ≤ 0 ∧ − a_305_0 + a_305_0 ≤ 0 ∧ a_305_0 − a_305_0 ≤ 0 ∧ − a_283_post + a_283_post ≤ 0 ∧ a_283_post − a_283_post ≤ 0 ∧ − a_283_0 + a_283_0 ≤ 0 ∧ a_283_0 − a_283_0 ≤ 0 ∧ − a_26_post + a_26_post ≤ 0 ∧ a_26_post − a_26_post ≤ 0 ∧ − a_26_1 + a_26_1 ≤ 0 ∧ a_26_1 − a_26_1 ≤ 0 ∧ − a_26_0 + a_26_0 ≤ 0 ∧ a_26_0 − a_26_0 ≤ 0 ∧ − a_247_post + a_247_post ≤ 0 ∧ a_247_post − a_247_post ≤ 0 ∧ − a_247_0 + a_247_0 ≤ 0 ∧ a_247_0 − a_247_0 ≤ 0 ∧ − a_197_post + a_197_post ≤ 0 ∧ a_197_post − a_197_post ≤ 0 ∧ − a_197_0 + a_197_0 ≤ 0 ∧ a_197_0 − a_197_0 ≤ 0 ∧ − a_146_0 + a_146_0 ≤ 0 ∧ a_146_0 − a_146_0 ≤ 0 | |
| 36 | 52 | 37: | 1 − x_14_0 ≤ 0 ∧ − y_19_post + y_19_post ≤ 0 ∧ y_19_post − y_19_post ≤ 0 ∧ − y_19_2 + y_19_2 ≤ 0 ∧ y_19_2 − y_19_2 ≤ 0 ∧ − y_19_1 + y_19_1 ≤ 0 ∧ y_19_1 − y_19_1 ≤ 0 ∧ − y_19_0 + y_19_0 ≤ 0 ∧ y_19_0 − y_19_0 ≤ 0 ∧ − x_SLAM_f_18_post + x_SLAM_f_18_post ≤ 0 ∧ x_SLAM_f_18_post − x_SLAM_f_18_post ≤ 0 ∧ − x_SLAM_f_18_2 + x_SLAM_f_18_2 ≤ 0 ∧ x_SLAM_f_18_2 − x_SLAM_f_18_2 ≤ 0 ∧ − x_SLAM_f_18_1 + x_SLAM_f_18_1 ≤ 0 ∧ x_SLAM_f_18_1 − x_SLAM_f_18_1 ≤ 0 ∧ − x_SLAM_f_18_0 + x_SLAM_f_18_0 ≤ 0 ∧ x_SLAM_f_18_0 − x_SLAM_f_18_0 ≤ 0 ∧ − x_34_post + x_34_post ≤ 0 ∧ x_34_post − x_34_post ≤ 0 ∧ − x_34_1 + x_34_1 ≤ 0 ∧ x_34_1 − x_34_1 ≤ 0 ∧ − x_34_0 + x_34_0 ≤ 0 ∧ x_34_0 − x_34_0 ≤ 0 ∧ − x_28_post + x_28_post ≤ 0 ∧ x_28_post − x_28_post ≤ 0 ∧ − x_28_1 + x_28_1 ≤ 0 ∧ x_28_1 − x_28_1 ≤ 0 ∧ − x_28_0 + x_28_0 ≤ 0 ∧ x_28_0 − x_28_0 ≤ 0 ∧ − x_238_post + x_238_post ≤ 0 ∧ x_238_post − x_238_post ≤ 0 ∧ − x_238_0 + x_238_0 ≤ 0 ∧ x_238_0 − x_238_0 ≤ 0 ∧ − x_20_post + x_20_post ≤ 0 ∧ x_20_post − x_20_post ≤ 0 ∧ − x_20_2 + x_20_2 ≤ 0 ∧ x_20_2 − x_20_2 ≤ 0 ∧ − x_20_1 + x_20_1 ≤ 0 ∧ x_20_1 − x_20_1 ≤ 0 ∧ − x_20_0 + x_20_0 ≤ 0 ∧ x_20_0 − x_20_0 ≤ 0 ∧ − x_177_post + x_177_post ≤ 0 ∧ x_177_post − x_177_post ≤ 0 ∧ − x_177_0 + x_177_0 ≤ 0 ∧ x_177_0 − x_177_0 ≤ 0 ∧ − x_16_post + x_16_post ≤ 0 ∧ x_16_post − x_16_post ≤ 0 ∧ − x_16_1 + x_16_1 ≤ 0 ∧ x_16_1 − x_16_1 ≤ 0 ∧ − x_16_0 + x_16_0 ≤ 0 ∧ x_16_0 − x_16_0 ≤ 0 ∧ − x_14_post + x_14_post ≤ 0 ∧ x_14_post − x_14_post ≤ 0 ∧ − x_14_0 + x_14_0 ≤ 0 ∧ x_14_0 − x_14_0 ≤ 0 ∧ − tmp_48_post + tmp_48_post ≤ 0 ∧ tmp_48_post − tmp_48_post ≤ 0 ∧ − tmp_48_0 + tmp_48_0 ≤ 0 ∧ tmp_48_0 − tmp_48_0 ≤ 0 ∧ − temp_49_post + temp_49_post ≤ 0 ∧ temp_49_post − temp_49_post ≤ 0 ∧ − temp_49_0 + temp_49_0 ≤ 0 ∧ temp_49_0 − temp_49_0 ≤ 0 ∧ − temp0_45_post + temp0_45_post ≤ 0 ∧ temp0_45_post − temp0_45_post ≤ 0 ∧ − temp0_45_1 + temp0_45_1 ≤ 0 ∧ temp0_45_1 − temp0_45_1 ≤ 0 ∧ − temp0_45_0 + temp0_45_0 ≤ 0 ∧ temp0_45_0 − temp0_45_0 ≤ 0 ∧ − temp0_32_post + temp0_32_post ≤ 0 ∧ temp0_32_post − temp0_32_post ≤ 0 ∧ − temp0_32_4 + temp0_32_4 ≤ 0 ∧ temp0_32_4 − temp0_32_4 ≤ 0 ∧ − temp0_32_3 + temp0_32_3 ≤ 0 ∧ temp0_32_3 − temp0_32_3 ≤ 0 ∧ − temp0_32_2 + temp0_32_2 ≤ 0 ∧ temp0_32_2 − temp0_32_2 ≤ 0 ∧ − temp0_32_1 + temp0_32_1 ≤ 0 ∧ temp0_32_1 − temp0_32_1 ≤ 0 ∧ − temp0_32_0 + temp0_32_0 ≤ 0 ∧ temp0_32_0 − temp0_32_0 ≤ 0 ∧ − temp0_15_0 + temp0_15_0 ≤ 0 ∧ temp0_15_0 − temp0_15_0 ≤ 0 ∧ − t_23_post + t_23_post ≤ 0 ∧ t_23_post − t_23_post ≤ 0 ∧ − t_23_1 + t_23_1 ≤ 0 ∧ t_23_1 − t_23_1 ≤ 0 ∧ − t_23_0 + t_23_0 ≤ 0 ∧ t_23_0 − t_23_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_post + result_dot_printf_sdv_special_RETURN_VALUE_41_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_post − result_dot_printf_sdv_special_RETURN_VALUE_41_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_1 + result_dot_printf_sdv_special_RETURN_VALUE_41_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_1 − result_dot_printf_sdv_special_RETURN_VALUE_41_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_0 + result_dot_printf_sdv_special_RETURN_VALUE_41_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_0 − result_dot_printf_sdv_special_RETURN_VALUE_41_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_post + result_dot_printf_sdv_special_RETURN_VALUE_38_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_post − result_dot_printf_sdv_special_RETURN_VALUE_38_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_1 + result_dot_printf_sdv_special_RETURN_VALUE_38_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_1 − result_dot_printf_sdv_special_RETURN_VALUE_38_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_0 + result_dot_printf_sdv_special_RETURN_VALUE_38_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_0 − result_dot_printf_sdv_special_RETURN_VALUE_38_0 ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_post + result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_post − result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_1 + result_dot_nondet_sdv_special_RETURN_VALUE_13_1 ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_1 − result_dot_nondet_sdv_special_RETURN_VALUE_13_1 ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_0 + result_dot_nondet_sdv_special_RETURN_VALUE_13_0 ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_0 − result_dot_nondet_sdv_special_RETURN_VALUE_13_0 ≤ 0 ∧ − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post + result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post ≤ 0 ∧ result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post ≤ 0 ∧ − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 + result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 ≤ 0 ∧ result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 ≤ 0 ∧ − result_11_post + result_11_post ≤ 0 ∧ result_11_post − result_11_post ≤ 0 ∧ − result_11_6 + result_11_6 ≤ 0 ∧ result_11_6 − result_11_6 ≤ 0 ∧ − result_11_5 + result_11_5 ≤ 0 ∧ result_11_5 − result_11_5 ≤ 0 ∧ − result_11_4 + result_11_4 ≤ 0 ∧ result_11_4 − result_11_4 ≤ 0 ∧ − result_11_3 + result_11_3 ≤ 0 ∧ result_11_3 − result_11_3 ≤ 0 ∧ − result_11_2 + result_11_2 ≤ 0 ∧ result_11_2 − result_11_2 ≤ 0 ∧ − result_11_1 + result_11_1 ≤ 0 ∧ result_11_1 − result_11_1 ≤ 0 ∧ − result_11_0 + result_11_0 ≤ 0 ∧ result_11_0 − result_11_0 ≤ 0 ∧ − rcd_72_post + rcd_72_post ≤ 0 ∧ rcd_72_post − rcd_72_post ≤ 0 ∧ − rcd_72_0 + rcd_72_0 ≤ 0 ∧ rcd_72_0 − rcd_72_0 ≤ 0 ∧ − rcd_102_post + rcd_102_post ≤ 0 ∧ rcd_102_post − rcd_102_post ≤ 0 ∧ − rcd_102_0 + rcd_102_0 ≤ 0 ∧ rcd_102_0 − rcd_102_0 ≤ 0 ∧ − r_53_post + r_53_post ≤ 0 ∧ r_53_post − r_53_post ≤ 0 ∧ − r_53_0 + r_53_0 ≤ 0 ∧ r_53_0 − r_53_0 ≤ 0 ∧ − r_161_post + r_161_post ≤ 0 ∧ r_161_post − r_161_post ≤ 0 ∧ − r_161_0 + r_161_0 ≤ 0 ∧ r_161_0 − r_161_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 ≤ 0 ∧ − nondet_12_post + nondet_12_post ≤ 0 ∧ nondet_12_post − nondet_12_post ≤ 0 ∧ − nondet_12_1 + nondet_12_1 ≤ 0 ∧ nondet_12_1 − nondet_12_1 ≤ 0 ∧ − nondet_12_0 + nondet_12_0 ≤ 0 ∧ nondet_12_0 − nondet_12_0 ≤ 0 ∧ − lt_37_post + lt_37_post ≤ 0 ∧ lt_37_post − lt_37_post ≤ 0 ∧ − lt_37_1 + lt_37_1 ≤ 0 ∧ lt_37_1 − lt_37_1 ≤ 0 ∧ − lt_37_0 + lt_37_0 ≤ 0 ∧ lt_37_0 − lt_37_0 ≤ 0 ∧ − lt_36_post + lt_36_post ≤ 0 ∧ lt_36_post − lt_36_post ≤ 0 ∧ − lt_36_0 + lt_36_0 ≤ 0 ∧ lt_36_0 − lt_36_0 ≤ 0 ∧ − lt_237_post + lt_237_post ≤ 0 ∧ lt_237_post − lt_237_post ≤ 0 ∧ − lt_237_0 + lt_237_0 ≤ 0 ∧ lt_237_0 − lt_237_0 ≤ 0 ∧ − length_43_post + length_43_post ≤ 0 ∧ length_43_post − length_43_post ≤ 0 ∧ − length_43_0 + length_43_0 ≤ 0 ∧ length_43_0 − length_43_0 ≤ 0 ∧ − len_246_post + len_246_post ≤ 0 ∧ len_246_post − len_246_post ≤ 0 ∧ − len_246_0 + len_246_0 ≤ 0 ∧ len_246_0 − len_246_0 ≤ 0 ∧ − len_180_post + len_180_post ≤ 0 ∧ len_180_post − len_180_post ≤ 0 ∧ − len_180_0 + len_180_0 ≤ 0 ∧ len_180_0 − len_180_0 ≤ 0 ∧ − i_44_post + i_44_post ≤ 0 ∧ i_44_post − i_44_post ≤ 0 ∧ − i_44_0 + i_44_0 ≤ 0 ∧ i_44_0 − i_44_0 ≤ 0 ∧ − i_125_post + i_125_post ≤ 0 ∧ i_125_post − i_125_post ≤ 0 ∧ − i_125_0 + i_125_0 ≤ 0 ∧ i_125_0 − i_125_0 ≤ 0 ∧ − i_108_post + i_108_post ≤ 0 ∧ i_108_post − i_108_post ≤ 0 ∧ − i_108_0 + i_108_0 ≤ 0 ∧ i_108_0 − i_108_0 ≤ 0 ∧ − head_46_post + head_46_post ≤ 0 ∧ head_46_post − head_46_post ≤ 0 ∧ − head_46_0 + head_46_0 ≤ 0 ∧ head_46_0 − head_46_0 ≤ 0 ∧ − fmt_31_post + fmt_31_post ≤ 0 ∧ fmt_31_post − fmt_31_post ≤ 0 ∧ − fmt_31_4 + fmt_31_4 ≤ 0 ∧ fmt_31_4 − fmt_31_4 ≤ 0 ∧ − fmt_31_3 + fmt_31_3 ≤ 0 ∧ fmt_31_3 − fmt_31_3 ≤ 0 ∧ − fmt_31_2 + fmt_31_2 ≤ 0 ∧ fmt_31_2 − fmt_31_2 ≤ 0 ∧ − fmt_31_1 + fmt_31_1 ≤ 0 ∧ fmt_31_1 − fmt_31_1 ≤ 0 ∧ − fmt_31_0 + fmt_31_0 ≤ 0 ∧ fmt_31_0 − fmt_31_0 ≤ 0 ∧ − ct_17_post + ct_17_post ≤ 0 ∧ ct_17_post − ct_17_post ≤ 0 ∧ − ct_17_2 + ct_17_2 ≤ 0 ∧ ct_17_2 − ct_17_2 ≤ 0 ∧ − ct_17_1 + ct_17_1 ≤ 0 ∧ ct_17_1 − ct_17_1 ≤ 0 ∧ − ct_17_0 + ct_17_0 ≤ 0 ∧ ct_17_0 − ct_17_0 ≤ 0 ∧ − a_328_post + a_328_post ≤ 0 ∧ a_328_post − a_328_post ≤ 0 ∧ − a_328_0 + a_328_0 ≤ 0 ∧ a_328_0 − a_328_0 ≤ 0 ∧ − a_305_post + a_305_post ≤ 0 ∧ a_305_post − a_305_post ≤ 0 ∧ − a_305_0 + a_305_0 ≤ 0 ∧ a_305_0 − a_305_0 ≤ 0 ∧ − a_283_post + a_283_post ≤ 0 ∧ a_283_post − a_283_post ≤ 0 ∧ − a_283_0 + a_283_0 ≤ 0 ∧ a_283_0 − a_283_0 ≤ 0 ∧ − a_26_post + a_26_post ≤ 0 ∧ a_26_post − a_26_post ≤ 0 ∧ − a_26_1 + a_26_1 ≤ 0 ∧ a_26_1 − a_26_1 ≤ 0 ∧ − a_26_0 + a_26_0 ≤ 0 ∧ a_26_0 − a_26_0 ≤ 0 ∧ − a_247_post + a_247_post ≤ 0 ∧ a_247_post − a_247_post ≤ 0 ∧ − a_247_0 + a_247_0 ≤ 0 ∧ a_247_0 − a_247_0 ≤ 0 ∧ − a_197_post + a_197_post ≤ 0 ∧ a_197_post − a_197_post ≤ 0 ∧ − a_197_0 + a_197_0 ≤ 0 ∧ a_197_0 − a_197_0 ≤ 0 ∧ − a_146_0 + a_146_0 ≤ 0 ∧ a_146_0 − a_146_0 ≤ 0 | |
| 36 | 53 | 37: | 1 + x_14_0 ≤ 0 ∧ − y_19_post + y_19_post ≤ 0 ∧ y_19_post − y_19_post ≤ 0 ∧ − y_19_2 + y_19_2 ≤ 0 ∧ y_19_2 − y_19_2 ≤ 0 ∧ − y_19_1 + y_19_1 ≤ 0 ∧ y_19_1 − y_19_1 ≤ 0 ∧ − y_19_0 + y_19_0 ≤ 0 ∧ y_19_0 − y_19_0 ≤ 0 ∧ − x_SLAM_f_18_post + x_SLAM_f_18_post ≤ 0 ∧ x_SLAM_f_18_post − x_SLAM_f_18_post ≤ 0 ∧ − x_SLAM_f_18_2 + x_SLAM_f_18_2 ≤ 0 ∧ x_SLAM_f_18_2 − x_SLAM_f_18_2 ≤ 0 ∧ − x_SLAM_f_18_1 + x_SLAM_f_18_1 ≤ 0 ∧ x_SLAM_f_18_1 − x_SLAM_f_18_1 ≤ 0 ∧ − x_SLAM_f_18_0 + x_SLAM_f_18_0 ≤ 0 ∧ x_SLAM_f_18_0 − x_SLAM_f_18_0 ≤ 0 ∧ − x_34_post + x_34_post ≤ 0 ∧ x_34_post − x_34_post ≤ 0 ∧ − x_34_1 + x_34_1 ≤ 0 ∧ x_34_1 − x_34_1 ≤ 0 ∧ − x_34_0 + x_34_0 ≤ 0 ∧ x_34_0 − x_34_0 ≤ 0 ∧ − x_28_post + x_28_post ≤ 0 ∧ x_28_post − x_28_post ≤ 0 ∧ − x_28_1 + x_28_1 ≤ 0 ∧ x_28_1 − x_28_1 ≤ 0 ∧ − x_28_0 + x_28_0 ≤ 0 ∧ x_28_0 − x_28_0 ≤ 0 ∧ − x_238_post + x_238_post ≤ 0 ∧ x_238_post − x_238_post ≤ 0 ∧ − x_238_0 + x_238_0 ≤ 0 ∧ x_238_0 − x_238_0 ≤ 0 ∧ − x_20_post + x_20_post ≤ 0 ∧ x_20_post − x_20_post ≤ 0 ∧ − x_20_2 + x_20_2 ≤ 0 ∧ x_20_2 − x_20_2 ≤ 0 ∧ − x_20_1 + x_20_1 ≤ 0 ∧ x_20_1 − x_20_1 ≤ 0 ∧ − x_20_0 + x_20_0 ≤ 0 ∧ x_20_0 − x_20_0 ≤ 0 ∧ − x_177_post + x_177_post ≤ 0 ∧ x_177_post − x_177_post ≤ 0 ∧ − x_177_0 + x_177_0 ≤ 0 ∧ x_177_0 − x_177_0 ≤ 0 ∧ − x_16_post + x_16_post ≤ 0 ∧ x_16_post − x_16_post ≤ 0 ∧ − x_16_1 + x_16_1 ≤ 0 ∧ x_16_1 − x_16_1 ≤ 0 ∧ − x_16_0 + x_16_0 ≤ 0 ∧ x_16_0 − x_16_0 ≤ 0 ∧ − x_14_post + x_14_post ≤ 0 ∧ x_14_post − x_14_post ≤ 0 ∧ − x_14_0 + x_14_0 ≤ 0 ∧ x_14_0 − x_14_0 ≤ 0 ∧ − tmp_48_post + tmp_48_post ≤ 0 ∧ tmp_48_post − tmp_48_post ≤ 0 ∧ − tmp_48_0 + tmp_48_0 ≤ 0 ∧ tmp_48_0 − tmp_48_0 ≤ 0 ∧ − temp_49_post + temp_49_post ≤ 0 ∧ temp_49_post − temp_49_post ≤ 0 ∧ − temp_49_0 + temp_49_0 ≤ 0 ∧ temp_49_0 − temp_49_0 ≤ 0 ∧ − temp0_45_post + temp0_45_post ≤ 0 ∧ temp0_45_post − temp0_45_post ≤ 0 ∧ − temp0_45_1 + temp0_45_1 ≤ 0 ∧ temp0_45_1 − temp0_45_1 ≤ 0 ∧ − temp0_45_0 + temp0_45_0 ≤ 0 ∧ temp0_45_0 − temp0_45_0 ≤ 0 ∧ − temp0_32_post + temp0_32_post ≤ 0 ∧ temp0_32_post − temp0_32_post ≤ 0 ∧ − temp0_32_4 + temp0_32_4 ≤ 0 ∧ temp0_32_4 − temp0_32_4 ≤ 0 ∧ − temp0_32_3 + temp0_32_3 ≤ 0 ∧ temp0_32_3 − temp0_32_3 ≤ 0 ∧ − temp0_32_2 + temp0_32_2 ≤ 0 ∧ temp0_32_2 − temp0_32_2 ≤ 0 ∧ − temp0_32_1 + temp0_32_1 ≤ 0 ∧ temp0_32_1 − temp0_32_1 ≤ 0 ∧ − temp0_32_0 + temp0_32_0 ≤ 0 ∧ temp0_32_0 − temp0_32_0 ≤ 0 ∧ − temp0_15_0 + temp0_15_0 ≤ 0 ∧ temp0_15_0 − temp0_15_0 ≤ 0 ∧ − t_23_post + t_23_post ≤ 0 ∧ t_23_post − t_23_post ≤ 0 ∧ − t_23_1 + t_23_1 ≤ 0 ∧ t_23_1 − t_23_1 ≤ 0 ∧ − t_23_0 + t_23_0 ≤ 0 ∧ t_23_0 − t_23_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_post + result_dot_printf_sdv_special_RETURN_VALUE_41_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_post − result_dot_printf_sdv_special_RETURN_VALUE_41_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_1 + result_dot_printf_sdv_special_RETURN_VALUE_41_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_1 − result_dot_printf_sdv_special_RETURN_VALUE_41_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_0 + result_dot_printf_sdv_special_RETURN_VALUE_41_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_0 − result_dot_printf_sdv_special_RETURN_VALUE_41_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_post + result_dot_printf_sdv_special_RETURN_VALUE_38_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_post − result_dot_printf_sdv_special_RETURN_VALUE_38_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_1 + result_dot_printf_sdv_special_RETURN_VALUE_38_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_1 − result_dot_printf_sdv_special_RETURN_VALUE_38_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_0 + result_dot_printf_sdv_special_RETURN_VALUE_38_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_0 − result_dot_printf_sdv_special_RETURN_VALUE_38_0 ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_post + result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_post − result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_1 + result_dot_nondet_sdv_special_RETURN_VALUE_13_1 ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_1 − result_dot_nondet_sdv_special_RETURN_VALUE_13_1 ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_0 + result_dot_nondet_sdv_special_RETURN_VALUE_13_0 ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_0 − result_dot_nondet_sdv_special_RETURN_VALUE_13_0 ≤ 0 ∧ − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post + result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post ≤ 0 ∧ result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post ≤ 0 ∧ − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 + result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 ≤ 0 ∧ result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 ≤ 0 ∧ − result_11_post + result_11_post ≤ 0 ∧ result_11_post − result_11_post ≤ 0 ∧ − result_11_6 + result_11_6 ≤ 0 ∧ result_11_6 − result_11_6 ≤ 0 ∧ − result_11_5 + result_11_5 ≤ 0 ∧ result_11_5 − result_11_5 ≤ 0 ∧ − result_11_4 + result_11_4 ≤ 0 ∧ result_11_4 − result_11_4 ≤ 0 ∧ − result_11_3 + result_11_3 ≤ 0 ∧ result_11_3 − result_11_3 ≤ 0 ∧ − result_11_2 + result_11_2 ≤ 0 ∧ result_11_2 − result_11_2 ≤ 0 ∧ − result_11_1 + result_11_1 ≤ 0 ∧ result_11_1 − result_11_1 ≤ 0 ∧ − result_11_0 + result_11_0 ≤ 0 ∧ result_11_0 − result_11_0 ≤ 0 ∧ − rcd_72_post + rcd_72_post ≤ 0 ∧ rcd_72_post − rcd_72_post ≤ 0 ∧ − rcd_72_0 + rcd_72_0 ≤ 0 ∧ rcd_72_0 − rcd_72_0 ≤ 0 ∧ − rcd_102_post + rcd_102_post ≤ 0 ∧ rcd_102_post − rcd_102_post ≤ 0 ∧ − rcd_102_0 + rcd_102_0 ≤ 0 ∧ rcd_102_0 − rcd_102_0 ≤ 0 ∧ − r_53_post + r_53_post ≤ 0 ∧ r_53_post − r_53_post ≤ 0 ∧ − r_53_0 + r_53_0 ≤ 0 ∧ r_53_0 − r_53_0 ≤ 0 ∧ − r_161_post + r_161_post ≤ 0 ∧ r_161_post − r_161_post ≤ 0 ∧ − r_161_0 + r_161_0 ≤ 0 ∧ r_161_0 − r_161_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 ≤ 0 ∧ − nondet_12_post + nondet_12_post ≤ 0 ∧ nondet_12_post − nondet_12_post ≤ 0 ∧ − nondet_12_1 + nondet_12_1 ≤ 0 ∧ nondet_12_1 − nondet_12_1 ≤ 0 ∧ − nondet_12_0 + nondet_12_0 ≤ 0 ∧ nondet_12_0 − nondet_12_0 ≤ 0 ∧ − lt_37_post + lt_37_post ≤ 0 ∧ lt_37_post − lt_37_post ≤ 0 ∧ − lt_37_1 + lt_37_1 ≤ 0 ∧ lt_37_1 − lt_37_1 ≤ 0 ∧ − lt_37_0 + lt_37_0 ≤ 0 ∧ lt_37_0 − lt_37_0 ≤ 0 ∧ − lt_36_post + lt_36_post ≤ 0 ∧ lt_36_post − lt_36_post ≤ 0 ∧ − lt_36_0 + lt_36_0 ≤ 0 ∧ lt_36_0 − lt_36_0 ≤ 0 ∧ − lt_237_post + lt_237_post ≤ 0 ∧ lt_237_post − lt_237_post ≤ 0 ∧ − lt_237_0 + lt_237_0 ≤ 0 ∧ lt_237_0 − lt_237_0 ≤ 0 ∧ − length_43_post + length_43_post ≤ 0 ∧ length_43_post − length_43_post ≤ 0 ∧ − length_43_0 + length_43_0 ≤ 0 ∧ length_43_0 − length_43_0 ≤ 0 ∧ − len_246_post + len_246_post ≤ 0 ∧ len_246_post − len_246_post ≤ 0 ∧ − len_246_0 + len_246_0 ≤ 0 ∧ len_246_0 − len_246_0 ≤ 0 ∧ − len_180_post + len_180_post ≤ 0 ∧ len_180_post − len_180_post ≤ 0 ∧ − len_180_0 + len_180_0 ≤ 0 ∧ len_180_0 − len_180_0 ≤ 0 ∧ − i_44_post + i_44_post ≤ 0 ∧ i_44_post − i_44_post ≤ 0 ∧ − i_44_0 + i_44_0 ≤ 0 ∧ i_44_0 − i_44_0 ≤ 0 ∧ − i_125_post + i_125_post ≤ 0 ∧ i_125_post − i_125_post ≤ 0 ∧ − i_125_0 + i_125_0 ≤ 0 ∧ i_125_0 − i_125_0 ≤ 0 ∧ − i_108_post + i_108_post ≤ 0 ∧ i_108_post − i_108_post ≤ 0 ∧ − i_108_0 + i_108_0 ≤ 0 ∧ i_108_0 − i_108_0 ≤ 0 ∧ − head_46_post + head_46_post ≤ 0 ∧ head_46_post − head_46_post ≤ 0 ∧ − head_46_0 + head_46_0 ≤ 0 ∧ head_46_0 − head_46_0 ≤ 0 ∧ − fmt_31_post + fmt_31_post ≤ 0 ∧ fmt_31_post − fmt_31_post ≤ 0 ∧ − fmt_31_4 + fmt_31_4 ≤ 0 ∧ fmt_31_4 − fmt_31_4 ≤ 0 ∧ − fmt_31_3 + fmt_31_3 ≤ 0 ∧ fmt_31_3 − fmt_31_3 ≤ 0 ∧ − fmt_31_2 + fmt_31_2 ≤ 0 ∧ fmt_31_2 − fmt_31_2 ≤ 0 ∧ − fmt_31_1 + fmt_31_1 ≤ 0 ∧ fmt_31_1 − fmt_31_1 ≤ 0 ∧ − fmt_31_0 + fmt_31_0 ≤ 0 ∧ fmt_31_0 − fmt_31_0 ≤ 0 ∧ − ct_17_post + ct_17_post ≤ 0 ∧ ct_17_post − ct_17_post ≤ 0 ∧ − ct_17_2 + ct_17_2 ≤ 0 ∧ ct_17_2 − ct_17_2 ≤ 0 ∧ − ct_17_1 + ct_17_1 ≤ 0 ∧ ct_17_1 − ct_17_1 ≤ 0 ∧ − ct_17_0 + ct_17_0 ≤ 0 ∧ ct_17_0 − ct_17_0 ≤ 0 ∧ − a_328_post + a_328_post ≤ 0 ∧ a_328_post − a_328_post ≤ 0 ∧ − a_328_0 + a_328_0 ≤ 0 ∧ a_328_0 − a_328_0 ≤ 0 ∧ − a_305_post + a_305_post ≤ 0 ∧ a_305_post − a_305_post ≤ 0 ∧ − a_305_0 + a_305_0 ≤ 0 ∧ a_305_0 − a_305_0 ≤ 0 ∧ − a_283_post + a_283_post ≤ 0 ∧ a_283_post − a_283_post ≤ 0 ∧ − a_283_0 + a_283_0 ≤ 0 ∧ a_283_0 − a_283_0 ≤ 0 ∧ − a_26_post + a_26_post ≤ 0 ∧ a_26_post − a_26_post ≤ 0 ∧ − a_26_1 + a_26_1 ≤ 0 ∧ a_26_1 − a_26_1 ≤ 0 ∧ − a_26_0 + a_26_0 ≤ 0 ∧ a_26_0 − a_26_0 ≤ 0 ∧ − a_247_post + a_247_post ≤ 0 ∧ a_247_post − a_247_post ≤ 0 ∧ − a_247_0 + a_247_0 ≤ 0 ∧ a_247_0 − a_247_0 ≤ 0 ∧ − a_197_post + a_197_post ≤ 0 ∧ a_197_post − a_197_post ≤ 0 ∧ − a_197_0 + a_197_0 ≤ 0 ∧ a_197_0 − a_197_0 ≤ 0 ∧ − a_146_0 + a_146_0 ≤ 0 ∧ a_146_0 − a_146_0 ≤ 0 | |
| 37 | 54 | 38: | 1 − result_dot_nondet_sdv_special_RETURN_VALUE_13_0 ≤ 0 ∧ 2 − result_dot_nondet_sdv_special_RETURN_VALUE_13_0 ≤ 0 ∧ − i_125_0 + result_dot_nondet_sdv_special_RETURN_VALUE_13_0 ≤ 0 ∧ − y_19_post + y_19_post ≤ 0 ∧ y_19_post − y_19_post ≤ 0 ∧ − y_19_2 + y_19_2 ≤ 0 ∧ y_19_2 − y_19_2 ≤ 0 ∧ − y_19_1 + y_19_1 ≤ 0 ∧ y_19_1 − y_19_1 ≤ 0 ∧ − y_19_0 + y_19_0 ≤ 0 ∧ y_19_0 − y_19_0 ≤ 0 ∧ − x_SLAM_f_18_post + x_SLAM_f_18_post ≤ 0 ∧ x_SLAM_f_18_post − x_SLAM_f_18_post ≤ 0 ∧ − x_SLAM_f_18_2 + x_SLAM_f_18_2 ≤ 0 ∧ x_SLAM_f_18_2 − x_SLAM_f_18_2 ≤ 0 ∧ − x_SLAM_f_18_1 + x_SLAM_f_18_1 ≤ 0 ∧ x_SLAM_f_18_1 − x_SLAM_f_18_1 ≤ 0 ∧ − x_SLAM_f_18_0 + x_SLAM_f_18_0 ≤ 0 ∧ x_SLAM_f_18_0 − x_SLAM_f_18_0 ≤ 0 ∧ − x_34_post + x_34_post ≤ 0 ∧ x_34_post − x_34_post ≤ 0 ∧ − x_34_1 + x_34_1 ≤ 0 ∧ x_34_1 − x_34_1 ≤ 0 ∧ − x_34_0 + x_34_0 ≤ 0 ∧ x_34_0 − x_34_0 ≤ 0 ∧ − x_28_post + x_28_post ≤ 0 ∧ x_28_post − x_28_post ≤ 0 ∧ − x_28_1 + x_28_1 ≤ 0 ∧ x_28_1 − x_28_1 ≤ 0 ∧ − x_28_0 + x_28_0 ≤ 0 ∧ x_28_0 − x_28_0 ≤ 0 ∧ − x_238_post + x_238_post ≤ 0 ∧ x_238_post − x_238_post ≤ 0 ∧ − x_238_0 + x_238_0 ≤ 0 ∧ x_238_0 − x_238_0 ≤ 0 ∧ − x_20_post + x_20_post ≤ 0 ∧ x_20_post − x_20_post ≤ 0 ∧ − x_20_2 + x_20_2 ≤ 0 ∧ x_20_2 − x_20_2 ≤ 0 ∧ − x_20_1 + x_20_1 ≤ 0 ∧ x_20_1 − x_20_1 ≤ 0 ∧ − x_20_0 + x_20_0 ≤ 0 ∧ x_20_0 − x_20_0 ≤ 0 ∧ − x_177_post + x_177_post ≤ 0 ∧ x_177_post − x_177_post ≤ 0 ∧ − x_177_0 + x_177_0 ≤ 0 ∧ x_177_0 − x_177_0 ≤ 0 ∧ − x_16_post + x_16_post ≤ 0 ∧ x_16_post − x_16_post ≤ 0 ∧ − x_16_1 + x_16_1 ≤ 0 ∧ x_16_1 − x_16_1 ≤ 0 ∧ − x_16_0 + x_16_0 ≤ 0 ∧ x_16_0 − x_16_0 ≤ 0 ∧ − x_14_post + x_14_post ≤ 0 ∧ x_14_post − x_14_post ≤ 0 ∧ − x_14_0 + x_14_0 ≤ 0 ∧ x_14_0 − x_14_0 ≤ 0 ∧ − tmp_48_post + tmp_48_post ≤ 0 ∧ tmp_48_post − tmp_48_post ≤ 0 ∧ − tmp_48_0 + tmp_48_0 ≤ 0 ∧ tmp_48_0 − tmp_48_0 ≤ 0 ∧ − temp_49_post + temp_49_post ≤ 0 ∧ temp_49_post − temp_49_post ≤ 0 ∧ − temp_49_0 + temp_49_0 ≤ 0 ∧ temp_49_0 − temp_49_0 ≤ 0 ∧ − temp0_45_post + temp0_45_post ≤ 0 ∧ temp0_45_post − temp0_45_post ≤ 0 ∧ − temp0_45_1 + temp0_45_1 ≤ 0 ∧ temp0_45_1 − temp0_45_1 ≤ 0 ∧ − temp0_45_0 + temp0_45_0 ≤ 0 ∧ temp0_45_0 − temp0_45_0 ≤ 0 ∧ − temp0_32_post + temp0_32_post ≤ 0 ∧ temp0_32_post − temp0_32_post ≤ 0 ∧ − temp0_32_4 + temp0_32_4 ≤ 0 ∧ temp0_32_4 − temp0_32_4 ≤ 0 ∧ − temp0_32_3 + temp0_32_3 ≤ 0 ∧ temp0_32_3 − temp0_32_3 ≤ 0 ∧ − temp0_32_2 + temp0_32_2 ≤ 0 ∧ temp0_32_2 − temp0_32_2 ≤ 0 ∧ − temp0_32_1 + temp0_32_1 ≤ 0 ∧ temp0_32_1 − temp0_32_1 ≤ 0 ∧ − temp0_32_0 + temp0_32_0 ≤ 0 ∧ temp0_32_0 − temp0_32_0 ≤ 0 ∧ − temp0_15_0 + temp0_15_0 ≤ 0 ∧ temp0_15_0 − temp0_15_0 ≤ 0 ∧ − t_23_post + t_23_post ≤ 0 ∧ t_23_post − t_23_post ≤ 0 ∧ − t_23_1 + t_23_1 ≤ 0 ∧ t_23_1 − t_23_1 ≤ 0 ∧ − t_23_0 + t_23_0 ≤ 0 ∧ t_23_0 − t_23_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_post + result_dot_printf_sdv_special_RETURN_VALUE_41_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_post − result_dot_printf_sdv_special_RETURN_VALUE_41_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_1 + result_dot_printf_sdv_special_RETURN_VALUE_41_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_1 − result_dot_printf_sdv_special_RETURN_VALUE_41_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_0 + result_dot_printf_sdv_special_RETURN_VALUE_41_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_0 − result_dot_printf_sdv_special_RETURN_VALUE_41_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_post + result_dot_printf_sdv_special_RETURN_VALUE_38_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_post − result_dot_printf_sdv_special_RETURN_VALUE_38_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_1 + result_dot_printf_sdv_special_RETURN_VALUE_38_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_1 − result_dot_printf_sdv_special_RETURN_VALUE_38_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_0 + result_dot_printf_sdv_special_RETURN_VALUE_38_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_0 − result_dot_printf_sdv_special_RETURN_VALUE_38_0 ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_post + result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_post − result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_1 + result_dot_nondet_sdv_special_RETURN_VALUE_13_1 ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_1 − result_dot_nondet_sdv_special_RETURN_VALUE_13_1 ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_0 + result_dot_nondet_sdv_special_RETURN_VALUE_13_0 ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_0 − result_dot_nondet_sdv_special_RETURN_VALUE_13_0 ≤ 0 ∧ − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post + result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post ≤ 0 ∧ result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post ≤ 0 ∧ − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 + result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 ≤ 0 ∧ result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 ≤ 0 ∧ − result_11_post + result_11_post ≤ 0 ∧ result_11_post − result_11_post ≤ 0 ∧ − result_11_6 + result_11_6 ≤ 0 ∧ result_11_6 − result_11_6 ≤ 0 ∧ − result_11_5 + result_11_5 ≤ 0 ∧ result_11_5 − result_11_5 ≤ 0 ∧ − result_11_4 + result_11_4 ≤ 0 ∧ result_11_4 − result_11_4 ≤ 0 ∧ − result_11_3 + result_11_3 ≤ 0 ∧ result_11_3 − result_11_3 ≤ 0 ∧ − result_11_2 + result_11_2 ≤ 0 ∧ result_11_2 − result_11_2 ≤ 0 ∧ − result_11_1 + result_11_1 ≤ 0 ∧ result_11_1 − result_11_1 ≤ 0 ∧ − result_11_0 + result_11_0 ≤ 0 ∧ result_11_0 − result_11_0 ≤ 0 ∧ − rcd_72_post + rcd_72_post ≤ 0 ∧ rcd_72_post − rcd_72_post ≤ 0 ∧ − rcd_72_0 + rcd_72_0 ≤ 0 ∧ rcd_72_0 − rcd_72_0 ≤ 0 ∧ − rcd_102_post + rcd_102_post ≤ 0 ∧ rcd_102_post − rcd_102_post ≤ 0 ∧ − rcd_102_0 + rcd_102_0 ≤ 0 ∧ rcd_102_0 − rcd_102_0 ≤ 0 ∧ − r_53_post + r_53_post ≤ 0 ∧ r_53_post − r_53_post ≤ 0 ∧ − r_53_0 + r_53_0 ≤ 0 ∧ r_53_0 − r_53_0 ≤ 0 ∧ − r_161_post + r_161_post ≤ 0 ∧ r_161_post − r_161_post ≤ 0 ∧ − r_161_0 + r_161_0 ≤ 0 ∧ r_161_0 − r_161_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 ≤ 0 ∧ − nondet_12_post + nondet_12_post ≤ 0 ∧ nondet_12_post − nondet_12_post ≤ 0 ∧ − nondet_12_1 + nondet_12_1 ≤ 0 ∧ nondet_12_1 − nondet_12_1 ≤ 0 ∧ − nondet_12_0 + nondet_12_0 ≤ 0 ∧ nondet_12_0 − nondet_12_0 ≤ 0 ∧ − lt_37_post + lt_37_post ≤ 0 ∧ lt_37_post − lt_37_post ≤ 0 ∧ − lt_37_1 + lt_37_1 ≤ 0 ∧ lt_37_1 − lt_37_1 ≤ 0 ∧ − lt_37_0 + lt_37_0 ≤ 0 ∧ lt_37_0 − lt_37_0 ≤ 0 ∧ − lt_36_post + lt_36_post ≤ 0 ∧ lt_36_post − lt_36_post ≤ 0 ∧ − lt_36_0 + lt_36_0 ≤ 0 ∧ lt_36_0 − lt_36_0 ≤ 0 ∧ − lt_237_post + lt_237_post ≤ 0 ∧ lt_237_post − lt_237_post ≤ 0 ∧ − lt_237_0 + lt_237_0 ≤ 0 ∧ lt_237_0 − lt_237_0 ≤ 0 ∧ − length_43_post + length_43_post ≤ 0 ∧ length_43_post − length_43_post ≤ 0 ∧ − length_43_0 + length_43_0 ≤ 0 ∧ length_43_0 − length_43_0 ≤ 0 ∧ − len_246_post + len_246_post ≤ 0 ∧ len_246_post − len_246_post ≤ 0 ∧ − len_246_0 + len_246_0 ≤ 0 ∧ len_246_0 − len_246_0 ≤ 0 ∧ − len_180_post + len_180_post ≤ 0 ∧ len_180_post − len_180_post ≤ 0 ∧ − len_180_0 + len_180_0 ≤ 0 ∧ len_180_0 − len_180_0 ≤ 0 ∧ − i_44_post + i_44_post ≤ 0 ∧ i_44_post − i_44_post ≤ 0 ∧ − i_44_0 + i_44_0 ≤ 0 ∧ i_44_0 − i_44_0 ≤ 0 ∧ − i_125_post + i_125_post ≤ 0 ∧ i_125_post − i_125_post ≤ 0 ∧ − i_125_0 + i_125_0 ≤ 0 ∧ i_125_0 − i_125_0 ≤ 0 ∧ − i_108_post + i_108_post ≤ 0 ∧ i_108_post − i_108_post ≤ 0 ∧ − i_108_0 + i_108_0 ≤ 0 ∧ i_108_0 − i_108_0 ≤ 0 ∧ − head_46_post + head_46_post ≤ 0 ∧ head_46_post − head_46_post ≤ 0 ∧ − head_46_0 + head_46_0 ≤ 0 ∧ head_46_0 − head_46_0 ≤ 0 ∧ − fmt_31_post + fmt_31_post ≤ 0 ∧ fmt_31_post − fmt_31_post ≤ 0 ∧ − fmt_31_4 + fmt_31_4 ≤ 0 ∧ fmt_31_4 − fmt_31_4 ≤ 0 ∧ − fmt_31_3 + fmt_31_3 ≤ 0 ∧ fmt_31_3 − fmt_31_3 ≤ 0 ∧ − fmt_31_2 + fmt_31_2 ≤ 0 ∧ fmt_31_2 − fmt_31_2 ≤ 0 ∧ − fmt_31_1 + fmt_31_1 ≤ 0 ∧ fmt_31_1 − fmt_31_1 ≤ 0 ∧ − fmt_31_0 + fmt_31_0 ≤ 0 ∧ fmt_31_0 − fmt_31_0 ≤ 0 ∧ − ct_17_post + ct_17_post ≤ 0 ∧ ct_17_post − ct_17_post ≤ 0 ∧ − ct_17_2 + ct_17_2 ≤ 0 ∧ ct_17_2 − ct_17_2 ≤ 0 ∧ − ct_17_1 + ct_17_1 ≤ 0 ∧ ct_17_1 − ct_17_1 ≤ 0 ∧ − ct_17_0 + ct_17_0 ≤ 0 ∧ ct_17_0 − ct_17_0 ≤ 0 ∧ − a_328_post + a_328_post ≤ 0 ∧ a_328_post − a_328_post ≤ 0 ∧ − a_328_0 + a_328_0 ≤ 0 ∧ a_328_0 − a_328_0 ≤ 0 ∧ − a_305_post + a_305_post ≤ 0 ∧ a_305_post − a_305_post ≤ 0 ∧ − a_305_0 + a_305_0 ≤ 0 ∧ a_305_0 − a_305_0 ≤ 0 ∧ − a_283_post + a_283_post ≤ 0 ∧ a_283_post − a_283_post ≤ 0 ∧ − a_283_0 + a_283_0 ≤ 0 ∧ a_283_0 − a_283_0 ≤ 0 ∧ − a_26_post + a_26_post ≤ 0 ∧ a_26_post − a_26_post ≤ 0 ∧ − a_26_1 + a_26_1 ≤ 0 ∧ a_26_1 − a_26_1 ≤ 0 ∧ − a_26_0 + a_26_0 ≤ 0 ∧ a_26_0 − a_26_0 ≤ 0 ∧ − a_247_post + a_247_post ≤ 0 ∧ a_247_post − a_247_post ≤ 0 ∧ − a_247_0 + a_247_0 ≤ 0 ∧ a_247_0 − a_247_0 ≤ 0 ∧ − a_197_post + a_197_post ≤ 0 ∧ a_197_post − a_197_post ≤ 0 ∧ − a_197_0 + a_197_0 ≤ 0 ∧ a_197_0 − a_197_0 ≤ 0 ∧ − a_146_0 + a_146_0 ≤ 0 ∧ a_146_0 − a_146_0 ≤ 0 | |
| 33 | 55 | 39: | 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ − i_44_0 ≤ 0 ∧ 1 + i_44_0 − length_43_0 ≤ 0 ∧ − temp_49_0 + tmp_48_post ≤ 0 ∧ temp_49_0 − tmp_48_post ≤ 0 ∧ head_46_post − tmp_48_post ≤ 0 ∧ − head_46_post + tmp_48_post ≤ 0 ∧ −1 − i_44_0 + i_44_post ≤ 0 ∧ 1 + i_44_0 − i_44_post ≤ 0 ∧ −1 − i_108_post + i_44_post ≤ 0 ∧ 1 + i_108_post − i_44_post ≤ 0 ∧ 1 + i_108_post − i_44_post ≤ 0 ∧ −1 − i_108_post + i_44_post ≤ 0 ∧ 1 + i_108_post − length_43_0 ≤ 0 ∧ head_46_0 − head_46_post ≤ 0 ∧ − head_46_0 + head_46_post ≤ 0 ∧ i_108_0 − i_108_post ≤ 0 ∧ − i_108_0 + i_108_post ≤ 0 ∧ i_44_0 − i_44_post ≤ 0 ∧ − i_44_0 + i_44_post ≤ 0 ∧ rcd_102_0 − rcd_102_post ≤ 0 ∧ − rcd_102_0 + rcd_102_post ≤ 0 ∧ temp_49_0 − temp_49_post ≤ 0 ∧ − temp_49_0 + temp_49_post ≤ 0 ∧ tmp_48_0 − tmp_48_post ≤ 0 ∧ − tmp_48_0 + tmp_48_post ≤ 0 ∧ − y_19_post + y_19_post ≤ 0 ∧ y_19_post − y_19_post ≤ 0 ∧ − y_19_2 + y_19_2 ≤ 0 ∧ y_19_2 − y_19_2 ≤ 0 ∧ − y_19_1 + y_19_1 ≤ 0 ∧ y_19_1 − y_19_1 ≤ 0 ∧ − y_19_0 + y_19_0 ≤ 0 ∧ y_19_0 − y_19_0 ≤ 0 ∧ − x_SLAM_f_18_post + x_SLAM_f_18_post ≤ 0 ∧ x_SLAM_f_18_post − x_SLAM_f_18_post ≤ 0 ∧ − x_SLAM_f_18_2 + x_SLAM_f_18_2 ≤ 0 ∧ x_SLAM_f_18_2 − x_SLAM_f_18_2 ≤ 0 ∧ − x_SLAM_f_18_1 + x_SLAM_f_18_1 ≤ 0 ∧ x_SLAM_f_18_1 − x_SLAM_f_18_1 ≤ 0 ∧ − x_SLAM_f_18_0 + x_SLAM_f_18_0 ≤ 0 ∧ x_SLAM_f_18_0 − x_SLAM_f_18_0 ≤ 0 ∧ − x_34_post + x_34_post ≤ 0 ∧ x_34_post − x_34_post ≤ 0 ∧ − x_34_1 + x_34_1 ≤ 0 ∧ x_34_1 − x_34_1 ≤ 0 ∧ − x_34_0 + x_34_0 ≤ 0 ∧ x_34_0 − x_34_0 ≤ 0 ∧ − x_28_post + x_28_post ≤ 0 ∧ x_28_post − x_28_post ≤ 0 ∧ − x_28_1 + x_28_1 ≤ 0 ∧ x_28_1 − x_28_1 ≤ 0 ∧ − x_28_0 + x_28_0 ≤ 0 ∧ x_28_0 − x_28_0 ≤ 0 ∧ − x_238_post + x_238_post ≤ 0 ∧ x_238_post − x_238_post ≤ 0 ∧ − x_238_0 + x_238_0 ≤ 0 ∧ x_238_0 − x_238_0 ≤ 0 ∧ − x_20_post + x_20_post ≤ 0 ∧ x_20_post − x_20_post ≤ 0 ∧ − x_20_2 + x_20_2 ≤ 0 ∧ x_20_2 − x_20_2 ≤ 0 ∧ − x_20_1 + x_20_1 ≤ 0 ∧ x_20_1 − x_20_1 ≤ 0 ∧ − x_20_0 + x_20_0 ≤ 0 ∧ x_20_0 − x_20_0 ≤ 0 ∧ − x_177_post + x_177_post ≤ 0 ∧ x_177_post − x_177_post ≤ 0 ∧ − x_177_0 + x_177_0 ≤ 0 ∧ x_177_0 − x_177_0 ≤ 0 ∧ − x_16_post + x_16_post ≤ 0 ∧ x_16_post − x_16_post ≤ 0 ∧ − x_16_1 + x_16_1 ≤ 0 ∧ x_16_1 − x_16_1 ≤ 0 ∧ − x_16_0 + x_16_0 ≤ 0 ∧ x_16_0 − x_16_0 ≤ 0 ∧ − x_14_post + x_14_post ≤ 0 ∧ x_14_post − x_14_post ≤ 0 ∧ − x_14_0 + x_14_0 ≤ 0 ∧ x_14_0 − x_14_0 ≤ 0 ∧ − temp0_45_post + temp0_45_post ≤ 0 ∧ temp0_45_post − temp0_45_post ≤ 0 ∧ − temp0_45_1 + temp0_45_1 ≤ 0 ∧ temp0_45_1 − temp0_45_1 ≤ 0 ∧ − temp0_45_0 + temp0_45_0 ≤ 0 ∧ temp0_45_0 − temp0_45_0 ≤ 0 ∧ − temp0_32_post + temp0_32_post ≤ 0 ∧ temp0_32_post − temp0_32_post ≤ 0 ∧ − temp0_32_4 + temp0_32_4 ≤ 0 ∧ temp0_32_4 − temp0_32_4 ≤ 0 ∧ − temp0_32_3 + temp0_32_3 ≤ 0 ∧ temp0_32_3 − temp0_32_3 ≤ 0 ∧ − temp0_32_2 + temp0_32_2 ≤ 0 ∧ temp0_32_2 − temp0_32_2 ≤ 0 ∧ − temp0_32_1 + temp0_32_1 ≤ 0 ∧ temp0_32_1 − temp0_32_1 ≤ 0 ∧ − temp0_32_0 + temp0_32_0 ≤ 0 ∧ temp0_32_0 − temp0_32_0 ≤ 0 ∧ − temp0_15_0 + temp0_15_0 ≤ 0 ∧ temp0_15_0 − temp0_15_0 ≤ 0 ∧ − t_23_post + t_23_post ≤ 0 ∧ t_23_post − t_23_post ≤ 0 ∧ − t_23_1 + t_23_1 ≤ 0 ∧ t_23_1 − t_23_1 ≤ 0 ∧ − t_23_0 + t_23_0 ≤ 0 ∧ t_23_0 − t_23_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_post + result_dot_printf_sdv_special_RETURN_VALUE_41_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_post − result_dot_printf_sdv_special_RETURN_VALUE_41_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_1 + result_dot_printf_sdv_special_RETURN_VALUE_41_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_1 − result_dot_printf_sdv_special_RETURN_VALUE_41_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_0 + result_dot_printf_sdv_special_RETURN_VALUE_41_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_0 − result_dot_printf_sdv_special_RETURN_VALUE_41_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_post + result_dot_printf_sdv_special_RETURN_VALUE_38_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_post − result_dot_printf_sdv_special_RETURN_VALUE_38_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_1 + result_dot_printf_sdv_special_RETURN_VALUE_38_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_1 − result_dot_printf_sdv_special_RETURN_VALUE_38_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_0 + result_dot_printf_sdv_special_RETURN_VALUE_38_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_0 − result_dot_printf_sdv_special_RETURN_VALUE_38_0 ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_post + result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_post − result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_1 + result_dot_nondet_sdv_special_RETURN_VALUE_13_1 ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_1 − result_dot_nondet_sdv_special_RETURN_VALUE_13_1 ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_0 + result_dot_nondet_sdv_special_RETURN_VALUE_13_0 ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_0 − result_dot_nondet_sdv_special_RETURN_VALUE_13_0 ≤ 0 ∧ − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post + result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post ≤ 0 ∧ result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post ≤ 0 ∧ − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 + result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 ≤ 0 ∧ result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 ≤ 0 ∧ − result_11_post + result_11_post ≤ 0 ∧ result_11_post − result_11_post ≤ 0 ∧ − result_11_6 + result_11_6 ≤ 0 ∧ result_11_6 − result_11_6 ≤ 0 ∧ − result_11_5 + result_11_5 ≤ 0 ∧ result_11_5 − result_11_5 ≤ 0 ∧ − result_11_4 + result_11_4 ≤ 0 ∧ result_11_4 − result_11_4 ≤ 0 ∧ − result_11_3 + result_11_3 ≤ 0 ∧ result_11_3 − result_11_3 ≤ 0 ∧ − result_11_2 + result_11_2 ≤ 0 ∧ result_11_2 − result_11_2 ≤ 0 ∧ − result_11_1 + result_11_1 ≤ 0 ∧ result_11_1 − result_11_1 ≤ 0 ∧ − result_11_0 + result_11_0 ≤ 0 ∧ result_11_0 − result_11_0 ≤ 0 ∧ − rcd_72_post + rcd_72_post ≤ 0 ∧ rcd_72_post − rcd_72_post ≤ 0 ∧ − rcd_72_0 + rcd_72_0 ≤ 0 ∧ rcd_72_0 − rcd_72_0 ≤ 0 ∧ − r_53_post + r_53_post ≤ 0 ∧ r_53_post − r_53_post ≤ 0 ∧ − r_53_0 + r_53_0 ≤ 0 ∧ r_53_0 − r_53_0 ≤ 0 ∧ − r_161_post + r_161_post ≤ 0 ∧ r_161_post − r_161_post ≤ 0 ∧ − r_161_0 + r_161_0 ≤ 0 ∧ r_161_0 − r_161_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 ≤ 0 ∧ − nondet_12_post + nondet_12_post ≤ 0 ∧ nondet_12_post − nondet_12_post ≤ 0 ∧ − nondet_12_1 + nondet_12_1 ≤ 0 ∧ nondet_12_1 − nondet_12_1 ≤ 0 ∧ − nondet_12_0 + nondet_12_0 ≤ 0 ∧ nondet_12_0 − nondet_12_0 ≤ 0 ∧ − lt_37_post + lt_37_post ≤ 0 ∧ lt_37_post − lt_37_post ≤ 0 ∧ − lt_37_1 + lt_37_1 ≤ 0 ∧ lt_37_1 − lt_37_1 ≤ 0 ∧ − lt_37_0 + lt_37_0 ≤ 0 ∧ lt_37_0 − lt_37_0 ≤ 0 ∧ − lt_36_post + lt_36_post ≤ 0 ∧ lt_36_post − lt_36_post ≤ 0 ∧ − lt_36_0 + lt_36_0 ≤ 0 ∧ lt_36_0 − lt_36_0 ≤ 0 ∧ − lt_237_post + lt_237_post ≤ 0 ∧ lt_237_post − lt_237_post ≤ 0 ∧ − lt_237_0 + lt_237_0 ≤ 0 ∧ lt_237_0 − lt_237_0 ≤ 0 ∧ − length_43_post + length_43_post ≤ 0 ∧ length_43_post − length_43_post ≤ 0 ∧ − length_43_0 + length_43_0 ≤ 0 ∧ length_43_0 − length_43_0 ≤ 0 ∧ − len_246_post + len_246_post ≤ 0 ∧ len_246_post − len_246_post ≤ 0 ∧ − len_246_0 + len_246_0 ≤ 0 ∧ len_246_0 − len_246_0 ≤ 0 ∧ − len_180_post + len_180_post ≤ 0 ∧ len_180_post − len_180_post ≤ 0 ∧ − len_180_0 + len_180_0 ≤ 0 ∧ len_180_0 − len_180_0 ≤ 0 ∧ − i_125_post + i_125_post ≤ 0 ∧ i_125_post − i_125_post ≤ 0 ∧ − i_125_0 + i_125_0 ≤ 0 ∧ i_125_0 − i_125_0 ≤ 0 ∧ − fmt_31_post + fmt_31_post ≤ 0 ∧ fmt_31_post − fmt_31_post ≤ 0 ∧ − fmt_31_4 + fmt_31_4 ≤ 0 ∧ fmt_31_4 − fmt_31_4 ≤ 0 ∧ − fmt_31_3 + fmt_31_3 ≤ 0 ∧ fmt_31_3 − fmt_31_3 ≤ 0 ∧ − fmt_31_2 + fmt_31_2 ≤ 0 ∧ fmt_31_2 − fmt_31_2 ≤ 0 ∧ − fmt_31_1 + fmt_31_1 ≤ 0 ∧ fmt_31_1 − fmt_31_1 ≤ 0 ∧ − fmt_31_0 + fmt_31_0 ≤ 0 ∧ fmt_31_0 − fmt_31_0 ≤ 0 ∧ − ct_17_post + ct_17_post ≤ 0 ∧ ct_17_post − ct_17_post ≤ 0 ∧ − ct_17_2 + ct_17_2 ≤ 0 ∧ ct_17_2 − ct_17_2 ≤ 0 ∧ − ct_17_1 + ct_17_1 ≤ 0 ∧ ct_17_1 − ct_17_1 ≤ 0 ∧ − ct_17_0 + ct_17_0 ≤ 0 ∧ ct_17_0 − ct_17_0 ≤ 0 ∧ − a_328_post + a_328_post ≤ 0 ∧ a_328_post − a_328_post ≤ 0 ∧ − a_328_0 + a_328_0 ≤ 0 ∧ a_328_0 − a_328_0 ≤ 0 ∧ − a_305_post + a_305_post ≤ 0 ∧ a_305_post − a_305_post ≤ 0 ∧ − a_305_0 + a_305_0 ≤ 0 ∧ a_305_0 − a_305_0 ≤ 0 ∧ − a_283_post + a_283_post ≤ 0 ∧ a_283_post − a_283_post ≤ 0 ∧ − a_283_0 + a_283_0 ≤ 0 ∧ a_283_0 − a_283_0 ≤ 0 ∧ − a_26_post + a_26_post ≤ 0 ∧ a_26_post − a_26_post ≤ 0 ∧ − a_26_1 + a_26_1 ≤ 0 ∧ a_26_1 − a_26_1 ≤ 0 ∧ − a_26_0 + a_26_0 ≤ 0 ∧ a_26_0 − a_26_0 ≤ 0 ∧ − a_247_post + a_247_post ≤ 0 ∧ a_247_post − a_247_post ≤ 0 ∧ − a_247_0 + a_247_0 ≤ 0 ∧ a_247_0 − a_247_0 ≤ 0 ∧ − a_197_post + a_197_post ≤ 0 ∧ a_197_post − a_197_post ≤ 0 ∧ − a_197_0 + a_197_0 ≤ 0 ∧ a_197_0 − a_197_0 ≤ 0 ∧ − a_146_0 + a_146_0 ≤ 0 ∧ a_146_0 − a_146_0 ≤ 0 | |
| 39 | 56 | 33: | − y_19_post + y_19_post ≤ 0 ∧ y_19_post − y_19_post ≤ 0 ∧ − y_19_2 + y_19_2 ≤ 0 ∧ y_19_2 − y_19_2 ≤ 0 ∧ − y_19_1 + y_19_1 ≤ 0 ∧ y_19_1 − y_19_1 ≤ 0 ∧ − y_19_0 + y_19_0 ≤ 0 ∧ y_19_0 − y_19_0 ≤ 0 ∧ − x_SLAM_f_18_post + x_SLAM_f_18_post ≤ 0 ∧ x_SLAM_f_18_post − x_SLAM_f_18_post ≤ 0 ∧ − x_SLAM_f_18_2 + x_SLAM_f_18_2 ≤ 0 ∧ x_SLAM_f_18_2 − x_SLAM_f_18_2 ≤ 0 ∧ − x_SLAM_f_18_1 + x_SLAM_f_18_1 ≤ 0 ∧ x_SLAM_f_18_1 − x_SLAM_f_18_1 ≤ 0 ∧ − x_SLAM_f_18_0 + x_SLAM_f_18_0 ≤ 0 ∧ x_SLAM_f_18_0 − x_SLAM_f_18_0 ≤ 0 ∧ − x_34_post + x_34_post ≤ 0 ∧ x_34_post − x_34_post ≤ 0 ∧ − x_34_1 + x_34_1 ≤ 0 ∧ x_34_1 − x_34_1 ≤ 0 ∧ − x_34_0 + x_34_0 ≤ 0 ∧ x_34_0 − x_34_0 ≤ 0 ∧ − x_28_post + x_28_post ≤ 0 ∧ x_28_post − x_28_post ≤ 0 ∧ − x_28_1 + x_28_1 ≤ 0 ∧ x_28_1 − x_28_1 ≤ 0 ∧ − x_28_0 + x_28_0 ≤ 0 ∧ x_28_0 − x_28_0 ≤ 0 ∧ − x_238_post + x_238_post ≤ 0 ∧ x_238_post − x_238_post ≤ 0 ∧ − x_238_0 + x_238_0 ≤ 0 ∧ x_238_0 − x_238_0 ≤ 0 ∧ − x_20_post + x_20_post ≤ 0 ∧ x_20_post − x_20_post ≤ 0 ∧ − x_20_2 + x_20_2 ≤ 0 ∧ x_20_2 − x_20_2 ≤ 0 ∧ − x_20_1 + x_20_1 ≤ 0 ∧ x_20_1 − x_20_1 ≤ 0 ∧ − x_20_0 + x_20_0 ≤ 0 ∧ x_20_0 − x_20_0 ≤ 0 ∧ − x_177_post + x_177_post ≤ 0 ∧ x_177_post − x_177_post ≤ 0 ∧ − x_177_0 + x_177_0 ≤ 0 ∧ x_177_0 − x_177_0 ≤ 0 ∧ − x_16_post + x_16_post ≤ 0 ∧ x_16_post − x_16_post ≤ 0 ∧ − x_16_1 + x_16_1 ≤ 0 ∧ x_16_1 − x_16_1 ≤ 0 ∧ − x_16_0 + x_16_0 ≤ 0 ∧ x_16_0 − x_16_0 ≤ 0 ∧ − x_14_post + x_14_post ≤ 0 ∧ x_14_post − x_14_post ≤ 0 ∧ − x_14_0 + x_14_0 ≤ 0 ∧ x_14_0 − x_14_0 ≤ 0 ∧ − tmp_48_post + tmp_48_post ≤ 0 ∧ tmp_48_post − tmp_48_post ≤ 0 ∧ − tmp_48_0 + tmp_48_0 ≤ 0 ∧ tmp_48_0 − tmp_48_0 ≤ 0 ∧ − temp_49_post + temp_49_post ≤ 0 ∧ temp_49_post − temp_49_post ≤ 0 ∧ − temp_49_0 + temp_49_0 ≤ 0 ∧ temp_49_0 − temp_49_0 ≤ 0 ∧ − temp0_45_post + temp0_45_post ≤ 0 ∧ temp0_45_post − temp0_45_post ≤ 0 ∧ − temp0_45_1 + temp0_45_1 ≤ 0 ∧ temp0_45_1 − temp0_45_1 ≤ 0 ∧ − temp0_45_0 + temp0_45_0 ≤ 0 ∧ temp0_45_0 − temp0_45_0 ≤ 0 ∧ − temp0_32_post + temp0_32_post ≤ 0 ∧ temp0_32_post − temp0_32_post ≤ 0 ∧ − temp0_32_4 + temp0_32_4 ≤ 0 ∧ temp0_32_4 − temp0_32_4 ≤ 0 ∧ − temp0_32_3 + temp0_32_3 ≤ 0 ∧ temp0_32_3 − temp0_32_3 ≤ 0 ∧ − temp0_32_2 + temp0_32_2 ≤ 0 ∧ temp0_32_2 − temp0_32_2 ≤ 0 ∧ − temp0_32_1 + temp0_32_1 ≤ 0 ∧ temp0_32_1 − temp0_32_1 ≤ 0 ∧ − temp0_32_0 + temp0_32_0 ≤ 0 ∧ temp0_32_0 − temp0_32_0 ≤ 0 ∧ − temp0_15_0 + temp0_15_0 ≤ 0 ∧ temp0_15_0 − temp0_15_0 ≤ 0 ∧ − t_23_post + t_23_post ≤ 0 ∧ t_23_post − t_23_post ≤ 0 ∧ − t_23_1 + t_23_1 ≤ 0 ∧ t_23_1 − t_23_1 ≤ 0 ∧ − t_23_0 + t_23_0 ≤ 0 ∧ t_23_0 − t_23_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_post + result_dot_printf_sdv_special_RETURN_VALUE_41_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_post − result_dot_printf_sdv_special_RETURN_VALUE_41_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_1 + result_dot_printf_sdv_special_RETURN_VALUE_41_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_1 − result_dot_printf_sdv_special_RETURN_VALUE_41_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_0 + result_dot_printf_sdv_special_RETURN_VALUE_41_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_0 − result_dot_printf_sdv_special_RETURN_VALUE_41_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_post + result_dot_printf_sdv_special_RETURN_VALUE_38_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_post − result_dot_printf_sdv_special_RETURN_VALUE_38_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_1 + result_dot_printf_sdv_special_RETURN_VALUE_38_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_1 − result_dot_printf_sdv_special_RETURN_VALUE_38_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_0 + result_dot_printf_sdv_special_RETURN_VALUE_38_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_0 − result_dot_printf_sdv_special_RETURN_VALUE_38_0 ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_post + result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_post − result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_1 + result_dot_nondet_sdv_special_RETURN_VALUE_13_1 ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_1 − result_dot_nondet_sdv_special_RETURN_VALUE_13_1 ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_0 + result_dot_nondet_sdv_special_RETURN_VALUE_13_0 ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_0 − result_dot_nondet_sdv_special_RETURN_VALUE_13_0 ≤ 0 ∧ − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post + result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post ≤ 0 ∧ result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post ≤ 0 ∧ − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 + result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 ≤ 0 ∧ result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 ≤ 0 ∧ − result_11_post + result_11_post ≤ 0 ∧ result_11_post − result_11_post ≤ 0 ∧ − result_11_6 + result_11_6 ≤ 0 ∧ result_11_6 − result_11_6 ≤ 0 ∧ − result_11_5 + result_11_5 ≤ 0 ∧ result_11_5 − result_11_5 ≤ 0 ∧ − result_11_4 + result_11_4 ≤ 0 ∧ result_11_4 − result_11_4 ≤ 0 ∧ − result_11_3 + result_11_3 ≤ 0 ∧ result_11_3 − result_11_3 ≤ 0 ∧ − result_11_2 + result_11_2 ≤ 0 ∧ result_11_2 − result_11_2 ≤ 0 ∧ − result_11_1 + result_11_1 ≤ 0 ∧ result_11_1 − result_11_1 ≤ 0 ∧ − result_11_0 + result_11_0 ≤ 0 ∧ result_11_0 − result_11_0 ≤ 0 ∧ − rcd_72_post + rcd_72_post ≤ 0 ∧ rcd_72_post − rcd_72_post ≤ 0 ∧ − rcd_72_0 + rcd_72_0 ≤ 0 ∧ rcd_72_0 − rcd_72_0 ≤ 0 ∧ − rcd_102_post + rcd_102_post ≤ 0 ∧ rcd_102_post − rcd_102_post ≤ 0 ∧ − rcd_102_0 + rcd_102_0 ≤ 0 ∧ rcd_102_0 − rcd_102_0 ≤ 0 ∧ − r_53_post + r_53_post ≤ 0 ∧ r_53_post − r_53_post ≤ 0 ∧ − r_53_0 + r_53_0 ≤ 0 ∧ r_53_0 − r_53_0 ≤ 0 ∧ − r_161_post + r_161_post ≤ 0 ∧ r_161_post − r_161_post ≤ 0 ∧ − r_161_0 + r_161_0 ≤ 0 ∧ r_161_0 − r_161_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 ≤ 0 ∧ − nondet_12_post + nondet_12_post ≤ 0 ∧ nondet_12_post − nondet_12_post ≤ 0 ∧ − nondet_12_1 + nondet_12_1 ≤ 0 ∧ nondet_12_1 − nondet_12_1 ≤ 0 ∧ − nondet_12_0 + nondet_12_0 ≤ 0 ∧ nondet_12_0 − nondet_12_0 ≤ 0 ∧ − lt_37_post + lt_37_post ≤ 0 ∧ lt_37_post − lt_37_post ≤ 0 ∧ − lt_37_1 + lt_37_1 ≤ 0 ∧ lt_37_1 − lt_37_1 ≤ 0 ∧ − lt_37_0 + lt_37_0 ≤ 0 ∧ lt_37_0 − lt_37_0 ≤ 0 ∧ − lt_36_post + lt_36_post ≤ 0 ∧ lt_36_post − lt_36_post ≤ 0 ∧ − lt_36_0 + lt_36_0 ≤ 0 ∧ lt_36_0 − lt_36_0 ≤ 0 ∧ − lt_237_post + lt_237_post ≤ 0 ∧ lt_237_post − lt_237_post ≤ 0 ∧ − lt_237_0 + lt_237_0 ≤ 0 ∧ lt_237_0 − lt_237_0 ≤ 0 ∧ − length_43_post + length_43_post ≤ 0 ∧ length_43_post − length_43_post ≤ 0 ∧ − length_43_0 + length_43_0 ≤ 0 ∧ length_43_0 − length_43_0 ≤ 0 ∧ − len_246_post + len_246_post ≤ 0 ∧ len_246_post − len_246_post ≤ 0 ∧ − len_246_0 + len_246_0 ≤ 0 ∧ len_246_0 − len_246_0 ≤ 0 ∧ − len_180_post + len_180_post ≤ 0 ∧ len_180_post − len_180_post ≤ 0 ∧ − len_180_0 + len_180_0 ≤ 0 ∧ len_180_0 − len_180_0 ≤ 0 ∧ − i_44_post + i_44_post ≤ 0 ∧ i_44_post − i_44_post ≤ 0 ∧ − i_44_0 + i_44_0 ≤ 0 ∧ i_44_0 − i_44_0 ≤ 0 ∧ − i_125_post + i_125_post ≤ 0 ∧ i_125_post − i_125_post ≤ 0 ∧ − i_125_0 + i_125_0 ≤ 0 ∧ i_125_0 − i_125_0 ≤ 0 ∧ − i_108_post + i_108_post ≤ 0 ∧ i_108_post − i_108_post ≤ 0 ∧ − i_108_0 + i_108_0 ≤ 0 ∧ i_108_0 − i_108_0 ≤ 0 ∧ − head_46_post + head_46_post ≤ 0 ∧ head_46_post − head_46_post ≤ 0 ∧ − head_46_0 + head_46_0 ≤ 0 ∧ head_46_0 − head_46_0 ≤ 0 ∧ − fmt_31_post + fmt_31_post ≤ 0 ∧ fmt_31_post − fmt_31_post ≤ 0 ∧ − fmt_31_4 + fmt_31_4 ≤ 0 ∧ fmt_31_4 − fmt_31_4 ≤ 0 ∧ − fmt_31_3 + fmt_31_3 ≤ 0 ∧ fmt_31_3 − fmt_31_3 ≤ 0 ∧ − fmt_31_2 + fmt_31_2 ≤ 0 ∧ fmt_31_2 − fmt_31_2 ≤ 0 ∧ − fmt_31_1 + fmt_31_1 ≤ 0 ∧ fmt_31_1 − fmt_31_1 ≤ 0 ∧ − fmt_31_0 + fmt_31_0 ≤ 0 ∧ fmt_31_0 − fmt_31_0 ≤ 0 ∧ − ct_17_post + ct_17_post ≤ 0 ∧ ct_17_post − ct_17_post ≤ 0 ∧ − ct_17_2 + ct_17_2 ≤ 0 ∧ ct_17_2 − ct_17_2 ≤ 0 ∧ − ct_17_1 + ct_17_1 ≤ 0 ∧ ct_17_1 − ct_17_1 ≤ 0 ∧ − ct_17_0 + ct_17_0 ≤ 0 ∧ ct_17_0 − ct_17_0 ≤ 0 ∧ − a_328_post + a_328_post ≤ 0 ∧ a_328_post − a_328_post ≤ 0 ∧ − a_328_0 + a_328_0 ≤ 0 ∧ a_328_0 − a_328_0 ≤ 0 ∧ − a_305_post + a_305_post ≤ 0 ∧ a_305_post − a_305_post ≤ 0 ∧ − a_305_0 + a_305_0 ≤ 0 ∧ a_305_0 − a_305_0 ≤ 0 ∧ − a_283_post + a_283_post ≤ 0 ∧ a_283_post − a_283_post ≤ 0 ∧ − a_283_0 + a_283_0 ≤ 0 ∧ a_283_0 − a_283_0 ≤ 0 ∧ − a_26_post + a_26_post ≤ 0 ∧ a_26_post − a_26_post ≤ 0 ∧ − a_26_1 + a_26_1 ≤ 0 ∧ a_26_1 − a_26_1 ≤ 0 ∧ − a_26_0 + a_26_0 ≤ 0 ∧ a_26_0 − a_26_0 ≤ 0 ∧ − a_247_post + a_247_post ≤ 0 ∧ a_247_post − a_247_post ≤ 0 ∧ − a_247_0 + a_247_0 ≤ 0 ∧ a_247_0 − a_247_0 ≤ 0 ∧ − a_197_post + a_197_post ≤ 0 ∧ a_197_post − a_197_post ≤ 0 ∧ − a_197_0 + a_197_0 ≤ 0 ∧ a_197_0 − a_197_0 ≤ 0 ∧ − a_146_0 + a_146_0 ≤ 0 ∧ a_146_0 − a_146_0 ≤ 0 | |
| 19 | 57 | 3: | 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ − i_44_0 + length_43_0 ≤ 0 ∧ − head_46_0 + temp0_45_1 ≤ 0 ∧ head_46_0 − temp0_45_1 ≤ 0 ∧ result_11_1 − temp0_45_1 ≤ 0 ∧ − result_11_1 + temp0_45_1 ≤ 0 ∧ − result_11_1 + x_14_post ≤ 0 ∧ result_11_1 − x_14_post ≤ 0 ∧ a_26_1 − x_14_post ≤ 0 ∧ − a_26_1 + x_14_post ≤ 0 ∧ − a_26_1 + x_28_1 ≤ 0 ∧ a_26_1 − x_28_1 ≤ 0 ∧ fmt_31_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 ≤ 0 ∧ − fmt_31_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 ≤ 0 ∧ temp0_32_1 ≤ 0 ∧ − temp0_32_1 ≤ 0 ∧ result_11_3 − temp0_32_1 ≤ 0 ∧ − result_11_3 + temp0_32_1 ≤ 0 ∧ − result_11_3 + result_dot_printf_sdv_special_RETURN_VALUE_41_1 ≤ 0 ∧ result_11_3 − result_dot_printf_sdv_special_RETURN_VALUE_41_1 ≤ 0 ∧ − x_28_1 ≤ 0 ∧ x_28_1 ≤ 0 ∧ fmt_31_3 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 ≤ 0 ∧ − fmt_31_3 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 ≤ 0 ∧ temp0_32_3 ≤ 0 ∧ − temp0_32_3 ≤ 0 ∧ result_11_5 − temp0_32_3 ≤ 0 ∧ − result_11_5 + temp0_32_3 ≤ 0 ∧ − result_11_5 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 ≤ 0 ∧ result_11_5 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 ≤ 0 ∧ − x_14_post + x_16_1 ≤ 0 ∧ x_14_post − x_16_1 ≤ 0 ∧ ct_17_1 ≤ 0 ∧ − ct_17_1 ≤ 0 ∧ − x_16_1 + x_SLAM_f_18_1 ≤ 0 ∧ x_16_1 − x_SLAM_f_18_1 ≤ 0 ∧ − ct_17_1 + y_19_1 ≤ 0 ∧ ct_17_1 − y_19_1 ≤ 0 ∧ x_20_1 − x_SLAM_f_18_1 ≤ 0 ∧ − x_20_1 + x_SLAM_f_18_1 ≤ 0 ∧ − x_14_post ≤ 0 ∧ x_14_post ≤ 0 ∧ − x_16_1 ≤ 0 ∧ x_16_1 ≤ 0 ∧ − ct_17_1 ≤ 0 ∧ ct_17_1 ≤ 0 ∧ − x_SLAM_f_18_1 ≤ 0 ∧ x_SLAM_f_18_1 ≤ 0 ∧ − y_19_1 ≤ 0 ∧ y_19_1 ≤ 0 ∧ − x_20_1 ≤ 0 ∧ x_20_1 ≤ 0 ∧ x_14_post − x_16_1 ≤ 0 ∧ − x_14_post + x_16_1 ≤ 0 ∧ x_16_1 − x_SLAM_f_18_1 ≤ 0 ∧ − x_16_1 + x_SLAM_f_18_1 ≤ 0 ∧ ct_17_1 − y_19_1 ≤ 0 ∧ − ct_17_1 + y_19_1 ≤ 0 ∧ − x_20_1 + x_SLAM_f_18_1 ≤ 0 ∧ x_20_1 − x_SLAM_f_18_1 ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_1 ≤ 0 ∧ − x_20_1 + y_19_1 ≤ 0 ∧ x_20_1 − y_19_1 ≤ 0 ∧ result_11_post − temp0_15_0 ≤ 0 ∧ − result_11_post + temp0_15_0 ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ a_26_0 − a_26_post ≤ 0 ∧ − a_26_0 + a_26_post ≤ 0 ∧ ct_17_0 − ct_17_post ≤ 0 ∧ − ct_17_0 + ct_17_post ≤ 0 ∧ fmt_31_0 − fmt_31_post ≤ 0 ∧ − fmt_31_0 + fmt_31_post ≤ 0 ∧ head_46_0 − head_46_post ≤ 0 ∧ − head_46_0 + head_46_post ≤ 0 ∧ i_44_0 − i_44_post ≤ 0 ∧ − i_44_0 + i_44_post ≤ 0 ∧ length_43_0 − length_43_post ≤ 0 ∧ − length_43_0 + length_43_post ≤ 0 ∧ lt_36_0 − lt_36_post ≤ 0 ∧ − lt_36_0 + lt_36_post ≤ 0 ∧ lt_37_0 − lt_37_post ≤ 0 ∧ − lt_37_0 + lt_37_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post ≤ 0 ∧ result_11_0 − result_11_post ≤ 0 ∧ − result_11_0 + result_11_post ≤ 0 ∧ result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post ≤ 0 ∧ − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 + result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_0 − result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_0 + result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_0 − result_dot_printf_sdv_special_RETURN_VALUE_38_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_0 + result_dot_printf_sdv_special_RETURN_VALUE_38_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_0 − result_dot_printf_sdv_special_RETURN_VALUE_41_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_0 + result_dot_printf_sdv_special_RETURN_VALUE_41_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post ≤ 0 ∧ t_23_0 − t_23_post ≤ 0 ∧ − t_23_0 + t_23_post ≤ 0 ∧ temp0_32_0 − temp0_32_post ≤ 0 ∧ − temp0_32_0 + temp0_32_post ≤ 0 ∧ temp0_45_0 − temp0_45_post ≤ 0 ∧ − temp0_45_0 + temp0_45_post ≤ 0 ∧ temp_49_0 − temp_49_post ≤ 0 ∧ − temp_49_0 + temp_49_post ≤ 0 ∧ tmp_48_0 − tmp_48_post ≤ 0 ∧ − tmp_48_0 + tmp_48_post ≤ 0 ∧ x_14_0 − x_14_post ≤ 0 ∧ − x_14_0 + x_14_post ≤ 0 ∧ x_16_0 − x_16_post ≤ 0 ∧ − x_16_0 + x_16_post ≤ 0 ∧ x_20_0 − x_20_post ≤ 0 ∧ − x_20_0 + x_20_post ≤ 0 ∧ x_28_0 − x_28_post ≤ 0 ∧ − x_28_0 + x_28_post ≤ 0 ∧ x_34_0 − x_34_post ≤ 0 ∧ − x_34_0 + x_34_post ≤ 0 ∧ x_SLAM_f_18_0 − x_SLAM_f_18_post ≤ 0 ∧ − x_SLAM_f_18_0 + x_SLAM_f_18_post ≤ 0 ∧ y_19_0 − y_19_post ≤ 0 ∧ − y_19_0 + y_19_post ≤ 0 ∧ − x_34_1 + x_34_1 ≤ 0 ∧ x_34_1 − x_34_1 ≤ 0 ∧ − x_238_post + x_238_post ≤ 0 ∧ x_238_post − x_238_post ≤ 0 ∧ − x_238_0 + x_238_0 ≤ 0 ∧ x_238_0 − x_238_0 ≤ 0 ∧ − x_177_post + x_177_post ≤ 0 ∧ x_177_post − x_177_post ≤ 0 ∧ − x_177_0 + x_177_0 ≤ 0 ∧ x_177_0 − x_177_0 ≤ 0 ∧ − temp0_15_0 + temp0_15_0 ≤ 0 ∧ temp0_15_0 − temp0_15_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_1 + result_dot_printf_sdv_special_RETURN_VALUE_38_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_1 − result_dot_printf_sdv_special_RETURN_VALUE_38_1 ≤ 0 ∧ − rcd_72_post + rcd_72_post ≤ 0 ∧ rcd_72_post − rcd_72_post ≤ 0 ∧ − rcd_72_0 + rcd_72_0 ≤ 0 ∧ rcd_72_0 − rcd_72_0 ≤ 0 ∧ − rcd_102_post + rcd_102_post ≤ 0 ∧ rcd_102_post − rcd_102_post ≤ 0 ∧ − rcd_102_0 + rcd_102_0 ≤ 0 ∧ rcd_102_0 − rcd_102_0 ≤ 0 ∧ − r_53_post + r_53_post ≤ 0 ∧ r_53_post − r_53_post ≤ 0 ∧ − r_53_0 + r_53_0 ≤ 0 ∧ r_53_0 − r_53_0 ≤ 0 ∧ − r_161_post + r_161_post ≤ 0 ∧ r_161_post − r_161_post ≤ 0 ∧ − r_161_0 + r_161_0 ≤ 0 ∧ r_161_0 − r_161_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 ≤ 0 ∧ − nondet_12_post + nondet_12_post ≤ 0 ∧ nondet_12_post − nondet_12_post ≤ 0 ∧ − nondet_12_1 + nondet_12_1 ≤ 0 ∧ nondet_12_1 − nondet_12_1 ≤ 0 ∧ − nondet_12_0 + nondet_12_0 ≤ 0 ∧ nondet_12_0 − nondet_12_0 ≤ 0 ∧ − lt_37_1 + lt_37_1 ≤ 0 ∧ lt_37_1 − lt_37_1 ≤ 0 ∧ − lt_237_post + lt_237_post ≤ 0 ∧ lt_237_post − lt_237_post ≤ 0 ∧ − lt_237_0 + lt_237_0 ≤ 0 ∧ lt_237_0 − lt_237_0 ≤ 0 ∧ − len_246_post + len_246_post ≤ 0 ∧ len_246_post − len_246_post ≤ 0 ∧ − len_246_0 + len_246_0 ≤ 0 ∧ len_246_0 − len_246_0 ≤ 0 ∧ − len_180_post + len_180_post ≤ 0 ∧ len_180_post − len_180_post ≤ 0 ∧ − len_180_0 + len_180_0 ≤ 0 ∧ len_180_0 − len_180_0 ≤ 0 ∧ − i_125_post + i_125_post ≤ 0 ∧ i_125_post − i_125_post ≤ 0 ∧ − i_125_0 + i_125_0 ≤ 0 ∧ i_125_0 − i_125_0 ≤ 0 ∧ − i_108_post + i_108_post ≤ 0 ∧ i_108_post − i_108_post ≤ 0 ∧ − i_108_0 + i_108_0 ≤ 0 ∧ i_108_0 − i_108_0 ≤ 0 ∧ − a_328_post + a_328_post ≤ 0 ∧ a_328_post − a_328_post ≤ 0 ∧ − a_328_0 + a_328_0 ≤ 0 ∧ a_328_0 − a_328_0 ≤ 0 ∧ − a_305_post + a_305_post ≤ 0 ∧ a_305_post − a_305_post ≤ 0 ∧ − a_305_0 + a_305_0 ≤ 0 ∧ a_305_0 − a_305_0 ≤ 0 ∧ − a_283_post + a_283_post ≤ 0 ∧ a_283_post − a_283_post ≤ 0 ∧ − a_283_0 + a_283_0 ≤ 0 ∧ a_283_0 − a_283_0 ≤ 0 ∧ − a_247_post + a_247_post ≤ 0 ∧ a_247_post − a_247_post ≤ 0 ∧ − a_247_0 + a_247_0 ≤ 0 ∧ a_247_0 − a_247_0 ≤ 0 ∧ − a_197_post + a_197_post ≤ 0 ∧ a_197_post − a_197_post ≤ 0 ∧ − a_197_0 + a_197_0 ≤ 0 ∧ a_197_0 − a_197_0 ≤ 0 ∧ − a_146_0 + a_146_0 ≤ 0 ∧ a_146_0 − a_146_0 ≤ 0 | |
| 19 | 58 | 20: | 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 1 + i_44_0 − length_43_0 ≤ 0 ∧ − temp_49_0 + tmp_48_post ≤ 0 ∧ temp_49_0 − tmp_48_post ≤ 0 ∧ head_46_post − tmp_48_post ≤ 0 ∧ − head_46_post + tmp_48_post ≤ 0 ∧ −1 − i_44_0 + i_44_post ≤ 0 ∧ 1 + i_44_0 − i_44_post ≤ 0 ∧ 1 − i_44_post ≤ 0 ∧ −1 + i_44_post ≤ 0 ∧ − length_43_0 + result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ length_43_0 − result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ head_46_post − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post ≤ 0 ∧ − head_46_post + result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post ≤ 0 ∧ head_46_post − tmp_48_post ≤ 0 ∧ − head_46_post + tmp_48_post ≤ 0 ∧ result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post − tmp_48_post ≤ 0 ∧ − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post + tmp_48_post ≤ 0 ∧ 1 − length_43_0 ≤ 0 ∧ head_46_0 − head_46_post ≤ 0 ∧ − head_46_0 + head_46_post ≤ 0 ∧ i_44_0 − i_44_post ≤ 0 ∧ − i_44_0 + i_44_post ≤ 0 ∧ result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post ≤ 0 ∧ − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 + result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_0 − result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_0 + result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ temp_49_0 − temp_49_post ≤ 0 ∧ − temp_49_0 + temp_49_post ≤ 0 ∧ tmp_48_0 − tmp_48_post ≤ 0 ∧ − tmp_48_0 + tmp_48_post ≤ 0 ∧ − y_19_post + y_19_post ≤ 0 ∧ y_19_post − y_19_post ≤ 0 ∧ − y_19_2 + y_19_2 ≤ 0 ∧ y_19_2 − y_19_2 ≤ 0 ∧ − y_19_1 + y_19_1 ≤ 0 ∧ y_19_1 − y_19_1 ≤ 0 ∧ − y_19_0 + y_19_0 ≤ 0 ∧ y_19_0 − y_19_0 ≤ 0 ∧ − x_SLAM_f_18_post + x_SLAM_f_18_post ≤ 0 ∧ x_SLAM_f_18_post − x_SLAM_f_18_post ≤ 0 ∧ − x_SLAM_f_18_2 + x_SLAM_f_18_2 ≤ 0 ∧ x_SLAM_f_18_2 − x_SLAM_f_18_2 ≤ 0 ∧ − x_SLAM_f_18_1 + x_SLAM_f_18_1 ≤ 0 ∧ x_SLAM_f_18_1 − x_SLAM_f_18_1 ≤ 0 ∧ − x_SLAM_f_18_0 + x_SLAM_f_18_0 ≤ 0 ∧ x_SLAM_f_18_0 − x_SLAM_f_18_0 ≤ 0 ∧ − x_34_post + x_34_post ≤ 0 ∧ x_34_post − x_34_post ≤ 0 ∧ − x_34_1 + x_34_1 ≤ 0 ∧ x_34_1 − x_34_1 ≤ 0 ∧ − x_34_0 + x_34_0 ≤ 0 ∧ x_34_0 − x_34_0 ≤ 0 ∧ − x_28_post + x_28_post ≤ 0 ∧ x_28_post − x_28_post ≤ 0 ∧ − x_28_1 + x_28_1 ≤ 0 ∧ x_28_1 − x_28_1 ≤ 0 ∧ − x_28_0 + x_28_0 ≤ 0 ∧ x_28_0 − x_28_0 ≤ 0 ∧ − x_238_post + x_238_post ≤ 0 ∧ x_238_post − x_238_post ≤ 0 ∧ − x_238_0 + x_238_0 ≤ 0 ∧ x_238_0 − x_238_0 ≤ 0 ∧ − x_20_post + x_20_post ≤ 0 ∧ x_20_post − x_20_post ≤ 0 ∧ − x_20_2 + x_20_2 ≤ 0 ∧ x_20_2 − x_20_2 ≤ 0 ∧ − x_20_1 + x_20_1 ≤ 0 ∧ x_20_1 − x_20_1 ≤ 0 ∧ − x_20_0 + x_20_0 ≤ 0 ∧ x_20_0 − x_20_0 ≤ 0 ∧ − x_177_post + x_177_post ≤ 0 ∧ x_177_post − x_177_post ≤ 0 ∧ − x_177_0 + x_177_0 ≤ 0 ∧ x_177_0 − x_177_0 ≤ 0 ∧ − x_16_post + x_16_post ≤ 0 ∧ x_16_post − x_16_post ≤ 0 ∧ − x_16_1 + x_16_1 ≤ 0 ∧ x_16_1 − x_16_1 ≤ 0 ∧ − x_16_0 + x_16_0 ≤ 0 ∧ x_16_0 − x_16_0 ≤ 0 ∧ − x_14_post + x_14_post ≤ 0 ∧ x_14_post − x_14_post ≤ 0 ∧ − x_14_0 + x_14_0 ≤ 0 ∧ x_14_0 − x_14_0 ≤ 0 ∧ − temp0_45_post + temp0_45_post ≤ 0 ∧ temp0_45_post − temp0_45_post ≤ 0 ∧ − temp0_45_1 + temp0_45_1 ≤ 0 ∧ temp0_45_1 − temp0_45_1 ≤ 0 ∧ − temp0_45_0 + temp0_45_0 ≤ 0 ∧ temp0_45_0 − temp0_45_0 ≤ 0 ∧ − temp0_32_post + temp0_32_post ≤ 0 ∧ temp0_32_post − temp0_32_post ≤ 0 ∧ − temp0_32_4 + temp0_32_4 ≤ 0 ∧ temp0_32_4 − temp0_32_4 ≤ 0 ∧ − temp0_32_3 + temp0_32_3 ≤ 0 ∧ temp0_32_3 − temp0_32_3 ≤ 0 ∧ − temp0_32_2 + temp0_32_2 ≤ 0 ∧ temp0_32_2 − temp0_32_2 ≤ 0 ∧ − temp0_32_1 + temp0_32_1 ≤ 0 ∧ temp0_32_1 − temp0_32_1 ≤ 0 ∧ − temp0_32_0 + temp0_32_0 ≤ 0 ∧ temp0_32_0 − temp0_32_0 ≤ 0 ∧ − temp0_15_0 + temp0_15_0 ≤ 0 ∧ temp0_15_0 − temp0_15_0 ≤ 0 ∧ − t_23_post + t_23_post ≤ 0 ∧ t_23_post − t_23_post ≤ 0 ∧ − t_23_1 + t_23_1 ≤ 0 ∧ t_23_1 − t_23_1 ≤ 0 ∧ − t_23_0 + t_23_0 ≤ 0 ∧ t_23_0 − t_23_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_post + result_dot_printf_sdv_special_RETURN_VALUE_41_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_post − result_dot_printf_sdv_special_RETURN_VALUE_41_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_1 + result_dot_printf_sdv_special_RETURN_VALUE_41_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_1 − result_dot_printf_sdv_special_RETURN_VALUE_41_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_0 + result_dot_printf_sdv_special_RETURN_VALUE_41_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_0 − result_dot_printf_sdv_special_RETURN_VALUE_41_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_post + result_dot_printf_sdv_special_RETURN_VALUE_38_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_post − result_dot_printf_sdv_special_RETURN_VALUE_38_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_1 + result_dot_printf_sdv_special_RETURN_VALUE_38_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_1 − result_dot_printf_sdv_special_RETURN_VALUE_38_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_0 + result_dot_printf_sdv_special_RETURN_VALUE_38_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_0 − result_dot_printf_sdv_special_RETURN_VALUE_38_0 ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_1 + result_dot_nondet_sdv_special_RETURN_VALUE_13_1 ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_1 − result_dot_nondet_sdv_special_RETURN_VALUE_13_1 ≤ 0 ∧ − result_11_post + result_11_post ≤ 0 ∧ result_11_post − result_11_post ≤ 0 ∧ − result_11_6 + result_11_6 ≤ 0 ∧ result_11_6 − result_11_6 ≤ 0 ∧ − result_11_5 + result_11_5 ≤ 0 ∧ result_11_5 − result_11_5 ≤ 0 ∧ − result_11_4 + result_11_4 ≤ 0 ∧ result_11_4 − result_11_4 ≤ 0 ∧ − result_11_3 + result_11_3 ≤ 0 ∧ result_11_3 − result_11_3 ≤ 0 ∧ − result_11_2 + result_11_2 ≤ 0 ∧ result_11_2 − result_11_2 ≤ 0 ∧ − result_11_1 + result_11_1 ≤ 0 ∧ result_11_1 − result_11_1 ≤ 0 ∧ − result_11_0 + result_11_0 ≤ 0 ∧ result_11_0 − result_11_0 ≤ 0 ∧ − rcd_72_post + rcd_72_post ≤ 0 ∧ rcd_72_post − rcd_72_post ≤ 0 ∧ − rcd_72_0 + rcd_72_0 ≤ 0 ∧ rcd_72_0 − rcd_72_0 ≤ 0 ∧ − rcd_102_post + rcd_102_post ≤ 0 ∧ rcd_102_post − rcd_102_post ≤ 0 ∧ − rcd_102_0 + rcd_102_0 ≤ 0 ∧ rcd_102_0 − rcd_102_0 ≤ 0 ∧ − r_53_post + r_53_post ≤ 0 ∧ r_53_post − r_53_post ≤ 0 ∧ − r_53_0 + r_53_0 ≤ 0 ∧ r_53_0 − r_53_0 ≤ 0 ∧ − r_161_post + r_161_post ≤ 0 ∧ r_161_post − r_161_post ≤ 0 ∧ − r_161_0 + r_161_0 ≤ 0 ∧ r_161_0 − r_161_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 ≤ 0 ∧ − nondet_12_post + nondet_12_post ≤ 0 ∧ nondet_12_post − nondet_12_post ≤ 0 ∧ − nondet_12_1 + nondet_12_1 ≤ 0 ∧ nondet_12_1 − nondet_12_1 ≤ 0 ∧ − nondet_12_0 + nondet_12_0 ≤ 0 ∧ nondet_12_0 − nondet_12_0 ≤ 0 ∧ − lt_37_post + lt_37_post ≤ 0 ∧ lt_37_post − lt_37_post ≤ 0 ∧ − lt_37_1 + lt_37_1 ≤ 0 ∧ lt_37_1 − lt_37_1 ≤ 0 ∧ − lt_37_0 + lt_37_0 ≤ 0 ∧ lt_37_0 − lt_37_0 ≤ 0 ∧ − lt_36_post + lt_36_post ≤ 0 ∧ lt_36_post − lt_36_post ≤ 0 ∧ − lt_36_0 + lt_36_0 ≤ 0 ∧ lt_36_0 − lt_36_0 ≤ 0 ∧ − lt_237_post + lt_237_post ≤ 0 ∧ lt_237_post − lt_237_post ≤ 0 ∧ − lt_237_0 + lt_237_0 ≤ 0 ∧ lt_237_0 − lt_237_0 ≤ 0 ∧ − length_43_post + length_43_post ≤ 0 ∧ length_43_post − length_43_post ≤ 0 ∧ − length_43_0 + length_43_0 ≤ 0 ∧ length_43_0 − length_43_0 ≤ 0 ∧ − len_246_post + len_246_post ≤ 0 ∧ len_246_post − len_246_post ≤ 0 ∧ − len_246_0 + len_246_0 ≤ 0 ∧ len_246_0 − len_246_0 ≤ 0 ∧ − len_180_post + len_180_post ≤ 0 ∧ len_180_post − len_180_post ≤ 0 ∧ − len_180_0 + len_180_0 ≤ 0 ∧ len_180_0 − len_180_0 ≤ 0 ∧ − i_125_post + i_125_post ≤ 0 ∧ i_125_post − i_125_post ≤ 0 ∧ − i_125_0 + i_125_0 ≤ 0 ∧ i_125_0 − i_125_0 ≤ 0 ∧ − i_108_post + i_108_post ≤ 0 ∧ i_108_post − i_108_post ≤ 0 ∧ − i_108_0 + i_108_0 ≤ 0 ∧ i_108_0 − i_108_0 ≤ 0 ∧ − fmt_31_post + fmt_31_post ≤ 0 ∧ fmt_31_post − fmt_31_post ≤ 0 ∧ − fmt_31_4 + fmt_31_4 ≤ 0 ∧ fmt_31_4 − fmt_31_4 ≤ 0 ∧ − fmt_31_3 + fmt_31_3 ≤ 0 ∧ fmt_31_3 − fmt_31_3 ≤ 0 ∧ − fmt_31_2 + fmt_31_2 ≤ 0 ∧ fmt_31_2 − fmt_31_2 ≤ 0 ∧ − fmt_31_1 + fmt_31_1 ≤ 0 ∧ fmt_31_1 − fmt_31_1 ≤ 0 ∧ − fmt_31_0 + fmt_31_0 ≤ 0 ∧ fmt_31_0 − fmt_31_0 ≤ 0 ∧ − ct_17_post + ct_17_post ≤ 0 ∧ ct_17_post − ct_17_post ≤ 0 ∧ − ct_17_2 + ct_17_2 ≤ 0 ∧ ct_17_2 − ct_17_2 ≤ 0 ∧ − ct_17_1 + ct_17_1 ≤ 0 ∧ ct_17_1 − ct_17_1 ≤ 0 ∧ − ct_17_0 + ct_17_0 ≤ 0 ∧ ct_17_0 − ct_17_0 ≤ 0 ∧ − a_328_post + a_328_post ≤ 0 ∧ a_328_post − a_328_post ≤ 0 ∧ − a_328_0 + a_328_0 ≤ 0 ∧ a_328_0 − a_328_0 ≤ 0 ∧ − a_305_post + a_305_post ≤ 0 ∧ a_305_post − a_305_post ≤ 0 ∧ − a_305_0 + a_305_0 ≤ 0 ∧ a_305_0 − a_305_0 ≤ 0 ∧ − a_283_post + a_283_post ≤ 0 ∧ a_283_post − a_283_post ≤ 0 ∧ − a_283_0 + a_283_0 ≤ 0 ∧ a_283_0 − a_283_0 ≤ 0 ∧ − a_26_post + a_26_post ≤ 0 ∧ a_26_post − a_26_post ≤ 0 ∧ − a_26_1 + a_26_1 ≤ 0 ∧ a_26_1 − a_26_1 ≤ 0 ∧ − a_26_0 + a_26_0 ≤ 0 ∧ a_26_0 − a_26_0 ≤ 0 ∧ − a_247_post + a_247_post ≤ 0 ∧ a_247_post − a_247_post ≤ 0 ∧ − a_247_0 + a_247_0 ≤ 0 ∧ a_247_0 − a_247_0 ≤ 0 ∧ − a_197_post + a_197_post ≤ 0 ∧ a_197_post − a_197_post ≤ 0 ∧ − a_197_0 + a_197_0 ≤ 0 ∧ a_197_0 − a_197_0 ≤ 0 ∧ − a_146_0 + a_146_0 ≤ 0 ∧ a_146_0 − a_146_0 ≤ 0 | |
| 40 | 59 | 41: | 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ − len_180_0 ≤ 0 ∧ − a_197_0 ≤ 0 ∧ − x_28_0 ≤ 0 ∧ x_28_0 ≤ 0 ∧ − len_180_0 ≤ 0 ∧ − a_197_0 ≤ 0 ∧ fmt_31_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 ≤ 0 ∧ − fmt_31_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 ≤ 0 ∧ temp0_32_1 ≤ 0 ∧ − temp0_32_1 ≤ 0 ∧ result_11_1 − temp0_32_1 ≤ 0 ∧ − result_11_1 + temp0_32_1 ≤ 0 ∧ − result_11_1 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 ≤ 0 ∧ result_11_1 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 ≤ 0 ∧ − x_14_0 + x_16_post ≤ 0 ∧ x_14_0 − x_16_post ≤ 0 ∧ ct_17_post ≤ 0 ∧ − ct_17_post ≤ 0 ∧ − x_16_post + x_SLAM_f_18_post ≤ 0 ∧ x_16_post − x_SLAM_f_18_post ≤ 0 ∧ − ct_17_post + y_19_post ≤ 0 ∧ ct_17_post − y_19_post ≤ 0 ∧ x_20_post − x_SLAM_f_18_post ≤ 0 ∧ − x_20_post + x_SLAM_f_18_post ≤ 0 ∧ − ct_17_post ≤ 0 ∧ ct_17_post ≤ 0 ∧ − y_19_post ≤ 0 ∧ y_19_post ≤ 0 ∧ x_14_0 − x_16_post ≤ 0 ∧ − x_14_0 + x_16_post ≤ 0 ∧ x_14_0 − x_SLAM_f_18_post ≤ 0 ∧ − x_14_0 + x_SLAM_f_18_post ≤ 0 ∧ x_14_0 − x_20_post ≤ 0 ∧ − x_14_0 + x_20_post ≤ 0 ∧ x_16_post − x_SLAM_f_18_post ≤ 0 ∧ − x_16_post + x_SLAM_f_18_post ≤ 0 ∧ ct_17_post − y_19_post ≤ 0 ∧ − ct_17_post + y_19_post ≤ 0 ∧ − x_20_post + x_SLAM_f_18_post ≤ 0 ∧ x_20_post − x_SLAM_f_18_post ≤ 0 ∧ a_26_0 − a_26_post ≤ 0 ∧ − a_26_0 + a_26_post ≤ 0 ∧ ct_17_0 − ct_17_post ≤ 0 ∧ − ct_17_0 + ct_17_post ≤ 0 ∧ fmt_31_0 − fmt_31_post ≤ 0 ∧ − fmt_31_0 + fmt_31_post ≤ 0 ∧ lt_36_0 − lt_36_post ≤ 0 ∧ − lt_36_0 + lt_36_post ≤ 0 ∧ lt_37_0 − lt_37_post ≤ 0 ∧ − lt_37_0 + lt_37_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post ≤ 0 ∧ result_11_0 − result_11_post ≤ 0 ∧ − result_11_0 + result_11_post ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_0 − result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_0 + result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_0 − result_dot_printf_sdv_special_RETURN_VALUE_38_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_0 + result_dot_printf_sdv_special_RETURN_VALUE_38_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_0 − result_dot_printf_sdv_special_RETURN_VALUE_41_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_0 + result_dot_printf_sdv_special_RETURN_VALUE_41_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post ≤ 0 ∧ temp0_32_0 − temp0_32_post ≤ 0 ∧ − temp0_32_0 + temp0_32_post ≤ 0 ∧ x_16_0 − x_16_post ≤ 0 ∧ − x_16_0 + x_16_post ≤ 0 ∧ x_20_0 − x_20_post ≤ 0 ∧ − x_20_0 + x_20_post ≤ 0 ∧ x_28_0 − x_28_post ≤ 0 ∧ − x_28_0 + x_28_post ≤ 0 ∧ x_34_0 − x_34_post ≤ 0 ∧ − x_34_0 + x_34_post ≤ 0 ∧ x_SLAM_f_18_0 − x_SLAM_f_18_post ≤ 0 ∧ − x_SLAM_f_18_0 + x_SLAM_f_18_post ≤ 0 ∧ y_19_0 − y_19_post ≤ 0 ∧ − y_19_0 + y_19_post ≤ 0 ∧ − y_19_2 + y_19_2 ≤ 0 ∧ y_19_2 − y_19_2 ≤ 0 ∧ − y_19_1 + y_19_1 ≤ 0 ∧ y_19_1 − y_19_1 ≤ 0 ∧ − x_SLAM_f_18_2 + x_SLAM_f_18_2 ≤ 0 ∧ x_SLAM_f_18_2 − x_SLAM_f_18_2 ≤ 0 ∧ − x_SLAM_f_18_1 + x_SLAM_f_18_1 ≤ 0 ∧ x_SLAM_f_18_1 − x_SLAM_f_18_1 ≤ 0 ∧ − x_34_1 + x_34_1 ≤ 0 ∧ x_34_1 − x_34_1 ≤ 0 ∧ − x_28_1 + x_28_1 ≤ 0 ∧ x_28_1 − x_28_1 ≤ 0 ∧ − x_238_post + x_238_post ≤ 0 ∧ x_238_post − x_238_post ≤ 0 ∧ − x_238_0 + x_238_0 ≤ 0 ∧ x_238_0 − x_238_0 ≤ 0 ∧ − x_20_2 + x_20_2 ≤ 0 ∧ x_20_2 − x_20_2 ≤ 0 ∧ − x_20_1 + x_20_1 ≤ 0 ∧ x_20_1 − x_20_1 ≤ 0 ∧ − x_177_post + x_177_post ≤ 0 ∧ x_177_post − x_177_post ≤ 0 ∧ − x_177_0 + x_177_0 ≤ 0 ∧ x_177_0 − x_177_0 ≤ 0 ∧ − x_16_1 + x_16_1 ≤ 0 ∧ x_16_1 − x_16_1 ≤ 0 ∧ − x_14_post + x_14_post ≤ 0 ∧ x_14_post − x_14_post ≤ 0 ∧ − x_14_0 + x_14_0 ≤ 0 ∧ x_14_0 − x_14_0 ≤ 0 ∧ − tmp_48_post + tmp_48_post ≤ 0 ∧ tmp_48_post − tmp_48_post ≤ 0 ∧ − tmp_48_0 + tmp_48_0 ≤ 0 ∧ tmp_48_0 − tmp_48_0 ≤ 0 ∧ − temp_49_post + temp_49_post ≤ 0 ∧ temp_49_post − temp_49_post ≤ 0 ∧ − temp_49_0 + temp_49_0 ≤ 0 ∧ temp_49_0 − temp_49_0 ≤ 0 ∧ − temp0_45_post + temp0_45_post ≤ 0 ∧ temp0_45_post − temp0_45_post ≤ 0 ∧ − temp0_45_1 + temp0_45_1 ≤ 0 ∧ temp0_45_1 − temp0_45_1 ≤ 0 ∧ − temp0_45_0 + temp0_45_0 ≤ 0 ∧ temp0_45_0 − temp0_45_0 ≤ 0 ∧ − temp0_32_4 + temp0_32_4 ≤ 0 ∧ temp0_32_4 − temp0_32_4 ≤ 0 ∧ − temp0_32_3 + temp0_32_3 ≤ 0 ∧ temp0_32_3 − temp0_32_3 ≤ 0 ∧ − temp0_15_0 + temp0_15_0 ≤ 0 ∧ temp0_15_0 − temp0_15_0 ≤ 0 ∧ − t_23_post + t_23_post ≤ 0 ∧ t_23_post − t_23_post ≤ 0 ∧ − t_23_1 + t_23_1 ≤ 0 ∧ t_23_1 − t_23_1 ≤ 0 ∧ − t_23_0 + t_23_0 ≤ 0 ∧ t_23_0 − t_23_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_1 + result_dot_printf_sdv_special_RETURN_VALUE_41_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_1 − result_dot_printf_sdv_special_RETURN_VALUE_41_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_1 + result_dot_printf_sdv_special_RETURN_VALUE_38_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_1 − result_dot_printf_sdv_special_RETURN_VALUE_38_1 ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_1 + result_dot_nondet_sdv_special_RETURN_VALUE_13_1 ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_1 − result_dot_nondet_sdv_special_RETURN_VALUE_13_1 ≤ 0 ∧ − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post + result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post ≤ 0 ∧ result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post ≤ 0 ∧ − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 + result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 ≤ 0 ∧ result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 ≤ 0 ∧ − result_11_6 + result_11_6 ≤ 0 ∧ result_11_6 − result_11_6 ≤ 0 ∧ − result_11_5 + result_11_5 ≤ 0 ∧ result_11_5 − result_11_5 ≤ 0 ∧ − result_11_4 + result_11_4 ≤ 0 ∧ result_11_4 − result_11_4 ≤ 0 ∧ − result_11_3 + result_11_3 ≤ 0 ∧ result_11_3 − result_11_3 ≤ 0 ∧ − result_11_2 + result_11_2 ≤ 0 ∧ result_11_2 − result_11_2 ≤ 0 ∧ − rcd_72_post + rcd_72_post ≤ 0 ∧ rcd_72_post − rcd_72_post ≤ 0 ∧ − rcd_72_0 + rcd_72_0 ≤ 0 ∧ rcd_72_0 − rcd_72_0 ≤ 0 ∧ − rcd_102_post + rcd_102_post ≤ 0 ∧ rcd_102_post − rcd_102_post ≤ 0 ∧ − rcd_102_0 + rcd_102_0 ≤ 0 ∧ rcd_102_0 − rcd_102_0 ≤ 0 ∧ − r_53_post + r_53_post ≤ 0 ∧ r_53_post − r_53_post ≤ 0 ∧ − r_53_0 + r_53_0 ≤ 0 ∧ r_53_0 − r_53_0 ≤ 0 ∧ − r_161_post + r_161_post ≤ 0 ∧ r_161_post − r_161_post ≤ 0 ∧ − r_161_0 + r_161_0 ≤ 0 ∧ r_161_0 − r_161_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 ≤ 0 ∧ − nondet_12_post + nondet_12_post ≤ 0 ∧ nondet_12_post − nondet_12_post ≤ 0 ∧ − nondet_12_1 + nondet_12_1 ≤ 0 ∧ nondet_12_1 − nondet_12_1 ≤ 0 ∧ − nondet_12_0 + nondet_12_0 ≤ 0 ∧ nondet_12_0 − nondet_12_0 ≤ 0 ∧ − lt_37_1 + lt_37_1 ≤ 0 ∧ lt_37_1 − lt_37_1 ≤ 0 ∧ − lt_237_post + lt_237_post ≤ 0 ∧ lt_237_post − lt_237_post ≤ 0 ∧ − lt_237_0 + lt_237_0 ≤ 0 ∧ lt_237_0 − lt_237_0 ≤ 0 ∧ − length_43_post + length_43_post ≤ 0 ∧ length_43_post − length_43_post ≤ 0 ∧ − length_43_0 + length_43_0 ≤ 0 ∧ length_43_0 − length_43_0 ≤ 0 ∧ − len_246_post + len_246_post ≤ 0 ∧ len_246_post − len_246_post ≤ 0 ∧ − len_246_0 + len_246_0 ≤ 0 ∧ len_246_0 − len_246_0 ≤ 0 ∧ − len_180_post + len_180_post ≤ 0 ∧ len_180_post − len_180_post ≤ 0 ∧ − len_180_0 + len_180_0 ≤ 0 ∧ len_180_0 − len_180_0 ≤ 0 ∧ − i_44_post + i_44_post ≤ 0 ∧ i_44_post − i_44_post ≤ 0 ∧ − i_44_0 + i_44_0 ≤ 0 ∧ i_44_0 − i_44_0 ≤ 0 ∧ − i_125_post + i_125_post ≤ 0 ∧ i_125_post − i_125_post ≤ 0 ∧ − i_125_0 + i_125_0 ≤ 0 ∧ i_125_0 − i_125_0 ≤ 0 ∧ − i_108_post + i_108_post ≤ 0 ∧ i_108_post − i_108_post ≤ 0 ∧ − i_108_0 + i_108_0 ≤ 0 ∧ i_108_0 − i_108_0 ≤ 0 ∧ − head_46_post + head_46_post ≤ 0 ∧ head_46_post − head_46_post ≤ 0 ∧ − head_46_0 + head_46_0 ≤ 0 ∧ head_46_0 − head_46_0 ≤ 0 ∧ − fmt_31_4 + fmt_31_4 ≤ 0 ∧ fmt_31_4 − fmt_31_4 ≤ 0 ∧ − fmt_31_3 + fmt_31_3 ≤ 0 ∧ fmt_31_3 − fmt_31_3 ≤ 0 ∧ − ct_17_2 + ct_17_2 ≤ 0 ∧ ct_17_2 − ct_17_2 ≤ 0 ∧ − ct_17_1 + ct_17_1 ≤ 0 ∧ ct_17_1 − ct_17_1 ≤ 0 ∧ − a_328_post + a_328_post ≤ 0 ∧ a_328_post − a_328_post ≤ 0 ∧ − a_328_0 + a_328_0 ≤ 0 ∧ a_328_0 − a_328_0 ≤ 0 ∧ − a_305_post + a_305_post ≤ 0 ∧ a_305_post − a_305_post ≤ 0 ∧ − a_305_0 + a_305_0 ≤ 0 ∧ a_305_0 − a_305_0 ≤ 0 ∧ − a_283_post + a_283_post ≤ 0 ∧ a_283_post − a_283_post ≤ 0 ∧ − a_283_0 + a_283_0 ≤ 0 ∧ a_283_0 − a_283_0 ≤ 0 ∧ − a_26_1 + a_26_1 ≤ 0 ∧ a_26_1 − a_26_1 ≤ 0 ∧ − a_247_post + a_247_post ≤ 0 ∧ a_247_post − a_247_post ≤ 0 ∧ − a_247_0 + a_247_0 ≤ 0 ∧ a_247_0 − a_247_0 ≤ 0 ∧ − a_197_post + a_197_post ≤ 0 ∧ a_197_post − a_197_post ≤ 0 ∧ − a_197_0 + a_197_0 ≤ 0 ∧ a_197_0 − a_197_0 ≤ 0 ∧ − a_146_0 + a_146_0 ≤ 0 ∧ a_146_0 − a_146_0 ≤ 0 | |
| 41 | 60 | 42: | 1 − x_14_0 ≤ 0 ∧ − y_19_post + y_19_post ≤ 0 ∧ y_19_post − y_19_post ≤ 0 ∧ − y_19_2 + y_19_2 ≤ 0 ∧ y_19_2 − y_19_2 ≤ 0 ∧ − y_19_1 + y_19_1 ≤ 0 ∧ y_19_1 − y_19_1 ≤ 0 ∧ − y_19_0 + y_19_0 ≤ 0 ∧ y_19_0 − y_19_0 ≤ 0 ∧ − x_SLAM_f_18_post + x_SLAM_f_18_post ≤ 0 ∧ x_SLAM_f_18_post − x_SLAM_f_18_post ≤ 0 ∧ − x_SLAM_f_18_2 + x_SLAM_f_18_2 ≤ 0 ∧ x_SLAM_f_18_2 − x_SLAM_f_18_2 ≤ 0 ∧ − x_SLAM_f_18_1 + x_SLAM_f_18_1 ≤ 0 ∧ x_SLAM_f_18_1 − x_SLAM_f_18_1 ≤ 0 ∧ − x_SLAM_f_18_0 + x_SLAM_f_18_0 ≤ 0 ∧ x_SLAM_f_18_0 − x_SLAM_f_18_0 ≤ 0 ∧ − x_34_post + x_34_post ≤ 0 ∧ x_34_post − x_34_post ≤ 0 ∧ − x_34_1 + x_34_1 ≤ 0 ∧ x_34_1 − x_34_1 ≤ 0 ∧ − x_34_0 + x_34_0 ≤ 0 ∧ x_34_0 − x_34_0 ≤ 0 ∧ − x_28_post + x_28_post ≤ 0 ∧ x_28_post − x_28_post ≤ 0 ∧ − x_28_1 + x_28_1 ≤ 0 ∧ x_28_1 − x_28_1 ≤ 0 ∧ − x_28_0 + x_28_0 ≤ 0 ∧ x_28_0 − x_28_0 ≤ 0 ∧ − x_238_post + x_238_post ≤ 0 ∧ x_238_post − x_238_post ≤ 0 ∧ − x_238_0 + x_238_0 ≤ 0 ∧ x_238_0 − x_238_0 ≤ 0 ∧ − x_20_post + x_20_post ≤ 0 ∧ x_20_post − x_20_post ≤ 0 ∧ − x_20_2 + x_20_2 ≤ 0 ∧ x_20_2 − x_20_2 ≤ 0 ∧ − x_20_1 + x_20_1 ≤ 0 ∧ x_20_1 − x_20_1 ≤ 0 ∧ − x_20_0 + x_20_0 ≤ 0 ∧ x_20_0 − x_20_0 ≤ 0 ∧ − x_177_post + x_177_post ≤ 0 ∧ x_177_post − x_177_post ≤ 0 ∧ − x_177_0 + x_177_0 ≤ 0 ∧ x_177_0 − x_177_0 ≤ 0 ∧ − x_16_post + x_16_post ≤ 0 ∧ x_16_post − x_16_post ≤ 0 ∧ − x_16_1 + x_16_1 ≤ 0 ∧ x_16_1 − x_16_1 ≤ 0 ∧ − x_16_0 + x_16_0 ≤ 0 ∧ x_16_0 − x_16_0 ≤ 0 ∧ − x_14_post + x_14_post ≤ 0 ∧ x_14_post − x_14_post ≤ 0 ∧ − x_14_0 + x_14_0 ≤ 0 ∧ x_14_0 − x_14_0 ≤ 0 ∧ − tmp_48_post + tmp_48_post ≤ 0 ∧ tmp_48_post − tmp_48_post ≤ 0 ∧ − tmp_48_0 + tmp_48_0 ≤ 0 ∧ tmp_48_0 − tmp_48_0 ≤ 0 ∧ − temp_49_post + temp_49_post ≤ 0 ∧ temp_49_post − temp_49_post ≤ 0 ∧ − temp_49_0 + temp_49_0 ≤ 0 ∧ temp_49_0 − temp_49_0 ≤ 0 ∧ − temp0_45_post + temp0_45_post ≤ 0 ∧ temp0_45_post − temp0_45_post ≤ 0 ∧ − temp0_45_1 + temp0_45_1 ≤ 0 ∧ temp0_45_1 − temp0_45_1 ≤ 0 ∧ − temp0_45_0 + temp0_45_0 ≤ 0 ∧ temp0_45_0 − temp0_45_0 ≤ 0 ∧ − temp0_32_post + temp0_32_post ≤ 0 ∧ temp0_32_post − temp0_32_post ≤ 0 ∧ − temp0_32_4 + temp0_32_4 ≤ 0 ∧ temp0_32_4 − temp0_32_4 ≤ 0 ∧ − temp0_32_3 + temp0_32_3 ≤ 0 ∧ temp0_32_3 − temp0_32_3 ≤ 0 ∧ − temp0_32_2 + temp0_32_2 ≤ 0 ∧ temp0_32_2 − temp0_32_2 ≤ 0 ∧ − temp0_32_1 + temp0_32_1 ≤ 0 ∧ temp0_32_1 − temp0_32_1 ≤ 0 ∧ − temp0_32_0 + temp0_32_0 ≤ 0 ∧ temp0_32_0 − temp0_32_0 ≤ 0 ∧ − temp0_15_0 + temp0_15_0 ≤ 0 ∧ temp0_15_0 − temp0_15_0 ≤ 0 ∧ − t_23_post + t_23_post ≤ 0 ∧ t_23_post − t_23_post ≤ 0 ∧ − t_23_1 + t_23_1 ≤ 0 ∧ t_23_1 − t_23_1 ≤ 0 ∧ − t_23_0 + t_23_0 ≤ 0 ∧ t_23_0 − t_23_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_post + result_dot_printf_sdv_special_RETURN_VALUE_41_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_post − result_dot_printf_sdv_special_RETURN_VALUE_41_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_1 + result_dot_printf_sdv_special_RETURN_VALUE_41_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_1 − result_dot_printf_sdv_special_RETURN_VALUE_41_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_0 + result_dot_printf_sdv_special_RETURN_VALUE_41_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_0 − result_dot_printf_sdv_special_RETURN_VALUE_41_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_post + result_dot_printf_sdv_special_RETURN_VALUE_38_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_post − result_dot_printf_sdv_special_RETURN_VALUE_38_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_1 + result_dot_printf_sdv_special_RETURN_VALUE_38_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_1 − result_dot_printf_sdv_special_RETURN_VALUE_38_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_0 + result_dot_printf_sdv_special_RETURN_VALUE_38_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_0 − result_dot_printf_sdv_special_RETURN_VALUE_38_0 ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_post + result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_post − result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_1 + result_dot_nondet_sdv_special_RETURN_VALUE_13_1 ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_1 − result_dot_nondet_sdv_special_RETURN_VALUE_13_1 ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_0 + result_dot_nondet_sdv_special_RETURN_VALUE_13_0 ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_0 − result_dot_nondet_sdv_special_RETURN_VALUE_13_0 ≤ 0 ∧ − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post + result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post ≤ 0 ∧ result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post ≤ 0 ∧ − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 + result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 ≤ 0 ∧ result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 ≤ 0 ∧ − result_11_post + result_11_post ≤ 0 ∧ result_11_post − result_11_post ≤ 0 ∧ − result_11_6 + result_11_6 ≤ 0 ∧ result_11_6 − result_11_6 ≤ 0 ∧ − result_11_5 + result_11_5 ≤ 0 ∧ result_11_5 − result_11_5 ≤ 0 ∧ − result_11_4 + result_11_4 ≤ 0 ∧ result_11_4 − result_11_4 ≤ 0 ∧ − result_11_3 + result_11_3 ≤ 0 ∧ result_11_3 − result_11_3 ≤ 0 ∧ − result_11_2 + result_11_2 ≤ 0 ∧ result_11_2 − result_11_2 ≤ 0 ∧ − result_11_1 + result_11_1 ≤ 0 ∧ result_11_1 − result_11_1 ≤ 0 ∧ − result_11_0 + result_11_0 ≤ 0 ∧ result_11_0 − result_11_0 ≤ 0 ∧ − rcd_72_post + rcd_72_post ≤ 0 ∧ rcd_72_post − rcd_72_post ≤ 0 ∧ − rcd_72_0 + rcd_72_0 ≤ 0 ∧ rcd_72_0 − rcd_72_0 ≤ 0 ∧ − rcd_102_post + rcd_102_post ≤ 0 ∧ rcd_102_post − rcd_102_post ≤ 0 ∧ − rcd_102_0 + rcd_102_0 ≤ 0 ∧ rcd_102_0 − rcd_102_0 ≤ 0 ∧ − r_53_post + r_53_post ≤ 0 ∧ r_53_post − r_53_post ≤ 0 ∧ − r_53_0 + r_53_0 ≤ 0 ∧ r_53_0 − r_53_0 ≤ 0 ∧ − r_161_post + r_161_post ≤ 0 ∧ r_161_post − r_161_post ≤ 0 ∧ − r_161_0 + r_161_0 ≤ 0 ∧ r_161_0 − r_161_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 ≤ 0 ∧ − nondet_12_post + nondet_12_post ≤ 0 ∧ nondet_12_post − nondet_12_post ≤ 0 ∧ − nondet_12_1 + nondet_12_1 ≤ 0 ∧ nondet_12_1 − nondet_12_1 ≤ 0 ∧ − nondet_12_0 + nondet_12_0 ≤ 0 ∧ nondet_12_0 − nondet_12_0 ≤ 0 ∧ − lt_37_post + lt_37_post ≤ 0 ∧ lt_37_post − lt_37_post ≤ 0 ∧ − lt_37_1 + lt_37_1 ≤ 0 ∧ lt_37_1 − lt_37_1 ≤ 0 ∧ − lt_37_0 + lt_37_0 ≤ 0 ∧ lt_37_0 − lt_37_0 ≤ 0 ∧ − lt_36_post + lt_36_post ≤ 0 ∧ lt_36_post − lt_36_post ≤ 0 ∧ − lt_36_0 + lt_36_0 ≤ 0 ∧ lt_36_0 − lt_36_0 ≤ 0 ∧ − lt_237_post + lt_237_post ≤ 0 ∧ lt_237_post − lt_237_post ≤ 0 ∧ − lt_237_0 + lt_237_0 ≤ 0 ∧ lt_237_0 − lt_237_0 ≤ 0 ∧ − length_43_post + length_43_post ≤ 0 ∧ length_43_post − length_43_post ≤ 0 ∧ − length_43_0 + length_43_0 ≤ 0 ∧ length_43_0 − length_43_0 ≤ 0 ∧ − len_246_post + len_246_post ≤ 0 ∧ len_246_post − len_246_post ≤ 0 ∧ − len_246_0 + len_246_0 ≤ 0 ∧ len_246_0 − len_246_0 ≤ 0 ∧ − len_180_post + len_180_post ≤ 0 ∧ len_180_post − len_180_post ≤ 0 ∧ − len_180_0 + len_180_0 ≤ 0 ∧ len_180_0 − len_180_0 ≤ 0 ∧ − i_44_post + i_44_post ≤ 0 ∧ i_44_post − i_44_post ≤ 0 ∧ − i_44_0 + i_44_0 ≤ 0 ∧ i_44_0 − i_44_0 ≤ 0 ∧ − i_125_post + i_125_post ≤ 0 ∧ i_125_post − i_125_post ≤ 0 ∧ − i_125_0 + i_125_0 ≤ 0 ∧ i_125_0 − i_125_0 ≤ 0 ∧ − i_108_post + i_108_post ≤ 0 ∧ i_108_post − i_108_post ≤ 0 ∧ − i_108_0 + i_108_0 ≤ 0 ∧ i_108_0 − i_108_0 ≤ 0 ∧ − head_46_post + head_46_post ≤ 0 ∧ head_46_post − head_46_post ≤ 0 ∧ − head_46_0 + head_46_0 ≤ 0 ∧ head_46_0 − head_46_0 ≤ 0 ∧ − fmt_31_post + fmt_31_post ≤ 0 ∧ fmt_31_post − fmt_31_post ≤ 0 ∧ − fmt_31_4 + fmt_31_4 ≤ 0 ∧ fmt_31_4 − fmt_31_4 ≤ 0 ∧ − fmt_31_3 + fmt_31_3 ≤ 0 ∧ fmt_31_3 − fmt_31_3 ≤ 0 ∧ − fmt_31_2 + fmt_31_2 ≤ 0 ∧ fmt_31_2 − fmt_31_2 ≤ 0 ∧ − fmt_31_1 + fmt_31_1 ≤ 0 ∧ fmt_31_1 − fmt_31_1 ≤ 0 ∧ − fmt_31_0 + fmt_31_0 ≤ 0 ∧ fmt_31_0 − fmt_31_0 ≤ 0 ∧ − ct_17_post + ct_17_post ≤ 0 ∧ ct_17_post − ct_17_post ≤ 0 ∧ − ct_17_2 + ct_17_2 ≤ 0 ∧ ct_17_2 − ct_17_2 ≤ 0 ∧ − ct_17_1 + ct_17_1 ≤ 0 ∧ ct_17_1 − ct_17_1 ≤ 0 ∧ − ct_17_0 + ct_17_0 ≤ 0 ∧ ct_17_0 − ct_17_0 ≤ 0 ∧ − a_328_post + a_328_post ≤ 0 ∧ a_328_post − a_328_post ≤ 0 ∧ − a_328_0 + a_328_0 ≤ 0 ∧ a_328_0 − a_328_0 ≤ 0 ∧ − a_305_post + a_305_post ≤ 0 ∧ a_305_post − a_305_post ≤ 0 ∧ − a_305_0 + a_305_0 ≤ 0 ∧ a_305_0 − a_305_0 ≤ 0 ∧ − a_283_post + a_283_post ≤ 0 ∧ a_283_post − a_283_post ≤ 0 ∧ − a_283_0 + a_283_0 ≤ 0 ∧ a_283_0 − a_283_0 ≤ 0 ∧ − a_26_post + a_26_post ≤ 0 ∧ a_26_post − a_26_post ≤ 0 ∧ − a_26_1 + a_26_1 ≤ 0 ∧ a_26_1 − a_26_1 ≤ 0 ∧ − a_26_0 + a_26_0 ≤ 0 ∧ a_26_0 − a_26_0 ≤ 0 ∧ − a_247_post + a_247_post ≤ 0 ∧ a_247_post − a_247_post ≤ 0 ∧ − a_247_0 + a_247_0 ≤ 0 ∧ a_247_0 − a_247_0 ≤ 0 ∧ − a_197_post + a_197_post ≤ 0 ∧ a_197_post − a_197_post ≤ 0 ∧ − a_197_0 + a_197_0 ≤ 0 ∧ a_197_0 − a_197_0 ≤ 0 ∧ − a_146_0 + a_146_0 ≤ 0 ∧ a_146_0 − a_146_0 ≤ 0 | |
| 41 | 61 | 42: | 1 + x_14_0 ≤ 0 ∧ − y_19_post + y_19_post ≤ 0 ∧ y_19_post − y_19_post ≤ 0 ∧ − y_19_2 + y_19_2 ≤ 0 ∧ y_19_2 − y_19_2 ≤ 0 ∧ − y_19_1 + y_19_1 ≤ 0 ∧ y_19_1 − y_19_1 ≤ 0 ∧ − y_19_0 + y_19_0 ≤ 0 ∧ y_19_0 − y_19_0 ≤ 0 ∧ − x_SLAM_f_18_post + x_SLAM_f_18_post ≤ 0 ∧ x_SLAM_f_18_post − x_SLAM_f_18_post ≤ 0 ∧ − x_SLAM_f_18_2 + x_SLAM_f_18_2 ≤ 0 ∧ x_SLAM_f_18_2 − x_SLAM_f_18_2 ≤ 0 ∧ − x_SLAM_f_18_1 + x_SLAM_f_18_1 ≤ 0 ∧ x_SLAM_f_18_1 − x_SLAM_f_18_1 ≤ 0 ∧ − x_SLAM_f_18_0 + x_SLAM_f_18_0 ≤ 0 ∧ x_SLAM_f_18_0 − x_SLAM_f_18_0 ≤ 0 ∧ − x_34_post + x_34_post ≤ 0 ∧ x_34_post − x_34_post ≤ 0 ∧ − x_34_1 + x_34_1 ≤ 0 ∧ x_34_1 − x_34_1 ≤ 0 ∧ − x_34_0 + x_34_0 ≤ 0 ∧ x_34_0 − x_34_0 ≤ 0 ∧ − x_28_post + x_28_post ≤ 0 ∧ x_28_post − x_28_post ≤ 0 ∧ − x_28_1 + x_28_1 ≤ 0 ∧ x_28_1 − x_28_1 ≤ 0 ∧ − x_28_0 + x_28_0 ≤ 0 ∧ x_28_0 − x_28_0 ≤ 0 ∧ − x_238_post + x_238_post ≤ 0 ∧ x_238_post − x_238_post ≤ 0 ∧ − x_238_0 + x_238_0 ≤ 0 ∧ x_238_0 − x_238_0 ≤ 0 ∧ − x_20_post + x_20_post ≤ 0 ∧ x_20_post − x_20_post ≤ 0 ∧ − x_20_2 + x_20_2 ≤ 0 ∧ x_20_2 − x_20_2 ≤ 0 ∧ − x_20_1 + x_20_1 ≤ 0 ∧ x_20_1 − x_20_1 ≤ 0 ∧ − x_20_0 + x_20_0 ≤ 0 ∧ x_20_0 − x_20_0 ≤ 0 ∧ − x_177_post + x_177_post ≤ 0 ∧ x_177_post − x_177_post ≤ 0 ∧ − x_177_0 + x_177_0 ≤ 0 ∧ x_177_0 − x_177_0 ≤ 0 ∧ − x_16_post + x_16_post ≤ 0 ∧ x_16_post − x_16_post ≤ 0 ∧ − x_16_1 + x_16_1 ≤ 0 ∧ x_16_1 − x_16_1 ≤ 0 ∧ − x_16_0 + x_16_0 ≤ 0 ∧ x_16_0 − x_16_0 ≤ 0 ∧ − x_14_post + x_14_post ≤ 0 ∧ x_14_post − x_14_post ≤ 0 ∧ − x_14_0 + x_14_0 ≤ 0 ∧ x_14_0 − x_14_0 ≤ 0 ∧ − tmp_48_post + tmp_48_post ≤ 0 ∧ tmp_48_post − tmp_48_post ≤ 0 ∧ − tmp_48_0 + tmp_48_0 ≤ 0 ∧ tmp_48_0 − tmp_48_0 ≤ 0 ∧ − temp_49_post + temp_49_post ≤ 0 ∧ temp_49_post − temp_49_post ≤ 0 ∧ − temp_49_0 + temp_49_0 ≤ 0 ∧ temp_49_0 − temp_49_0 ≤ 0 ∧ − temp0_45_post + temp0_45_post ≤ 0 ∧ temp0_45_post − temp0_45_post ≤ 0 ∧ − temp0_45_1 + temp0_45_1 ≤ 0 ∧ temp0_45_1 − temp0_45_1 ≤ 0 ∧ − temp0_45_0 + temp0_45_0 ≤ 0 ∧ temp0_45_0 − temp0_45_0 ≤ 0 ∧ − temp0_32_post + temp0_32_post ≤ 0 ∧ temp0_32_post − temp0_32_post ≤ 0 ∧ − temp0_32_4 + temp0_32_4 ≤ 0 ∧ temp0_32_4 − temp0_32_4 ≤ 0 ∧ − temp0_32_3 + temp0_32_3 ≤ 0 ∧ temp0_32_3 − temp0_32_3 ≤ 0 ∧ − temp0_32_2 + temp0_32_2 ≤ 0 ∧ temp0_32_2 − temp0_32_2 ≤ 0 ∧ − temp0_32_1 + temp0_32_1 ≤ 0 ∧ temp0_32_1 − temp0_32_1 ≤ 0 ∧ − temp0_32_0 + temp0_32_0 ≤ 0 ∧ temp0_32_0 − temp0_32_0 ≤ 0 ∧ − temp0_15_0 + temp0_15_0 ≤ 0 ∧ temp0_15_0 − temp0_15_0 ≤ 0 ∧ − t_23_post + t_23_post ≤ 0 ∧ t_23_post − t_23_post ≤ 0 ∧ − t_23_1 + t_23_1 ≤ 0 ∧ t_23_1 − t_23_1 ≤ 0 ∧ − t_23_0 + t_23_0 ≤ 0 ∧ t_23_0 − t_23_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_post + result_dot_printf_sdv_special_RETURN_VALUE_41_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_post − result_dot_printf_sdv_special_RETURN_VALUE_41_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_1 + result_dot_printf_sdv_special_RETURN_VALUE_41_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_1 − result_dot_printf_sdv_special_RETURN_VALUE_41_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_0 + result_dot_printf_sdv_special_RETURN_VALUE_41_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_0 − result_dot_printf_sdv_special_RETURN_VALUE_41_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_post + result_dot_printf_sdv_special_RETURN_VALUE_38_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_post − result_dot_printf_sdv_special_RETURN_VALUE_38_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_1 + result_dot_printf_sdv_special_RETURN_VALUE_38_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_1 − result_dot_printf_sdv_special_RETURN_VALUE_38_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_0 + result_dot_printf_sdv_special_RETURN_VALUE_38_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_0 − result_dot_printf_sdv_special_RETURN_VALUE_38_0 ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_post + result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_post − result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_1 + result_dot_nondet_sdv_special_RETURN_VALUE_13_1 ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_1 − result_dot_nondet_sdv_special_RETURN_VALUE_13_1 ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_0 + result_dot_nondet_sdv_special_RETURN_VALUE_13_0 ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_0 − result_dot_nondet_sdv_special_RETURN_VALUE_13_0 ≤ 0 ∧ − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post + result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post ≤ 0 ∧ result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post ≤ 0 ∧ − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 + result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 ≤ 0 ∧ result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 ≤ 0 ∧ − result_11_post + result_11_post ≤ 0 ∧ result_11_post − result_11_post ≤ 0 ∧ − result_11_6 + result_11_6 ≤ 0 ∧ result_11_6 − result_11_6 ≤ 0 ∧ − result_11_5 + result_11_5 ≤ 0 ∧ result_11_5 − result_11_5 ≤ 0 ∧ − result_11_4 + result_11_4 ≤ 0 ∧ result_11_4 − result_11_4 ≤ 0 ∧ − result_11_3 + result_11_3 ≤ 0 ∧ result_11_3 − result_11_3 ≤ 0 ∧ − result_11_2 + result_11_2 ≤ 0 ∧ result_11_2 − result_11_2 ≤ 0 ∧ − result_11_1 + result_11_1 ≤ 0 ∧ result_11_1 − result_11_1 ≤ 0 ∧ − result_11_0 + result_11_0 ≤ 0 ∧ result_11_0 − result_11_0 ≤ 0 ∧ − rcd_72_post + rcd_72_post ≤ 0 ∧ rcd_72_post − rcd_72_post ≤ 0 ∧ − rcd_72_0 + rcd_72_0 ≤ 0 ∧ rcd_72_0 − rcd_72_0 ≤ 0 ∧ − rcd_102_post + rcd_102_post ≤ 0 ∧ rcd_102_post − rcd_102_post ≤ 0 ∧ − rcd_102_0 + rcd_102_0 ≤ 0 ∧ rcd_102_0 − rcd_102_0 ≤ 0 ∧ − r_53_post + r_53_post ≤ 0 ∧ r_53_post − r_53_post ≤ 0 ∧ − r_53_0 + r_53_0 ≤ 0 ∧ r_53_0 − r_53_0 ≤ 0 ∧ − r_161_post + r_161_post ≤ 0 ∧ r_161_post − r_161_post ≤ 0 ∧ − r_161_0 + r_161_0 ≤ 0 ∧ r_161_0 − r_161_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 ≤ 0 ∧ − nondet_12_post + nondet_12_post ≤ 0 ∧ nondet_12_post − nondet_12_post ≤ 0 ∧ − nondet_12_1 + nondet_12_1 ≤ 0 ∧ nondet_12_1 − nondet_12_1 ≤ 0 ∧ − nondet_12_0 + nondet_12_0 ≤ 0 ∧ nondet_12_0 − nondet_12_0 ≤ 0 ∧ − lt_37_post + lt_37_post ≤ 0 ∧ lt_37_post − lt_37_post ≤ 0 ∧ − lt_37_1 + lt_37_1 ≤ 0 ∧ lt_37_1 − lt_37_1 ≤ 0 ∧ − lt_37_0 + lt_37_0 ≤ 0 ∧ lt_37_0 − lt_37_0 ≤ 0 ∧ − lt_36_post + lt_36_post ≤ 0 ∧ lt_36_post − lt_36_post ≤ 0 ∧ − lt_36_0 + lt_36_0 ≤ 0 ∧ lt_36_0 − lt_36_0 ≤ 0 ∧ − lt_237_post + lt_237_post ≤ 0 ∧ lt_237_post − lt_237_post ≤ 0 ∧ − lt_237_0 + lt_237_0 ≤ 0 ∧ lt_237_0 − lt_237_0 ≤ 0 ∧ − length_43_post + length_43_post ≤ 0 ∧ length_43_post − length_43_post ≤ 0 ∧ − length_43_0 + length_43_0 ≤ 0 ∧ length_43_0 − length_43_0 ≤ 0 ∧ − len_246_post + len_246_post ≤ 0 ∧ len_246_post − len_246_post ≤ 0 ∧ − len_246_0 + len_246_0 ≤ 0 ∧ len_246_0 − len_246_0 ≤ 0 ∧ − len_180_post + len_180_post ≤ 0 ∧ len_180_post − len_180_post ≤ 0 ∧ − len_180_0 + len_180_0 ≤ 0 ∧ len_180_0 − len_180_0 ≤ 0 ∧ − i_44_post + i_44_post ≤ 0 ∧ i_44_post − i_44_post ≤ 0 ∧ − i_44_0 + i_44_0 ≤ 0 ∧ i_44_0 − i_44_0 ≤ 0 ∧ − i_125_post + i_125_post ≤ 0 ∧ i_125_post − i_125_post ≤ 0 ∧ − i_125_0 + i_125_0 ≤ 0 ∧ i_125_0 − i_125_0 ≤ 0 ∧ − i_108_post + i_108_post ≤ 0 ∧ i_108_post − i_108_post ≤ 0 ∧ − i_108_0 + i_108_0 ≤ 0 ∧ i_108_0 − i_108_0 ≤ 0 ∧ − head_46_post + head_46_post ≤ 0 ∧ head_46_post − head_46_post ≤ 0 ∧ − head_46_0 + head_46_0 ≤ 0 ∧ head_46_0 − head_46_0 ≤ 0 ∧ − fmt_31_post + fmt_31_post ≤ 0 ∧ fmt_31_post − fmt_31_post ≤ 0 ∧ − fmt_31_4 + fmt_31_4 ≤ 0 ∧ fmt_31_4 − fmt_31_4 ≤ 0 ∧ − fmt_31_3 + fmt_31_3 ≤ 0 ∧ fmt_31_3 − fmt_31_3 ≤ 0 ∧ − fmt_31_2 + fmt_31_2 ≤ 0 ∧ fmt_31_2 − fmt_31_2 ≤ 0 ∧ − fmt_31_1 + fmt_31_1 ≤ 0 ∧ fmt_31_1 − fmt_31_1 ≤ 0 ∧ − fmt_31_0 + fmt_31_0 ≤ 0 ∧ fmt_31_0 − fmt_31_0 ≤ 0 ∧ − ct_17_post + ct_17_post ≤ 0 ∧ ct_17_post − ct_17_post ≤ 0 ∧ − ct_17_2 + ct_17_2 ≤ 0 ∧ ct_17_2 − ct_17_2 ≤ 0 ∧ − ct_17_1 + ct_17_1 ≤ 0 ∧ ct_17_1 − ct_17_1 ≤ 0 ∧ − ct_17_0 + ct_17_0 ≤ 0 ∧ ct_17_0 − ct_17_0 ≤ 0 ∧ − a_328_post + a_328_post ≤ 0 ∧ a_328_post − a_328_post ≤ 0 ∧ − a_328_0 + a_328_0 ≤ 0 ∧ a_328_0 − a_328_0 ≤ 0 ∧ − a_305_post + a_305_post ≤ 0 ∧ a_305_post − a_305_post ≤ 0 ∧ − a_305_0 + a_305_0 ≤ 0 ∧ a_305_0 − a_305_0 ≤ 0 ∧ − a_283_post + a_283_post ≤ 0 ∧ a_283_post − a_283_post ≤ 0 ∧ − a_283_0 + a_283_0 ≤ 0 ∧ a_283_0 − a_283_0 ≤ 0 ∧ − a_26_post + a_26_post ≤ 0 ∧ a_26_post − a_26_post ≤ 0 ∧ − a_26_1 + a_26_1 ≤ 0 ∧ a_26_1 − a_26_1 ≤ 0 ∧ − a_26_0 + a_26_0 ≤ 0 ∧ a_26_0 − a_26_0 ≤ 0 ∧ − a_247_post + a_247_post ≤ 0 ∧ a_247_post − a_247_post ≤ 0 ∧ − a_247_0 + a_247_0 ≤ 0 ∧ a_247_0 − a_247_0 ≤ 0 ∧ − a_197_post + a_197_post ≤ 0 ∧ a_197_post − a_197_post ≤ 0 ∧ − a_197_0 + a_197_0 ≤ 0 ∧ a_197_0 − a_197_0 ≤ 0 ∧ − a_146_0 + a_146_0 ≤ 0 ∧ a_146_0 − a_146_0 ≤ 0 | |
| 42 | 62 | 11: | 1 − result_dot_nondet_sdv_special_RETURN_VALUE_13_0 ≤ 0 ∧ 2 − result_dot_nondet_sdv_special_RETURN_VALUE_13_0 ≤ 0 ∧ − y_19_post + y_19_post ≤ 0 ∧ y_19_post − y_19_post ≤ 0 ∧ − y_19_2 + y_19_2 ≤ 0 ∧ y_19_2 − y_19_2 ≤ 0 ∧ − y_19_1 + y_19_1 ≤ 0 ∧ y_19_1 − y_19_1 ≤ 0 ∧ − y_19_0 + y_19_0 ≤ 0 ∧ y_19_0 − y_19_0 ≤ 0 ∧ − x_SLAM_f_18_post + x_SLAM_f_18_post ≤ 0 ∧ x_SLAM_f_18_post − x_SLAM_f_18_post ≤ 0 ∧ − x_SLAM_f_18_2 + x_SLAM_f_18_2 ≤ 0 ∧ x_SLAM_f_18_2 − x_SLAM_f_18_2 ≤ 0 ∧ − x_SLAM_f_18_1 + x_SLAM_f_18_1 ≤ 0 ∧ x_SLAM_f_18_1 − x_SLAM_f_18_1 ≤ 0 ∧ − x_SLAM_f_18_0 + x_SLAM_f_18_0 ≤ 0 ∧ x_SLAM_f_18_0 − x_SLAM_f_18_0 ≤ 0 ∧ − x_34_post + x_34_post ≤ 0 ∧ x_34_post − x_34_post ≤ 0 ∧ − x_34_1 + x_34_1 ≤ 0 ∧ x_34_1 − x_34_1 ≤ 0 ∧ − x_34_0 + x_34_0 ≤ 0 ∧ x_34_0 − x_34_0 ≤ 0 ∧ − x_28_post + x_28_post ≤ 0 ∧ x_28_post − x_28_post ≤ 0 ∧ − x_28_1 + x_28_1 ≤ 0 ∧ x_28_1 − x_28_1 ≤ 0 ∧ − x_28_0 + x_28_0 ≤ 0 ∧ x_28_0 − x_28_0 ≤ 0 ∧ − x_238_post + x_238_post ≤ 0 ∧ x_238_post − x_238_post ≤ 0 ∧ − x_238_0 + x_238_0 ≤ 0 ∧ x_238_0 − x_238_0 ≤ 0 ∧ − x_20_post + x_20_post ≤ 0 ∧ x_20_post − x_20_post ≤ 0 ∧ − x_20_2 + x_20_2 ≤ 0 ∧ x_20_2 − x_20_2 ≤ 0 ∧ − x_20_1 + x_20_1 ≤ 0 ∧ x_20_1 − x_20_1 ≤ 0 ∧ − x_20_0 + x_20_0 ≤ 0 ∧ x_20_0 − x_20_0 ≤ 0 ∧ − x_177_post + x_177_post ≤ 0 ∧ x_177_post − x_177_post ≤ 0 ∧ − x_177_0 + x_177_0 ≤ 0 ∧ x_177_0 − x_177_0 ≤ 0 ∧ − x_16_post + x_16_post ≤ 0 ∧ x_16_post − x_16_post ≤ 0 ∧ − x_16_1 + x_16_1 ≤ 0 ∧ x_16_1 − x_16_1 ≤ 0 ∧ − x_16_0 + x_16_0 ≤ 0 ∧ x_16_0 − x_16_0 ≤ 0 ∧ − x_14_post + x_14_post ≤ 0 ∧ x_14_post − x_14_post ≤ 0 ∧ − x_14_0 + x_14_0 ≤ 0 ∧ x_14_0 − x_14_0 ≤ 0 ∧ − tmp_48_post + tmp_48_post ≤ 0 ∧ tmp_48_post − tmp_48_post ≤ 0 ∧ − tmp_48_0 + tmp_48_0 ≤ 0 ∧ tmp_48_0 − tmp_48_0 ≤ 0 ∧ − temp_49_post + temp_49_post ≤ 0 ∧ temp_49_post − temp_49_post ≤ 0 ∧ − temp_49_0 + temp_49_0 ≤ 0 ∧ temp_49_0 − temp_49_0 ≤ 0 ∧ − temp0_45_post + temp0_45_post ≤ 0 ∧ temp0_45_post − temp0_45_post ≤ 0 ∧ − temp0_45_1 + temp0_45_1 ≤ 0 ∧ temp0_45_1 − temp0_45_1 ≤ 0 ∧ − temp0_45_0 + temp0_45_0 ≤ 0 ∧ temp0_45_0 − temp0_45_0 ≤ 0 ∧ − temp0_32_post + temp0_32_post ≤ 0 ∧ temp0_32_post − temp0_32_post ≤ 0 ∧ − temp0_32_4 + temp0_32_4 ≤ 0 ∧ temp0_32_4 − temp0_32_4 ≤ 0 ∧ − temp0_32_3 + temp0_32_3 ≤ 0 ∧ temp0_32_3 − temp0_32_3 ≤ 0 ∧ − temp0_32_2 + temp0_32_2 ≤ 0 ∧ temp0_32_2 − temp0_32_2 ≤ 0 ∧ − temp0_32_1 + temp0_32_1 ≤ 0 ∧ temp0_32_1 − temp0_32_1 ≤ 0 ∧ − temp0_32_0 + temp0_32_0 ≤ 0 ∧ temp0_32_0 − temp0_32_0 ≤ 0 ∧ − temp0_15_0 + temp0_15_0 ≤ 0 ∧ temp0_15_0 − temp0_15_0 ≤ 0 ∧ − t_23_post + t_23_post ≤ 0 ∧ t_23_post − t_23_post ≤ 0 ∧ − t_23_1 + t_23_1 ≤ 0 ∧ t_23_1 − t_23_1 ≤ 0 ∧ − t_23_0 + t_23_0 ≤ 0 ∧ t_23_0 − t_23_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_post + result_dot_printf_sdv_special_RETURN_VALUE_41_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_post − result_dot_printf_sdv_special_RETURN_VALUE_41_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_1 + result_dot_printf_sdv_special_RETURN_VALUE_41_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_1 − result_dot_printf_sdv_special_RETURN_VALUE_41_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_0 + result_dot_printf_sdv_special_RETURN_VALUE_41_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_0 − result_dot_printf_sdv_special_RETURN_VALUE_41_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_post + result_dot_printf_sdv_special_RETURN_VALUE_38_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_post − result_dot_printf_sdv_special_RETURN_VALUE_38_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_1 + result_dot_printf_sdv_special_RETURN_VALUE_38_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_1 − result_dot_printf_sdv_special_RETURN_VALUE_38_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_0 + result_dot_printf_sdv_special_RETURN_VALUE_38_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_0 − result_dot_printf_sdv_special_RETURN_VALUE_38_0 ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_post + result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_post − result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_1 + result_dot_nondet_sdv_special_RETURN_VALUE_13_1 ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_1 − result_dot_nondet_sdv_special_RETURN_VALUE_13_1 ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_0 + result_dot_nondet_sdv_special_RETURN_VALUE_13_0 ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_0 − result_dot_nondet_sdv_special_RETURN_VALUE_13_0 ≤ 0 ∧ − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post + result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post ≤ 0 ∧ result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post ≤ 0 ∧ − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 + result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 ≤ 0 ∧ result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 ≤ 0 ∧ − result_11_post + result_11_post ≤ 0 ∧ result_11_post − result_11_post ≤ 0 ∧ − result_11_6 + result_11_6 ≤ 0 ∧ result_11_6 − result_11_6 ≤ 0 ∧ − result_11_5 + result_11_5 ≤ 0 ∧ result_11_5 − result_11_5 ≤ 0 ∧ − result_11_4 + result_11_4 ≤ 0 ∧ result_11_4 − result_11_4 ≤ 0 ∧ − result_11_3 + result_11_3 ≤ 0 ∧ result_11_3 − result_11_3 ≤ 0 ∧ − result_11_2 + result_11_2 ≤ 0 ∧ result_11_2 − result_11_2 ≤ 0 ∧ − result_11_1 + result_11_1 ≤ 0 ∧ result_11_1 − result_11_1 ≤ 0 ∧ − result_11_0 + result_11_0 ≤ 0 ∧ result_11_0 − result_11_0 ≤ 0 ∧ − rcd_72_post + rcd_72_post ≤ 0 ∧ rcd_72_post − rcd_72_post ≤ 0 ∧ − rcd_72_0 + rcd_72_0 ≤ 0 ∧ rcd_72_0 − rcd_72_0 ≤ 0 ∧ − rcd_102_post + rcd_102_post ≤ 0 ∧ rcd_102_post − rcd_102_post ≤ 0 ∧ − rcd_102_0 + rcd_102_0 ≤ 0 ∧ rcd_102_0 − rcd_102_0 ≤ 0 ∧ − r_53_post + r_53_post ≤ 0 ∧ r_53_post − r_53_post ≤ 0 ∧ − r_53_0 + r_53_0 ≤ 0 ∧ r_53_0 − r_53_0 ≤ 0 ∧ − r_161_post + r_161_post ≤ 0 ∧ r_161_post − r_161_post ≤ 0 ∧ − r_161_0 + r_161_0 ≤ 0 ∧ r_161_0 − r_161_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 ≤ 0 ∧ − nondet_12_post + nondet_12_post ≤ 0 ∧ nondet_12_post − nondet_12_post ≤ 0 ∧ − nondet_12_1 + nondet_12_1 ≤ 0 ∧ nondet_12_1 − nondet_12_1 ≤ 0 ∧ − nondet_12_0 + nondet_12_0 ≤ 0 ∧ nondet_12_0 − nondet_12_0 ≤ 0 ∧ − lt_37_post + lt_37_post ≤ 0 ∧ lt_37_post − lt_37_post ≤ 0 ∧ − lt_37_1 + lt_37_1 ≤ 0 ∧ lt_37_1 − lt_37_1 ≤ 0 ∧ − lt_37_0 + lt_37_0 ≤ 0 ∧ lt_37_0 − lt_37_0 ≤ 0 ∧ − lt_36_post + lt_36_post ≤ 0 ∧ lt_36_post − lt_36_post ≤ 0 ∧ − lt_36_0 + lt_36_0 ≤ 0 ∧ lt_36_0 − lt_36_0 ≤ 0 ∧ − lt_237_post + lt_237_post ≤ 0 ∧ lt_237_post − lt_237_post ≤ 0 ∧ − lt_237_0 + lt_237_0 ≤ 0 ∧ lt_237_0 − lt_237_0 ≤ 0 ∧ − length_43_post + length_43_post ≤ 0 ∧ length_43_post − length_43_post ≤ 0 ∧ − length_43_0 + length_43_0 ≤ 0 ∧ length_43_0 − length_43_0 ≤ 0 ∧ − len_246_post + len_246_post ≤ 0 ∧ len_246_post − len_246_post ≤ 0 ∧ − len_246_0 + len_246_0 ≤ 0 ∧ len_246_0 − len_246_0 ≤ 0 ∧ − len_180_post + len_180_post ≤ 0 ∧ len_180_post − len_180_post ≤ 0 ∧ − len_180_0 + len_180_0 ≤ 0 ∧ len_180_0 − len_180_0 ≤ 0 ∧ − i_44_post + i_44_post ≤ 0 ∧ i_44_post − i_44_post ≤ 0 ∧ − i_44_0 + i_44_0 ≤ 0 ∧ i_44_0 − i_44_0 ≤ 0 ∧ − i_125_post + i_125_post ≤ 0 ∧ i_125_post − i_125_post ≤ 0 ∧ − i_125_0 + i_125_0 ≤ 0 ∧ i_125_0 − i_125_0 ≤ 0 ∧ − i_108_post + i_108_post ≤ 0 ∧ i_108_post − i_108_post ≤ 0 ∧ − i_108_0 + i_108_0 ≤ 0 ∧ i_108_0 − i_108_0 ≤ 0 ∧ − head_46_post + head_46_post ≤ 0 ∧ head_46_post − head_46_post ≤ 0 ∧ − head_46_0 + head_46_0 ≤ 0 ∧ head_46_0 − head_46_0 ≤ 0 ∧ − fmt_31_post + fmt_31_post ≤ 0 ∧ fmt_31_post − fmt_31_post ≤ 0 ∧ − fmt_31_4 + fmt_31_4 ≤ 0 ∧ fmt_31_4 − fmt_31_4 ≤ 0 ∧ − fmt_31_3 + fmt_31_3 ≤ 0 ∧ fmt_31_3 − fmt_31_3 ≤ 0 ∧ − fmt_31_2 + fmt_31_2 ≤ 0 ∧ fmt_31_2 − fmt_31_2 ≤ 0 ∧ − fmt_31_1 + fmt_31_1 ≤ 0 ∧ fmt_31_1 − fmt_31_1 ≤ 0 ∧ − fmt_31_0 + fmt_31_0 ≤ 0 ∧ fmt_31_0 − fmt_31_0 ≤ 0 ∧ − ct_17_post + ct_17_post ≤ 0 ∧ ct_17_post − ct_17_post ≤ 0 ∧ − ct_17_2 + ct_17_2 ≤ 0 ∧ ct_17_2 − ct_17_2 ≤ 0 ∧ − ct_17_1 + ct_17_1 ≤ 0 ∧ ct_17_1 − ct_17_1 ≤ 0 ∧ − ct_17_0 + ct_17_0 ≤ 0 ∧ ct_17_0 − ct_17_0 ≤ 0 ∧ − a_328_post + a_328_post ≤ 0 ∧ a_328_post − a_328_post ≤ 0 ∧ − a_328_0 + a_328_0 ≤ 0 ∧ a_328_0 − a_328_0 ≤ 0 ∧ − a_305_post + a_305_post ≤ 0 ∧ a_305_post − a_305_post ≤ 0 ∧ − a_305_0 + a_305_0 ≤ 0 ∧ a_305_0 − a_305_0 ≤ 0 ∧ − a_283_post + a_283_post ≤ 0 ∧ a_283_post − a_283_post ≤ 0 ∧ − a_283_0 + a_283_0 ≤ 0 ∧ a_283_0 − a_283_0 ≤ 0 ∧ − a_26_post + a_26_post ≤ 0 ∧ a_26_post − a_26_post ≤ 0 ∧ − a_26_1 + a_26_1 ≤ 0 ∧ a_26_1 − a_26_1 ≤ 0 ∧ − a_26_0 + a_26_0 ≤ 0 ∧ a_26_0 − a_26_0 ≤ 0 ∧ − a_247_post + a_247_post ≤ 0 ∧ a_247_post − a_247_post ≤ 0 ∧ − a_247_0 + a_247_0 ≤ 0 ∧ a_247_0 − a_247_0 ≤ 0 ∧ − a_197_post + a_197_post ≤ 0 ∧ a_197_post − a_197_post ≤ 0 ∧ − a_197_0 + a_197_0 ≤ 0 ∧ a_197_0 − a_197_0 ≤ 0 ∧ − a_146_0 + a_146_0 ≤ 0 ∧ a_146_0 − a_146_0 ≤ 0 | |
| 40 | 63 | 43: | 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ − len_180_0 ≤ 0 ∧ − a_197_0 ≤ 0 ∧ a_26_0 − a_26_post ≤ 0 ∧ − a_26_0 + a_26_post ≤ 0 ∧ lt_237_0 − lt_237_post ≤ 0 ∧ − lt_237_0 + lt_237_post ≤ 0 ∧ r_53_0 − r_53_post ≤ 0 ∧ − r_53_0 + r_53_post ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_0 − result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_0 + result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_0 − result_dot_printf_sdv_special_RETURN_VALUE_41_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_0 + result_dot_printf_sdv_special_RETURN_VALUE_41_post ≤ 0 ∧ x_14_0 − x_14_post ≤ 0 ∧ − x_14_0 + x_14_post ≤ 0 ∧ x_238_0 − x_238_post ≤ 0 ∧ − x_238_0 + x_238_post ≤ 0 ∧ − y_19_post + y_19_post ≤ 0 ∧ y_19_post − y_19_post ≤ 0 ∧ − y_19_2 + y_19_2 ≤ 0 ∧ y_19_2 − y_19_2 ≤ 0 ∧ − y_19_1 + y_19_1 ≤ 0 ∧ y_19_1 − y_19_1 ≤ 0 ∧ − y_19_0 + y_19_0 ≤ 0 ∧ y_19_0 − y_19_0 ≤ 0 ∧ − x_SLAM_f_18_post + x_SLAM_f_18_post ≤ 0 ∧ x_SLAM_f_18_post − x_SLAM_f_18_post ≤ 0 ∧ − x_SLAM_f_18_2 + x_SLAM_f_18_2 ≤ 0 ∧ x_SLAM_f_18_2 − x_SLAM_f_18_2 ≤ 0 ∧ − x_SLAM_f_18_1 + x_SLAM_f_18_1 ≤ 0 ∧ x_SLAM_f_18_1 − x_SLAM_f_18_1 ≤ 0 ∧ − x_SLAM_f_18_0 + x_SLAM_f_18_0 ≤ 0 ∧ x_SLAM_f_18_0 − x_SLAM_f_18_0 ≤ 0 ∧ − x_34_post + x_34_post ≤ 0 ∧ x_34_post − x_34_post ≤ 0 ∧ − x_34_1 + x_34_1 ≤ 0 ∧ x_34_1 − x_34_1 ≤ 0 ∧ − x_34_0 + x_34_0 ≤ 0 ∧ x_34_0 − x_34_0 ≤ 0 ∧ − x_28_post + x_28_post ≤ 0 ∧ x_28_post − x_28_post ≤ 0 ∧ − x_28_1 + x_28_1 ≤ 0 ∧ x_28_1 − x_28_1 ≤ 0 ∧ − x_28_0 + x_28_0 ≤ 0 ∧ x_28_0 − x_28_0 ≤ 0 ∧ − x_20_post + x_20_post ≤ 0 ∧ x_20_post − x_20_post ≤ 0 ∧ − x_20_2 + x_20_2 ≤ 0 ∧ x_20_2 − x_20_2 ≤ 0 ∧ − x_20_1 + x_20_1 ≤ 0 ∧ x_20_1 − x_20_1 ≤ 0 ∧ − x_20_0 + x_20_0 ≤ 0 ∧ x_20_0 − x_20_0 ≤ 0 ∧ − x_177_post + x_177_post ≤ 0 ∧ x_177_post − x_177_post ≤ 0 ∧ − x_177_0 + x_177_0 ≤ 0 ∧ x_177_0 − x_177_0 ≤ 0 ∧ − x_16_post + x_16_post ≤ 0 ∧ x_16_post − x_16_post ≤ 0 ∧ − x_16_1 + x_16_1 ≤ 0 ∧ x_16_1 − x_16_1 ≤ 0 ∧ − x_16_0 + x_16_0 ≤ 0 ∧ x_16_0 − x_16_0 ≤ 0 ∧ − tmp_48_post + tmp_48_post ≤ 0 ∧ tmp_48_post − tmp_48_post ≤ 0 ∧ − tmp_48_0 + tmp_48_0 ≤ 0 ∧ tmp_48_0 − tmp_48_0 ≤ 0 ∧ − temp_49_post + temp_49_post ≤ 0 ∧ temp_49_post − temp_49_post ≤ 0 ∧ − temp_49_0 + temp_49_0 ≤ 0 ∧ temp_49_0 − temp_49_0 ≤ 0 ∧ − temp0_45_post + temp0_45_post ≤ 0 ∧ temp0_45_post − temp0_45_post ≤ 0 ∧ − temp0_45_1 + temp0_45_1 ≤ 0 ∧ temp0_45_1 − temp0_45_1 ≤ 0 ∧ − temp0_45_0 + temp0_45_0 ≤ 0 ∧ temp0_45_0 − temp0_45_0 ≤ 0 ∧ − temp0_32_post + temp0_32_post ≤ 0 ∧ temp0_32_post − temp0_32_post ≤ 0 ∧ − temp0_32_4 + temp0_32_4 ≤ 0 ∧ temp0_32_4 − temp0_32_4 ≤ 0 ∧ − temp0_32_3 + temp0_32_3 ≤ 0 ∧ temp0_32_3 − temp0_32_3 ≤ 0 ∧ − temp0_32_2 + temp0_32_2 ≤ 0 ∧ temp0_32_2 − temp0_32_2 ≤ 0 ∧ − temp0_32_1 + temp0_32_1 ≤ 0 ∧ temp0_32_1 − temp0_32_1 ≤ 0 ∧ − temp0_32_0 + temp0_32_0 ≤ 0 ∧ temp0_32_0 − temp0_32_0 ≤ 0 ∧ − temp0_15_0 + temp0_15_0 ≤ 0 ∧ temp0_15_0 − temp0_15_0 ≤ 0 ∧ − t_23_post + t_23_post ≤ 0 ∧ t_23_post − t_23_post ≤ 0 ∧ − t_23_1 + t_23_1 ≤ 0 ∧ t_23_1 − t_23_1 ≤ 0 ∧ − t_23_0 + t_23_0 ≤ 0 ∧ t_23_0 − t_23_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_1 + result_dot_printf_sdv_special_RETURN_VALUE_41_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_1 − result_dot_printf_sdv_special_RETURN_VALUE_41_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_post + result_dot_printf_sdv_special_RETURN_VALUE_38_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_post − result_dot_printf_sdv_special_RETURN_VALUE_38_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_1 + result_dot_printf_sdv_special_RETURN_VALUE_38_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_1 − result_dot_printf_sdv_special_RETURN_VALUE_38_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_0 + result_dot_printf_sdv_special_RETURN_VALUE_38_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_0 − result_dot_printf_sdv_special_RETURN_VALUE_38_0 ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_1 + result_dot_nondet_sdv_special_RETURN_VALUE_13_1 ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_1 − result_dot_nondet_sdv_special_RETURN_VALUE_13_1 ≤ 0 ∧ − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post + result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post ≤ 0 ∧ result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post ≤ 0 ∧ − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 + result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 ≤ 0 ∧ result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 ≤ 0 ∧ − result_11_post + result_11_post ≤ 0 ∧ result_11_post − result_11_post ≤ 0 ∧ − result_11_6 + result_11_6 ≤ 0 ∧ result_11_6 − result_11_6 ≤ 0 ∧ − result_11_5 + result_11_5 ≤ 0 ∧ result_11_5 − result_11_5 ≤ 0 ∧ − result_11_4 + result_11_4 ≤ 0 ∧ result_11_4 − result_11_4 ≤ 0 ∧ − result_11_3 + result_11_3 ≤ 0 ∧ result_11_3 − result_11_3 ≤ 0 ∧ − result_11_2 + result_11_2 ≤ 0 ∧ result_11_2 − result_11_2 ≤ 0 ∧ − result_11_1 + result_11_1 ≤ 0 ∧ result_11_1 − result_11_1 ≤ 0 ∧ − result_11_0 + result_11_0 ≤ 0 ∧ result_11_0 − result_11_0 ≤ 0 ∧ − rcd_72_post + rcd_72_post ≤ 0 ∧ rcd_72_post − rcd_72_post ≤ 0 ∧ − rcd_72_0 + rcd_72_0 ≤ 0 ∧ rcd_72_0 − rcd_72_0 ≤ 0 ∧ − rcd_102_post + rcd_102_post ≤ 0 ∧ rcd_102_post − rcd_102_post ≤ 0 ∧ − rcd_102_0 + rcd_102_0 ≤ 0 ∧ rcd_102_0 − rcd_102_0 ≤ 0 ∧ − r_161_post + r_161_post ≤ 0 ∧ r_161_post − r_161_post ≤ 0 ∧ − r_161_0 + r_161_0 ≤ 0 ∧ r_161_0 − r_161_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 ≤ 0 ∧ − nondet_12_post + nondet_12_post ≤ 0 ∧ nondet_12_post − nondet_12_post ≤ 0 ∧ − nondet_12_1 + nondet_12_1 ≤ 0 ∧ nondet_12_1 − nondet_12_1 ≤ 0 ∧ − nondet_12_0 + nondet_12_0 ≤ 0 ∧ nondet_12_0 − nondet_12_0 ≤ 0 ∧ − lt_37_post + lt_37_post ≤ 0 ∧ lt_37_post − lt_37_post ≤ 0 ∧ − lt_37_1 + lt_37_1 ≤ 0 ∧ lt_37_1 − lt_37_1 ≤ 0 ∧ − lt_37_0 + lt_37_0 ≤ 0 ∧ lt_37_0 − lt_37_0 ≤ 0 ∧ − lt_36_post + lt_36_post ≤ 0 ∧ lt_36_post − lt_36_post ≤ 0 ∧ − lt_36_0 + lt_36_0 ≤ 0 ∧ lt_36_0 − lt_36_0 ≤ 0 ∧ − length_43_post + length_43_post ≤ 0 ∧ length_43_post − length_43_post ≤ 0 ∧ − length_43_0 + length_43_0 ≤ 0 ∧ length_43_0 − length_43_0 ≤ 0 ∧ − len_246_post + len_246_post ≤ 0 ∧ len_246_post − len_246_post ≤ 0 ∧ − len_246_0 + len_246_0 ≤ 0 ∧ len_246_0 − len_246_0 ≤ 0 ∧ − len_180_post + len_180_post ≤ 0 ∧ len_180_post − len_180_post ≤ 0 ∧ − len_180_0 + len_180_0 ≤ 0 ∧ len_180_0 − len_180_0 ≤ 0 ∧ − i_44_post + i_44_post ≤ 0 ∧ i_44_post − i_44_post ≤ 0 ∧ − i_44_0 + i_44_0 ≤ 0 ∧ i_44_0 − i_44_0 ≤ 0 ∧ − i_125_post + i_125_post ≤ 0 ∧ i_125_post − i_125_post ≤ 0 ∧ − i_125_0 + i_125_0 ≤ 0 ∧ i_125_0 − i_125_0 ≤ 0 ∧ − i_108_post + i_108_post ≤ 0 ∧ i_108_post − i_108_post ≤ 0 ∧ − i_108_0 + i_108_0 ≤ 0 ∧ i_108_0 − i_108_0 ≤ 0 ∧ − head_46_post + head_46_post ≤ 0 ∧ head_46_post − head_46_post ≤ 0 ∧ − head_46_0 + head_46_0 ≤ 0 ∧ head_46_0 − head_46_0 ≤ 0 ∧ − fmt_31_post + fmt_31_post ≤ 0 ∧ fmt_31_post − fmt_31_post ≤ 0 ∧ − fmt_31_4 + fmt_31_4 ≤ 0 ∧ fmt_31_4 − fmt_31_4 ≤ 0 ∧ − fmt_31_3 + fmt_31_3 ≤ 0 ∧ fmt_31_3 − fmt_31_3 ≤ 0 ∧ − fmt_31_2 + fmt_31_2 ≤ 0 ∧ fmt_31_2 − fmt_31_2 ≤ 0 ∧ − fmt_31_1 + fmt_31_1 ≤ 0 ∧ fmt_31_1 − fmt_31_1 ≤ 0 ∧ − fmt_31_0 + fmt_31_0 ≤ 0 ∧ fmt_31_0 − fmt_31_0 ≤ 0 ∧ − ct_17_post + ct_17_post ≤ 0 ∧ ct_17_post − ct_17_post ≤ 0 ∧ − ct_17_2 + ct_17_2 ≤ 0 ∧ ct_17_2 − ct_17_2 ≤ 0 ∧ − ct_17_1 + ct_17_1 ≤ 0 ∧ ct_17_1 − ct_17_1 ≤ 0 ∧ − ct_17_0 + ct_17_0 ≤ 0 ∧ ct_17_0 − ct_17_0 ≤ 0 ∧ − a_328_post + a_328_post ≤ 0 ∧ a_328_post − a_328_post ≤ 0 ∧ − a_328_0 + a_328_0 ≤ 0 ∧ a_328_0 − a_328_0 ≤ 0 ∧ − a_305_post + a_305_post ≤ 0 ∧ a_305_post − a_305_post ≤ 0 ∧ − a_305_0 + a_305_0 ≤ 0 ∧ a_305_0 − a_305_0 ≤ 0 ∧ − a_283_post + a_283_post ≤ 0 ∧ a_283_post − a_283_post ≤ 0 ∧ − a_283_0 + a_283_0 ≤ 0 ∧ a_283_0 − a_283_0 ≤ 0 ∧ − a_26_1 + a_26_1 ≤ 0 ∧ a_26_1 − a_26_1 ≤ 0 ∧ − a_247_post + a_247_post ≤ 0 ∧ a_247_post − a_247_post ≤ 0 ∧ − a_247_0 + a_247_0 ≤ 0 ∧ a_247_0 − a_247_0 ≤ 0 ∧ − a_197_post + a_197_post ≤ 0 ∧ a_197_post − a_197_post ≤ 0 ∧ − a_197_0 + a_197_0 ≤ 0 ∧ a_197_0 − a_197_0 ≤ 0 ∧ − a_146_0 + a_146_0 ≤ 0 ∧ a_146_0 − a_146_0 ≤ 0 | |
| 43 | 64 | 44: | 1 − x_28_0 ≤ 0 ∧ − y_19_post + y_19_post ≤ 0 ∧ y_19_post − y_19_post ≤ 0 ∧ − y_19_2 + y_19_2 ≤ 0 ∧ y_19_2 − y_19_2 ≤ 0 ∧ − y_19_1 + y_19_1 ≤ 0 ∧ y_19_1 − y_19_1 ≤ 0 ∧ − y_19_0 + y_19_0 ≤ 0 ∧ y_19_0 − y_19_0 ≤ 0 ∧ − x_SLAM_f_18_post + x_SLAM_f_18_post ≤ 0 ∧ x_SLAM_f_18_post − x_SLAM_f_18_post ≤ 0 ∧ − x_SLAM_f_18_2 + x_SLAM_f_18_2 ≤ 0 ∧ x_SLAM_f_18_2 − x_SLAM_f_18_2 ≤ 0 ∧ − x_SLAM_f_18_1 + x_SLAM_f_18_1 ≤ 0 ∧ x_SLAM_f_18_1 − x_SLAM_f_18_1 ≤ 0 ∧ − x_SLAM_f_18_0 + x_SLAM_f_18_0 ≤ 0 ∧ x_SLAM_f_18_0 − x_SLAM_f_18_0 ≤ 0 ∧ − x_34_post + x_34_post ≤ 0 ∧ x_34_post − x_34_post ≤ 0 ∧ − x_34_1 + x_34_1 ≤ 0 ∧ x_34_1 − x_34_1 ≤ 0 ∧ − x_34_0 + x_34_0 ≤ 0 ∧ x_34_0 − x_34_0 ≤ 0 ∧ − x_28_post + x_28_post ≤ 0 ∧ x_28_post − x_28_post ≤ 0 ∧ − x_28_1 + x_28_1 ≤ 0 ∧ x_28_1 − x_28_1 ≤ 0 ∧ − x_28_0 + x_28_0 ≤ 0 ∧ x_28_0 − x_28_0 ≤ 0 ∧ − x_238_post + x_238_post ≤ 0 ∧ x_238_post − x_238_post ≤ 0 ∧ − x_238_0 + x_238_0 ≤ 0 ∧ x_238_0 − x_238_0 ≤ 0 ∧ − x_20_post + x_20_post ≤ 0 ∧ x_20_post − x_20_post ≤ 0 ∧ − x_20_2 + x_20_2 ≤ 0 ∧ x_20_2 − x_20_2 ≤ 0 ∧ − x_20_1 + x_20_1 ≤ 0 ∧ x_20_1 − x_20_1 ≤ 0 ∧ − x_20_0 + x_20_0 ≤ 0 ∧ x_20_0 − x_20_0 ≤ 0 ∧ − x_177_post + x_177_post ≤ 0 ∧ x_177_post − x_177_post ≤ 0 ∧ − x_177_0 + x_177_0 ≤ 0 ∧ x_177_0 − x_177_0 ≤ 0 ∧ − x_16_post + x_16_post ≤ 0 ∧ x_16_post − x_16_post ≤ 0 ∧ − x_16_1 + x_16_1 ≤ 0 ∧ x_16_1 − x_16_1 ≤ 0 ∧ − x_16_0 + x_16_0 ≤ 0 ∧ x_16_0 − x_16_0 ≤ 0 ∧ − x_14_post + x_14_post ≤ 0 ∧ x_14_post − x_14_post ≤ 0 ∧ − x_14_0 + x_14_0 ≤ 0 ∧ x_14_0 − x_14_0 ≤ 0 ∧ − tmp_48_post + tmp_48_post ≤ 0 ∧ tmp_48_post − tmp_48_post ≤ 0 ∧ − tmp_48_0 + tmp_48_0 ≤ 0 ∧ tmp_48_0 − tmp_48_0 ≤ 0 ∧ − temp_49_post + temp_49_post ≤ 0 ∧ temp_49_post − temp_49_post ≤ 0 ∧ − temp_49_0 + temp_49_0 ≤ 0 ∧ temp_49_0 − temp_49_0 ≤ 0 ∧ − temp0_45_post + temp0_45_post ≤ 0 ∧ temp0_45_post − temp0_45_post ≤ 0 ∧ − temp0_45_1 + temp0_45_1 ≤ 0 ∧ temp0_45_1 − temp0_45_1 ≤ 0 ∧ − temp0_45_0 + temp0_45_0 ≤ 0 ∧ temp0_45_0 − temp0_45_0 ≤ 0 ∧ − temp0_32_post + temp0_32_post ≤ 0 ∧ temp0_32_post − temp0_32_post ≤ 0 ∧ − temp0_32_4 + temp0_32_4 ≤ 0 ∧ temp0_32_4 − temp0_32_4 ≤ 0 ∧ − temp0_32_3 + temp0_32_3 ≤ 0 ∧ temp0_32_3 − temp0_32_3 ≤ 0 ∧ − temp0_32_2 + temp0_32_2 ≤ 0 ∧ temp0_32_2 − temp0_32_2 ≤ 0 ∧ − temp0_32_1 + temp0_32_1 ≤ 0 ∧ temp0_32_1 − temp0_32_1 ≤ 0 ∧ − temp0_32_0 + temp0_32_0 ≤ 0 ∧ temp0_32_0 − temp0_32_0 ≤ 0 ∧ − temp0_15_0 + temp0_15_0 ≤ 0 ∧ temp0_15_0 − temp0_15_0 ≤ 0 ∧ − t_23_post + t_23_post ≤ 0 ∧ t_23_post − t_23_post ≤ 0 ∧ − t_23_1 + t_23_1 ≤ 0 ∧ t_23_1 − t_23_1 ≤ 0 ∧ − t_23_0 + t_23_0 ≤ 0 ∧ t_23_0 − t_23_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_post + result_dot_printf_sdv_special_RETURN_VALUE_41_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_post − result_dot_printf_sdv_special_RETURN_VALUE_41_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_1 + result_dot_printf_sdv_special_RETURN_VALUE_41_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_1 − result_dot_printf_sdv_special_RETURN_VALUE_41_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_0 + result_dot_printf_sdv_special_RETURN_VALUE_41_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_0 − result_dot_printf_sdv_special_RETURN_VALUE_41_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_post + result_dot_printf_sdv_special_RETURN_VALUE_38_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_post − result_dot_printf_sdv_special_RETURN_VALUE_38_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_1 + result_dot_printf_sdv_special_RETURN_VALUE_38_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_1 − result_dot_printf_sdv_special_RETURN_VALUE_38_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_0 + result_dot_printf_sdv_special_RETURN_VALUE_38_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_0 − result_dot_printf_sdv_special_RETURN_VALUE_38_0 ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_post + result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_post − result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_1 + result_dot_nondet_sdv_special_RETURN_VALUE_13_1 ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_1 − result_dot_nondet_sdv_special_RETURN_VALUE_13_1 ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_0 + result_dot_nondet_sdv_special_RETURN_VALUE_13_0 ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_0 − result_dot_nondet_sdv_special_RETURN_VALUE_13_0 ≤ 0 ∧ − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post + result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post ≤ 0 ∧ result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post ≤ 0 ∧ − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 + result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 ≤ 0 ∧ result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 ≤ 0 ∧ − result_11_post + result_11_post ≤ 0 ∧ result_11_post − result_11_post ≤ 0 ∧ − result_11_6 + result_11_6 ≤ 0 ∧ result_11_6 − result_11_6 ≤ 0 ∧ − result_11_5 + result_11_5 ≤ 0 ∧ result_11_5 − result_11_5 ≤ 0 ∧ − result_11_4 + result_11_4 ≤ 0 ∧ result_11_4 − result_11_4 ≤ 0 ∧ − result_11_3 + result_11_3 ≤ 0 ∧ result_11_3 − result_11_3 ≤ 0 ∧ − result_11_2 + result_11_2 ≤ 0 ∧ result_11_2 − result_11_2 ≤ 0 ∧ − result_11_1 + result_11_1 ≤ 0 ∧ result_11_1 − result_11_1 ≤ 0 ∧ − result_11_0 + result_11_0 ≤ 0 ∧ result_11_0 − result_11_0 ≤ 0 ∧ − rcd_72_post + rcd_72_post ≤ 0 ∧ rcd_72_post − rcd_72_post ≤ 0 ∧ − rcd_72_0 + rcd_72_0 ≤ 0 ∧ rcd_72_0 − rcd_72_0 ≤ 0 ∧ − rcd_102_post + rcd_102_post ≤ 0 ∧ rcd_102_post − rcd_102_post ≤ 0 ∧ − rcd_102_0 + rcd_102_0 ≤ 0 ∧ rcd_102_0 − rcd_102_0 ≤ 0 ∧ − r_53_post + r_53_post ≤ 0 ∧ r_53_post − r_53_post ≤ 0 ∧ − r_53_0 + r_53_0 ≤ 0 ∧ r_53_0 − r_53_0 ≤ 0 ∧ − r_161_post + r_161_post ≤ 0 ∧ r_161_post − r_161_post ≤ 0 ∧ − r_161_0 + r_161_0 ≤ 0 ∧ r_161_0 − r_161_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 ≤ 0 ∧ − nondet_12_post + nondet_12_post ≤ 0 ∧ nondet_12_post − nondet_12_post ≤ 0 ∧ − nondet_12_1 + nondet_12_1 ≤ 0 ∧ nondet_12_1 − nondet_12_1 ≤ 0 ∧ − nondet_12_0 + nondet_12_0 ≤ 0 ∧ nondet_12_0 − nondet_12_0 ≤ 0 ∧ − lt_37_post + lt_37_post ≤ 0 ∧ lt_37_post − lt_37_post ≤ 0 ∧ − lt_37_1 + lt_37_1 ≤ 0 ∧ lt_37_1 − lt_37_1 ≤ 0 ∧ − lt_37_0 + lt_37_0 ≤ 0 ∧ lt_37_0 − lt_37_0 ≤ 0 ∧ − lt_36_post + lt_36_post ≤ 0 ∧ lt_36_post − lt_36_post ≤ 0 ∧ − lt_36_0 + lt_36_0 ≤ 0 ∧ lt_36_0 − lt_36_0 ≤ 0 ∧ − lt_237_post + lt_237_post ≤ 0 ∧ lt_237_post − lt_237_post ≤ 0 ∧ − lt_237_0 + lt_237_0 ≤ 0 ∧ lt_237_0 − lt_237_0 ≤ 0 ∧ − length_43_post + length_43_post ≤ 0 ∧ length_43_post − length_43_post ≤ 0 ∧ − length_43_0 + length_43_0 ≤ 0 ∧ length_43_0 − length_43_0 ≤ 0 ∧ − len_246_post + len_246_post ≤ 0 ∧ len_246_post − len_246_post ≤ 0 ∧ − len_246_0 + len_246_0 ≤ 0 ∧ len_246_0 − len_246_0 ≤ 0 ∧ − len_180_post + len_180_post ≤ 0 ∧ len_180_post − len_180_post ≤ 0 ∧ − len_180_0 + len_180_0 ≤ 0 ∧ len_180_0 − len_180_0 ≤ 0 ∧ − i_44_post + i_44_post ≤ 0 ∧ i_44_post − i_44_post ≤ 0 ∧ − i_44_0 + i_44_0 ≤ 0 ∧ i_44_0 − i_44_0 ≤ 0 ∧ − i_125_post + i_125_post ≤ 0 ∧ i_125_post − i_125_post ≤ 0 ∧ − i_125_0 + i_125_0 ≤ 0 ∧ i_125_0 − i_125_0 ≤ 0 ∧ − i_108_post + i_108_post ≤ 0 ∧ i_108_post − i_108_post ≤ 0 ∧ − i_108_0 + i_108_0 ≤ 0 ∧ i_108_0 − i_108_0 ≤ 0 ∧ − head_46_post + head_46_post ≤ 0 ∧ head_46_post − head_46_post ≤ 0 ∧ − head_46_0 + head_46_0 ≤ 0 ∧ head_46_0 − head_46_0 ≤ 0 ∧ − fmt_31_post + fmt_31_post ≤ 0 ∧ fmt_31_post − fmt_31_post ≤ 0 ∧ − fmt_31_4 + fmt_31_4 ≤ 0 ∧ fmt_31_4 − fmt_31_4 ≤ 0 ∧ − fmt_31_3 + fmt_31_3 ≤ 0 ∧ fmt_31_3 − fmt_31_3 ≤ 0 ∧ − fmt_31_2 + fmt_31_2 ≤ 0 ∧ fmt_31_2 − fmt_31_2 ≤ 0 ∧ − fmt_31_1 + fmt_31_1 ≤ 0 ∧ fmt_31_1 − fmt_31_1 ≤ 0 ∧ − fmt_31_0 + fmt_31_0 ≤ 0 ∧ fmt_31_0 − fmt_31_0 ≤ 0 ∧ − ct_17_post + ct_17_post ≤ 0 ∧ ct_17_post − ct_17_post ≤ 0 ∧ − ct_17_2 + ct_17_2 ≤ 0 ∧ ct_17_2 − ct_17_2 ≤ 0 ∧ − ct_17_1 + ct_17_1 ≤ 0 ∧ ct_17_1 − ct_17_1 ≤ 0 ∧ − ct_17_0 + ct_17_0 ≤ 0 ∧ ct_17_0 − ct_17_0 ≤ 0 ∧ − a_328_post + a_328_post ≤ 0 ∧ a_328_post − a_328_post ≤ 0 ∧ − a_328_0 + a_328_0 ≤ 0 ∧ a_328_0 − a_328_0 ≤ 0 ∧ − a_305_post + a_305_post ≤ 0 ∧ a_305_post − a_305_post ≤ 0 ∧ − a_305_0 + a_305_0 ≤ 0 ∧ a_305_0 − a_305_0 ≤ 0 ∧ − a_283_post + a_283_post ≤ 0 ∧ a_283_post − a_283_post ≤ 0 ∧ − a_283_0 + a_283_0 ≤ 0 ∧ a_283_0 − a_283_0 ≤ 0 ∧ − a_26_post + a_26_post ≤ 0 ∧ a_26_post − a_26_post ≤ 0 ∧ − a_26_1 + a_26_1 ≤ 0 ∧ a_26_1 − a_26_1 ≤ 0 ∧ − a_26_0 + a_26_0 ≤ 0 ∧ a_26_0 − a_26_0 ≤ 0 ∧ − a_247_post + a_247_post ≤ 0 ∧ a_247_post − a_247_post ≤ 0 ∧ − a_247_0 + a_247_0 ≤ 0 ∧ a_247_0 − a_247_0 ≤ 0 ∧ − a_197_post + a_197_post ≤ 0 ∧ a_197_post − a_197_post ≤ 0 ∧ − a_197_0 + a_197_0 ≤ 0 ∧ a_197_0 − a_197_0 ≤ 0 ∧ − a_146_0 + a_146_0 ≤ 0 ∧ a_146_0 − a_146_0 ≤ 0 | |
| 43 | 65 | 44: | 1 + x_28_0 ≤ 0 ∧ − y_19_post + y_19_post ≤ 0 ∧ y_19_post − y_19_post ≤ 0 ∧ − y_19_2 + y_19_2 ≤ 0 ∧ y_19_2 − y_19_2 ≤ 0 ∧ − y_19_1 + y_19_1 ≤ 0 ∧ y_19_1 − y_19_1 ≤ 0 ∧ − y_19_0 + y_19_0 ≤ 0 ∧ y_19_0 − y_19_0 ≤ 0 ∧ − x_SLAM_f_18_post + x_SLAM_f_18_post ≤ 0 ∧ x_SLAM_f_18_post − x_SLAM_f_18_post ≤ 0 ∧ − x_SLAM_f_18_2 + x_SLAM_f_18_2 ≤ 0 ∧ x_SLAM_f_18_2 − x_SLAM_f_18_2 ≤ 0 ∧ − x_SLAM_f_18_1 + x_SLAM_f_18_1 ≤ 0 ∧ x_SLAM_f_18_1 − x_SLAM_f_18_1 ≤ 0 ∧ − x_SLAM_f_18_0 + x_SLAM_f_18_0 ≤ 0 ∧ x_SLAM_f_18_0 − x_SLAM_f_18_0 ≤ 0 ∧ − x_34_post + x_34_post ≤ 0 ∧ x_34_post − x_34_post ≤ 0 ∧ − x_34_1 + x_34_1 ≤ 0 ∧ x_34_1 − x_34_1 ≤ 0 ∧ − x_34_0 + x_34_0 ≤ 0 ∧ x_34_0 − x_34_0 ≤ 0 ∧ − x_28_post + x_28_post ≤ 0 ∧ x_28_post − x_28_post ≤ 0 ∧ − x_28_1 + x_28_1 ≤ 0 ∧ x_28_1 − x_28_1 ≤ 0 ∧ − x_28_0 + x_28_0 ≤ 0 ∧ x_28_0 − x_28_0 ≤ 0 ∧ − x_238_post + x_238_post ≤ 0 ∧ x_238_post − x_238_post ≤ 0 ∧ − x_238_0 + x_238_0 ≤ 0 ∧ x_238_0 − x_238_0 ≤ 0 ∧ − x_20_post + x_20_post ≤ 0 ∧ x_20_post − x_20_post ≤ 0 ∧ − x_20_2 + x_20_2 ≤ 0 ∧ x_20_2 − x_20_2 ≤ 0 ∧ − x_20_1 + x_20_1 ≤ 0 ∧ x_20_1 − x_20_1 ≤ 0 ∧ − x_20_0 + x_20_0 ≤ 0 ∧ x_20_0 − x_20_0 ≤ 0 ∧ − x_177_post + x_177_post ≤ 0 ∧ x_177_post − x_177_post ≤ 0 ∧ − x_177_0 + x_177_0 ≤ 0 ∧ x_177_0 − x_177_0 ≤ 0 ∧ − x_16_post + x_16_post ≤ 0 ∧ x_16_post − x_16_post ≤ 0 ∧ − x_16_1 + x_16_1 ≤ 0 ∧ x_16_1 − x_16_1 ≤ 0 ∧ − x_16_0 + x_16_0 ≤ 0 ∧ x_16_0 − x_16_0 ≤ 0 ∧ − x_14_post + x_14_post ≤ 0 ∧ x_14_post − x_14_post ≤ 0 ∧ − x_14_0 + x_14_0 ≤ 0 ∧ x_14_0 − x_14_0 ≤ 0 ∧ − tmp_48_post + tmp_48_post ≤ 0 ∧ tmp_48_post − tmp_48_post ≤ 0 ∧ − tmp_48_0 + tmp_48_0 ≤ 0 ∧ tmp_48_0 − tmp_48_0 ≤ 0 ∧ − temp_49_post + temp_49_post ≤ 0 ∧ temp_49_post − temp_49_post ≤ 0 ∧ − temp_49_0 + temp_49_0 ≤ 0 ∧ temp_49_0 − temp_49_0 ≤ 0 ∧ − temp0_45_post + temp0_45_post ≤ 0 ∧ temp0_45_post − temp0_45_post ≤ 0 ∧ − temp0_45_1 + temp0_45_1 ≤ 0 ∧ temp0_45_1 − temp0_45_1 ≤ 0 ∧ − temp0_45_0 + temp0_45_0 ≤ 0 ∧ temp0_45_0 − temp0_45_0 ≤ 0 ∧ − temp0_32_post + temp0_32_post ≤ 0 ∧ temp0_32_post − temp0_32_post ≤ 0 ∧ − temp0_32_4 + temp0_32_4 ≤ 0 ∧ temp0_32_4 − temp0_32_4 ≤ 0 ∧ − temp0_32_3 + temp0_32_3 ≤ 0 ∧ temp0_32_3 − temp0_32_3 ≤ 0 ∧ − temp0_32_2 + temp0_32_2 ≤ 0 ∧ temp0_32_2 − temp0_32_2 ≤ 0 ∧ − temp0_32_1 + temp0_32_1 ≤ 0 ∧ temp0_32_1 − temp0_32_1 ≤ 0 ∧ − temp0_32_0 + temp0_32_0 ≤ 0 ∧ temp0_32_0 − temp0_32_0 ≤ 0 ∧ − temp0_15_0 + temp0_15_0 ≤ 0 ∧ temp0_15_0 − temp0_15_0 ≤ 0 ∧ − t_23_post + t_23_post ≤ 0 ∧ t_23_post − t_23_post ≤ 0 ∧ − t_23_1 + t_23_1 ≤ 0 ∧ t_23_1 − t_23_1 ≤ 0 ∧ − t_23_0 + t_23_0 ≤ 0 ∧ t_23_0 − t_23_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_post + result_dot_printf_sdv_special_RETURN_VALUE_41_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_post − result_dot_printf_sdv_special_RETURN_VALUE_41_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_1 + result_dot_printf_sdv_special_RETURN_VALUE_41_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_1 − result_dot_printf_sdv_special_RETURN_VALUE_41_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_0 + result_dot_printf_sdv_special_RETURN_VALUE_41_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_0 − result_dot_printf_sdv_special_RETURN_VALUE_41_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_post + result_dot_printf_sdv_special_RETURN_VALUE_38_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_post − result_dot_printf_sdv_special_RETURN_VALUE_38_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_1 + result_dot_printf_sdv_special_RETURN_VALUE_38_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_1 − result_dot_printf_sdv_special_RETURN_VALUE_38_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_0 + result_dot_printf_sdv_special_RETURN_VALUE_38_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_0 − result_dot_printf_sdv_special_RETURN_VALUE_38_0 ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_post + result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_post − result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_1 + result_dot_nondet_sdv_special_RETURN_VALUE_13_1 ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_1 − result_dot_nondet_sdv_special_RETURN_VALUE_13_1 ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_0 + result_dot_nondet_sdv_special_RETURN_VALUE_13_0 ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_0 − result_dot_nondet_sdv_special_RETURN_VALUE_13_0 ≤ 0 ∧ − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post + result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post ≤ 0 ∧ result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post ≤ 0 ∧ − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 + result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 ≤ 0 ∧ result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 ≤ 0 ∧ − result_11_post + result_11_post ≤ 0 ∧ result_11_post − result_11_post ≤ 0 ∧ − result_11_6 + result_11_6 ≤ 0 ∧ result_11_6 − result_11_6 ≤ 0 ∧ − result_11_5 + result_11_5 ≤ 0 ∧ result_11_5 − result_11_5 ≤ 0 ∧ − result_11_4 + result_11_4 ≤ 0 ∧ result_11_4 − result_11_4 ≤ 0 ∧ − result_11_3 + result_11_3 ≤ 0 ∧ result_11_3 − result_11_3 ≤ 0 ∧ − result_11_2 + result_11_2 ≤ 0 ∧ result_11_2 − result_11_2 ≤ 0 ∧ − result_11_1 + result_11_1 ≤ 0 ∧ result_11_1 − result_11_1 ≤ 0 ∧ − result_11_0 + result_11_0 ≤ 0 ∧ result_11_0 − result_11_0 ≤ 0 ∧ − rcd_72_post + rcd_72_post ≤ 0 ∧ rcd_72_post − rcd_72_post ≤ 0 ∧ − rcd_72_0 + rcd_72_0 ≤ 0 ∧ rcd_72_0 − rcd_72_0 ≤ 0 ∧ − rcd_102_post + rcd_102_post ≤ 0 ∧ rcd_102_post − rcd_102_post ≤ 0 ∧ − rcd_102_0 + rcd_102_0 ≤ 0 ∧ rcd_102_0 − rcd_102_0 ≤ 0 ∧ − r_53_post + r_53_post ≤ 0 ∧ r_53_post − r_53_post ≤ 0 ∧ − r_53_0 + r_53_0 ≤ 0 ∧ r_53_0 − r_53_0 ≤ 0 ∧ − r_161_post + r_161_post ≤ 0 ∧ r_161_post − r_161_post ≤ 0 ∧ − r_161_0 + r_161_0 ≤ 0 ∧ r_161_0 − r_161_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 ≤ 0 ∧ − nondet_12_post + nondet_12_post ≤ 0 ∧ nondet_12_post − nondet_12_post ≤ 0 ∧ − nondet_12_1 + nondet_12_1 ≤ 0 ∧ nondet_12_1 − nondet_12_1 ≤ 0 ∧ − nondet_12_0 + nondet_12_0 ≤ 0 ∧ nondet_12_0 − nondet_12_0 ≤ 0 ∧ − lt_37_post + lt_37_post ≤ 0 ∧ lt_37_post − lt_37_post ≤ 0 ∧ − lt_37_1 + lt_37_1 ≤ 0 ∧ lt_37_1 − lt_37_1 ≤ 0 ∧ − lt_37_0 + lt_37_0 ≤ 0 ∧ lt_37_0 − lt_37_0 ≤ 0 ∧ − lt_36_post + lt_36_post ≤ 0 ∧ lt_36_post − lt_36_post ≤ 0 ∧ − lt_36_0 + lt_36_0 ≤ 0 ∧ lt_36_0 − lt_36_0 ≤ 0 ∧ − lt_237_post + lt_237_post ≤ 0 ∧ lt_237_post − lt_237_post ≤ 0 ∧ − lt_237_0 + lt_237_0 ≤ 0 ∧ lt_237_0 − lt_237_0 ≤ 0 ∧ − length_43_post + length_43_post ≤ 0 ∧ length_43_post − length_43_post ≤ 0 ∧ − length_43_0 + length_43_0 ≤ 0 ∧ length_43_0 − length_43_0 ≤ 0 ∧ − len_246_post + len_246_post ≤ 0 ∧ len_246_post − len_246_post ≤ 0 ∧ − len_246_0 + len_246_0 ≤ 0 ∧ len_246_0 − len_246_0 ≤ 0 ∧ − len_180_post + len_180_post ≤ 0 ∧ len_180_post − len_180_post ≤ 0 ∧ − len_180_0 + len_180_0 ≤ 0 ∧ len_180_0 − len_180_0 ≤ 0 ∧ − i_44_post + i_44_post ≤ 0 ∧ i_44_post − i_44_post ≤ 0 ∧ − i_44_0 + i_44_0 ≤ 0 ∧ i_44_0 − i_44_0 ≤ 0 ∧ − i_125_post + i_125_post ≤ 0 ∧ i_125_post − i_125_post ≤ 0 ∧ − i_125_0 + i_125_0 ≤ 0 ∧ i_125_0 − i_125_0 ≤ 0 ∧ − i_108_post + i_108_post ≤ 0 ∧ i_108_post − i_108_post ≤ 0 ∧ − i_108_0 + i_108_0 ≤ 0 ∧ i_108_0 − i_108_0 ≤ 0 ∧ − head_46_post + head_46_post ≤ 0 ∧ head_46_post − head_46_post ≤ 0 ∧ − head_46_0 + head_46_0 ≤ 0 ∧ head_46_0 − head_46_0 ≤ 0 ∧ − fmt_31_post + fmt_31_post ≤ 0 ∧ fmt_31_post − fmt_31_post ≤ 0 ∧ − fmt_31_4 + fmt_31_4 ≤ 0 ∧ fmt_31_4 − fmt_31_4 ≤ 0 ∧ − fmt_31_3 + fmt_31_3 ≤ 0 ∧ fmt_31_3 − fmt_31_3 ≤ 0 ∧ − fmt_31_2 + fmt_31_2 ≤ 0 ∧ fmt_31_2 − fmt_31_2 ≤ 0 ∧ − fmt_31_1 + fmt_31_1 ≤ 0 ∧ fmt_31_1 − fmt_31_1 ≤ 0 ∧ − fmt_31_0 + fmt_31_0 ≤ 0 ∧ fmt_31_0 − fmt_31_0 ≤ 0 ∧ − ct_17_post + ct_17_post ≤ 0 ∧ ct_17_post − ct_17_post ≤ 0 ∧ − ct_17_2 + ct_17_2 ≤ 0 ∧ ct_17_2 − ct_17_2 ≤ 0 ∧ − ct_17_1 + ct_17_1 ≤ 0 ∧ ct_17_1 − ct_17_1 ≤ 0 ∧ − ct_17_0 + ct_17_0 ≤ 0 ∧ ct_17_0 − ct_17_0 ≤ 0 ∧ − a_328_post + a_328_post ≤ 0 ∧ a_328_post − a_328_post ≤ 0 ∧ − a_328_0 + a_328_0 ≤ 0 ∧ a_328_0 − a_328_0 ≤ 0 ∧ − a_305_post + a_305_post ≤ 0 ∧ a_305_post − a_305_post ≤ 0 ∧ − a_305_0 + a_305_0 ≤ 0 ∧ a_305_0 − a_305_0 ≤ 0 ∧ − a_283_post + a_283_post ≤ 0 ∧ a_283_post − a_283_post ≤ 0 ∧ − a_283_0 + a_283_0 ≤ 0 ∧ a_283_0 − a_283_0 ≤ 0 ∧ − a_26_post + a_26_post ≤ 0 ∧ a_26_post − a_26_post ≤ 0 ∧ − a_26_1 + a_26_1 ≤ 0 ∧ a_26_1 − a_26_1 ≤ 0 ∧ − a_26_0 + a_26_0 ≤ 0 ∧ a_26_0 − a_26_0 ≤ 0 ∧ − a_247_post + a_247_post ≤ 0 ∧ a_247_post − a_247_post ≤ 0 ∧ − a_247_0 + a_247_0 ≤ 0 ∧ a_247_0 − a_247_0 ≤ 0 ∧ − a_197_post + a_197_post ≤ 0 ∧ a_197_post − a_197_post ≤ 0 ∧ − a_197_0 + a_197_0 ≤ 0 ∧ a_197_0 − a_197_0 ≤ 0 ∧ − a_146_0 + a_146_0 ≤ 0 ∧ a_146_0 − a_146_0 ≤ 0 | |
| 44 | 66 | 45: | 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ fmt_31_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post ≤ 0 ∧ − fmt_31_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post ≤ 0 ∧ temp0_32_1 ≤ 0 ∧ − temp0_32_1 ≤ 0 ∧ result_11_1 − temp0_32_1 ≤ 0 ∧ − result_11_1 + temp0_32_1 ≤ 0 ∧ − result_11_1 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post ≤ 0 ∧ result_11_1 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post ≤ 0 ∧ − x_28_0 + x_34_1 ≤ 0 ∧ x_28_0 − x_34_1 ≤ 0 ∧ fmt_31_3 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 ≤ 0 ∧ − fmt_31_3 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 ≤ 0 ∧ temp0_32_3 ≤ 0 ∧ − temp0_32_3 ≤ 0 ∧ result_11_3 − temp0_32_3 ≤ 0 ∧ − result_11_3 + temp0_32_3 ≤ 0 ∧ − result_11_3 + result_dot_printf_sdv_special_RETURN_VALUE_38_1 ≤ 0 ∧ result_11_3 − result_dot_printf_sdv_special_RETURN_VALUE_38_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_0 ≤ 0 ∧ 1 + len_180_0 − len_246_post ≤ 0 ∧ −1 − len_180_0 + len_246_post ≤ 0 ∧ − a_26_0 + x_14_0 ≤ 0 ∧ a_26_0 − x_14_0 ≤ 0 ∧ − lt_237_0 + x_28_0 ≤ 0 ∧ lt_237_0 − x_28_0 ≤ 0 ∧ 1 − a_197_0 + a_247_post ≤ 0 ∧ −1 + a_197_0 − a_247_post ≤ 0 ∧ a_247_0 − a_247_post ≤ 0 ∧ − a_247_0 + a_247_post ≤ 0 ∧ fmt_31_0 − fmt_31_post ≤ 0 ∧ − fmt_31_0 + fmt_31_post ≤ 0 ∧ len_246_0 − len_246_post ≤ 0 ∧ − len_246_0 + len_246_post ≤ 0 ∧ lt_36_0 − lt_36_post ≤ 0 ∧ − lt_36_0 + lt_36_post ≤ 0 ∧ lt_37_0 − lt_37_post ≤ 0 ∧ − lt_37_0 + lt_37_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post ≤ 0 ∧ result_11_0 − result_11_post ≤ 0 ∧ − result_11_0 + result_11_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_0 − result_dot_printf_sdv_special_RETURN_VALUE_38_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_0 + result_dot_printf_sdv_special_RETURN_VALUE_38_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post ≤ 0 ∧ temp0_32_0 − temp0_32_post ≤ 0 ∧ − temp0_32_0 + temp0_32_post ≤ 0 ∧ x_34_0 − x_34_post ≤ 0 ∧ − x_34_0 + x_34_post ≤ 0 ∧ − y_19_post + y_19_post ≤ 0 ∧ y_19_post − y_19_post ≤ 0 ∧ − y_19_2 + y_19_2 ≤ 0 ∧ y_19_2 − y_19_2 ≤ 0 ∧ − y_19_1 + y_19_1 ≤ 0 ∧ y_19_1 − y_19_1 ≤ 0 ∧ − y_19_0 + y_19_0 ≤ 0 ∧ y_19_0 − y_19_0 ≤ 0 ∧ − x_SLAM_f_18_post + x_SLAM_f_18_post ≤ 0 ∧ x_SLAM_f_18_post − x_SLAM_f_18_post ≤ 0 ∧ − x_SLAM_f_18_2 + x_SLAM_f_18_2 ≤ 0 ∧ x_SLAM_f_18_2 − x_SLAM_f_18_2 ≤ 0 ∧ − x_SLAM_f_18_1 + x_SLAM_f_18_1 ≤ 0 ∧ x_SLAM_f_18_1 − x_SLAM_f_18_1 ≤ 0 ∧ − x_SLAM_f_18_0 + x_SLAM_f_18_0 ≤ 0 ∧ x_SLAM_f_18_0 − x_SLAM_f_18_0 ≤ 0 ∧ − x_28_post + x_28_post ≤ 0 ∧ x_28_post − x_28_post ≤ 0 ∧ − x_28_1 + x_28_1 ≤ 0 ∧ x_28_1 − x_28_1 ≤ 0 ∧ − x_28_0 + x_28_0 ≤ 0 ∧ x_28_0 − x_28_0 ≤ 0 ∧ − x_238_post + x_238_post ≤ 0 ∧ x_238_post − x_238_post ≤ 0 ∧ − x_238_0 + x_238_0 ≤ 0 ∧ x_238_0 − x_238_0 ≤ 0 ∧ − x_20_post + x_20_post ≤ 0 ∧ x_20_post − x_20_post ≤ 0 ∧ − x_20_2 + x_20_2 ≤ 0 ∧ x_20_2 − x_20_2 ≤ 0 ∧ − x_20_1 + x_20_1 ≤ 0 ∧ x_20_1 − x_20_1 ≤ 0 ∧ − x_20_0 + x_20_0 ≤ 0 ∧ x_20_0 − x_20_0 ≤ 0 ∧ − x_177_post + x_177_post ≤ 0 ∧ x_177_post − x_177_post ≤ 0 ∧ − x_177_0 + x_177_0 ≤ 0 ∧ x_177_0 − x_177_0 ≤ 0 ∧ − x_16_post + x_16_post ≤ 0 ∧ x_16_post − x_16_post ≤ 0 ∧ − x_16_1 + x_16_1 ≤ 0 ∧ x_16_1 − x_16_1 ≤ 0 ∧ − x_16_0 + x_16_0 ≤ 0 ∧ x_16_0 − x_16_0 ≤ 0 ∧ − x_14_post + x_14_post ≤ 0 ∧ x_14_post − x_14_post ≤ 0 ∧ − x_14_0 + x_14_0 ≤ 0 ∧ x_14_0 − x_14_0 ≤ 0 ∧ − tmp_48_post + tmp_48_post ≤ 0 ∧ tmp_48_post − tmp_48_post ≤ 0 ∧ − tmp_48_0 + tmp_48_0 ≤ 0 ∧ tmp_48_0 − tmp_48_0 ≤ 0 ∧ − temp_49_post + temp_49_post ≤ 0 ∧ temp_49_post − temp_49_post ≤ 0 ∧ − temp_49_0 + temp_49_0 ≤ 0 ∧ temp_49_0 − temp_49_0 ≤ 0 ∧ − temp0_45_post + temp0_45_post ≤ 0 ∧ temp0_45_post − temp0_45_post ≤ 0 ∧ − temp0_45_1 + temp0_45_1 ≤ 0 ∧ temp0_45_1 − temp0_45_1 ≤ 0 ∧ − temp0_45_0 + temp0_45_0 ≤ 0 ∧ temp0_45_0 − temp0_45_0 ≤ 0 ∧ − temp0_15_0 + temp0_15_0 ≤ 0 ∧ temp0_15_0 − temp0_15_0 ≤ 0 ∧ − t_23_post + t_23_post ≤ 0 ∧ t_23_post − t_23_post ≤ 0 ∧ − t_23_1 + t_23_1 ≤ 0 ∧ t_23_1 − t_23_1 ≤ 0 ∧ − t_23_0 + t_23_0 ≤ 0 ∧ t_23_0 − t_23_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_post + result_dot_printf_sdv_special_RETURN_VALUE_41_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_post − result_dot_printf_sdv_special_RETURN_VALUE_41_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_1 + result_dot_printf_sdv_special_RETURN_VALUE_41_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_1 − result_dot_printf_sdv_special_RETURN_VALUE_41_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_0 + result_dot_printf_sdv_special_RETURN_VALUE_41_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_0 − result_dot_printf_sdv_special_RETURN_VALUE_41_0 ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_post + result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_post − result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_1 + result_dot_nondet_sdv_special_RETURN_VALUE_13_1 ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_1 − result_dot_nondet_sdv_special_RETURN_VALUE_13_1 ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_0 + result_dot_nondet_sdv_special_RETURN_VALUE_13_0 ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_0 − result_dot_nondet_sdv_special_RETURN_VALUE_13_0 ≤ 0 ∧ − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post + result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post ≤ 0 ∧ result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post ≤ 0 ∧ − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 + result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 ≤ 0 ∧ result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 ≤ 0 ∧ − result_11_6 + result_11_6 ≤ 0 ∧ result_11_6 − result_11_6 ≤ 0 ∧ − result_11_5 + result_11_5 ≤ 0 ∧ result_11_5 − result_11_5 ≤ 0 ∧ − result_11_4 + result_11_4 ≤ 0 ∧ result_11_4 − result_11_4 ≤ 0 ∧ − rcd_72_post + rcd_72_post ≤ 0 ∧ rcd_72_post − rcd_72_post ≤ 0 ∧ − rcd_72_0 + rcd_72_0 ≤ 0 ∧ rcd_72_0 − rcd_72_0 ≤ 0 ∧ − rcd_102_post + rcd_102_post ≤ 0 ∧ rcd_102_post − rcd_102_post ≤ 0 ∧ − rcd_102_0 + rcd_102_0 ≤ 0 ∧ rcd_102_0 − rcd_102_0 ≤ 0 ∧ − r_53_post + r_53_post ≤ 0 ∧ r_53_post − r_53_post ≤ 0 ∧ − r_53_0 + r_53_0 ≤ 0 ∧ r_53_0 − r_53_0 ≤ 0 ∧ − r_161_post + r_161_post ≤ 0 ∧ r_161_post − r_161_post ≤ 0 ∧ − r_161_0 + r_161_0 ≤ 0 ∧ r_161_0 − r_161_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 ≤ 0 ∧ − nondet_12_post + nondet_12_post ≤ 0 ∧ nondet_12_post − nondet_12_post ≤ 0 ∧ − nondet_12_1 + nondet_12_1 ≤ 0 ∧ nondet_12_1 − nondet_12_1 ≤ 0 ∧ − nondet_12_0 + nondet_12_0 ≤ 0 ∧ nondet_12_0 − nondet_12_0 ≤ 0 ∧ − lt_237_post + lt_237_post ≤ 0 ∧ lt_237_post − lt_237_post ≤ 0 ∧ − lt_237_0 + lt_237_0 ≤ 0 ∧ lt_237_0 − lt_237_0 ≤ 0 ∧ − length_43_post + length_43_post ≤ 0 ∧ length_43_post − length_43_post ≤ 0 ∧ − length_43_0 + length_43_0 ≤ 0 ∧ length_43_0 − length_43_0 ≤ 0 ∧ − len_180_post + len_180_post ≤ 0 ∧ len_180_post − len_180_post ≤ 0 ∧ − len_180_0 + len_180_0 ≤ 0 ∧ len_180_0 − len_180_0 ≤ 0 ∧ − i_44_post + i_44_post ≤ 0 ∧ i_44_post − i_44_post ≤ 0 ∧ − i_44_0 + i_44_0 ≤ 0 ∧ i_44_0 − i_44_0 ≤ 0 ∧ − i_125_post + i_125_post ≤ 0 ∧ i_125_post − i_125_post ≤ 0 ∧ − i_125_0 + i_125_0 ≤ 0 ∧ i_125_0 − i_125_0 ≤ 0 ∧ − i_108_post + i_108_post ≤ 0 ∧ i_108_post − i_108_post ≤ 0 ∧ − i_108_0 + i_108_0 ≤ 0 ∧ i_108_0 − i_108_0 ≤ 0 ∧ − head_46_post + head_46_post ≤ 0 ∧ head_46_post − head_46_post ≤ 0 ∧ − head_46_0 + head_46_0 ≤ 0 ∧ head_46_0 − head_46_0 ≤ 0 ∧ − ct_17_post + ct_17_post ≤ 0 ∧ ct_17_post − ct_17_post ≤ 0 ∧ − ct_17_2 + ct_17_2 ≤ 0 ∧ ct_17_2 − ct_17_2 ≤ 0 ∧ − ct_17_1 + ct_17_1 ≤ 0 ∧ ct_17_1 − ct_17_1 ≤ 0 ∧ − ct_17_0 + ct_17_0 ≤ 0 ∧ ct_17_0 − ct_17_0 ≤ 0 ∧ − a_328_post + a_328_post ≤ 0 ∧ a_328_post − a_328_post ≤ 0 ∧ − a_328_0 + a_328_0 ≤ 0 ∧ a_328_0 − a_328_0 ≤ 0 ∧ − a_305_post + a_305_post ≤ 0 ∧ a_305_post − a_305_post ≤ 0 ∧ − a_305_0 + a_305_0 ≤ 0 ∧ a_305_0 − a_305_0 ≤ 0 ∧ − a_283_post + a_283_post ≤ 0 ∧ a_283_post − a_283_post ≤ 0 ∧ − a_283_0 + a_283_0 ≤ 0 ∧ a_283_0 − a_283_0 ≤ 0 ∧ − a_26_post + a_26_post ≤ 0 ∧ a_26_post − a_26_post ≤ 0 ∧ − a_26_1 + a_26_1 ≤ 0 ∧ a_26_1 − a_26_1 ≤ 0 ∧ − a_26_0 + a_26_0 ≤ 0 ∧ a_26_0 − a_26_0 ≤ 0 ∧ − a_197_post + a_197_post ≤ 0 ∧ a_197_post − a_197_post ≤ 0 ∧ − a_197_0 + a_197_0 ≤ 0 ∧ a_197_0 − a_197_0 ≤ 0 ∧ − a_146_0 + a_146_0 ≤ 0 ∧ a_146_0 − a_146_0 ≤ 0 | |
| 45 | 67 | 46: | 1 − x_14_0 ≤ 0 ∧ − y_19_post + y_19_post ≤ 0 ∧ y_19_post − y_19_post ≤ 0 ∧ − y_19_2 + y_19_2 ≤ 0 ∧ y_19_2 − y_19_2 ≤ 0 ∧ − y_19_1 + y_19_1 ≤ 0 ∧ y_19_1 − y_19_1 ≤ 0 ∧ − y_19_0 + y_19_0 ≤ 0 ∧ y_19_0 − y_19_0 ≤ 0 ∧ − x_SLAM_f_18_post + x_SLAM_f_18_post ≤ 0 ∧ x_SLAM_f_18_post − x_SLAM_f_18_post ≤ 0 ∧ − x_SLAM_f_18_2 + x_SLAM_f_18_2 ≤ 0 ∧ x_SLAM_f_18_2 − x_SLAM_f_18_2 ≤ 0 ∧ − x_SLAM_f_18_1 + x_SLAM_f_18_1 ≤ 0 ∧ x_SLAM_f_18_1 − x_SLAM_f_18_1 ≤ 0 ∧ − x_SLAM_f_18_0 + x_SLAM_f_18_0 ≤ 0 ∧ x_SLAM_f_18_0 − x_SLAM_f_18_0 ≤ 0 ∧ − x_34_post + x_34_post ≤ 0 ∧ x_34_post − x_34_post ≤ 0 ∧ − x_34_1 + x_34_1 ≤ 0 ∧ x_34_1 − x_34_1 ≤ 0 ∧ − x_34_0 + x_34_0 ≤ 0 ∧ x_34_0 − x_34_0 ≤ 0 ∧ − x_28_post + x_28_post ≤ 0 ∧ x_28_post − x_28_post ≤ 0 ∧ − x_28_1 + x_28_1 ≤ 0 ∧ x_28_1 − x_28_1 ≤ 0 ∧ − x_28_0 + x_28_0 ≤ 0 ∧ x_28_0 − x_28_0 ≤ 0 ∧ − x_238_post + x_238_post ≤ 0 ∧ x_238_post − x_238_post ≤ 0 ∧ − x_238_0 + x_238_0 ≤ 0 ∧ x_238_0 − x_238_0 ≤ 0 ∧ − x_20_post + x_20_post ≤ 0 ∧ x_20_post − x_20_post ≤ 0 ∧ − x_20_2 + x_20_2 ≤ 0 ∧ x_20_2 − x_20_2 ≤ 0 ∧ − x_20_1 + x_20_1 ≤ 0 ∧ x_20_1 − x_20_1 ≤ 0 ∧ − x_20_0 + x_20_0 ≤ 0 ∧ x_20_0 − x_20_0 ≤ 0 ∧ − x_177_post + x_177_post ≤ 0 ∧ x_177_post − x_177_post ≤ 0 ∧ − x_177_0 + x_177_0 ≤ 0 ∧ x_177_0 − x_177_0 ≤ 0 ∧ − x_16_post + x_16_post ≤ 0 ∧ x_16_post − x_16_post ≤ 0 ∧ − x_16_1 + x_16_1 ≤ 0 ∧ x_16_1 − x_16_1 ≤ 0 ∧ − x_16_0 + x_16_0 ≤ 0 ∧ x_16_0 − x_16_0 ≤ 0 ∧ − x_14_post + x_14_post ≤ 0 ∧ x_14_post − x_14_post ≤ 0 ∧ − x_14_0 + x_14_0 ≤ 0 ∧ x_14_0 − x_14_0 ≤ 0 ∧ − tmp_48_post + tmp_48_post ≤ 0 ∧ tmp_48_post − tmp_48_post ≤ 0 ∧ − tmp_48_0 + tmp_48_0 ≤ 0 ∧ tmp_48_0 − tmp_48_0 ≤ 0 ∧ − temp_49_post + temp_49_post ≤ 0 ∧ temp_49_post − temp_49_post ≤ 0 ∧ − temp_49_0 + temp_49_0 ≤ 0 ∧ temp_49_0 − temp_49_0 ≤ 0 ∧ − temp0_45_post + temp0_45_post ≤ 0 ∧ temp0_45_post − temp0_45_post ≤ 0 ∧ − temp0_45_1 + temp0_45_1 ≤ 0 ∧ temp0_45_1 − temp0_45_1 ≤ 0 ∧ − temp0_45_0 + temp0_45_0 ≤ 0 ∧ temp0_45_0 − temp0_45_0 ≤ 0 ∧ − temp0_32_post + temp0_32_post ≤ 0 ∧ temp0_32_post − temp0_32_post ≤ 0 ∧ − temp0_32_4 + temp0_32_4 ≤ 0 ∧ temp0_32_4 − temp0_32_4 ≤ 0 ∧ − temp0_32_3 + temp0_32_3 ≤ 0 ∧ temp0_32_3 − temp0_32_3 ≤ 0 ∧ − temp0_32_2 + temp0_32_2 ≤ 0 ∧ temp0_32_2 − temp0_32_2 ≤ 0 ∧ − temp0_32_1 + temp0_32_1 ≤ 0 ∧ temp0_32_1 − temp0_32_1 ≤ 0 ∧ − temp0_32_0 + temp0_32_0 ≤ 0 ∧ temp0_32_0 − temp0_32_0 ≤ 0 ∧ − temp0_15_0 + temp0_15_0 ≤ 0 ∧ temp0_15_0 − temp0_15_0 ≤ 0 ∧ − t_23_post + t_23_post ≤ 0 ∧ t_23_post − t_23_post ≤ 0 ∧ − t_23_1 + t_23_1 ≤ 0 ∧ t_23_1 − t_23_1 ≤ 0 ∧ − t_23_0 + t_23_0 ≤ 0 ∧ t_23_0 − t_23_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_post + result_dot_printf_sdv_special_RETURN_VALUE_41_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_post − result_dot_printf_sdv_special_RETURN_VALUE_41_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_1 + result_dot_printf_sdv_special_RETURN_VALUE_41_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_1 − result_dot_printf_sdv_special_RETURN_VALUE_41_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_0 + result_dot_printf_sdv_special_RETURN_VALUE_41_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_0 − result_dot_printf_sdv_special_RETURN_VALUE_41_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_post + result_dot_printf_sdv_special_RETURN_VALUE_38_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_post − result_dot_printf_sdv_special_RETURN_VALUE_38_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_1 + result_dot_printf_sdv_special_RETURN_VALUE_38_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_1 − result_dot_printf_sdv_special_RETURN_VALUE_38_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_0 + result_dot_printf_sdv_special_RETURN_VALUE_38_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_0 − result_dot_printf_sdv_special_RETURN_VALUE_38_0 ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_post + result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_post − result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_1 + result_dot_nondet_sdv_special_RETURN_VALUE_13_1 ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_1 − result_dot_nondet_sdv_special_RETURN_VALUE_13_1 ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_0 + result_dot_nondet_sdv_special_RETURN_VALUE_13_0 ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_0 − result_dot_nondet_sdv_special_RETURN_VALUE_13_0 ≤ 0 ∧ − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post + result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post ≤ 0 ∧ result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post ≤ 0 ∧ − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 + result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 ≤ 0 ∧ result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 ≤ 0 ∧ − result_11_post + result_11_post ≤ 0 ∧ result_11_post − result_11_post ≤ 0 ∧ − result_11_6 + result_11_6 ≤ 0 ∧ result_11_6 − result_11_6 ≤ 0 ∧ − result_11_5 + result_11_5 ≤ 0 ∧ result_11_5 − result_11_5 ≤ 0 ∧ − result_11_4 + result_11_4 ≤ 0 ∧ result_11_4 − result_11_4 ≤ 0 ∧ − result_11_3 + result_11_3 ≤ 0 ∧ result_11_3 − result_11_3 ≤ 0 ∧ − result_11_2 + result_11_2 ≤ 0 ∧ result_11_2 − result_11_2 ≤ 0 ∧ − result_11_1 + result_11_1 ≤ 0 ∧ result_11_1 − result_11_1 ≤ 0 ∧ − result_11_0 + result_11_0 ≤ 0 ∧ result_11_0 − result_11_0 ≤ 0 ∧ − rcd_72_post + rcd_72_post ≤ 0 ∧ rcd_72_post − rcd_72_post ≤ 0 ∧ − rcd_72_0 + rcd_72_0 ≤ 0 ∧ rcd_72_0 − rcd_72_0 ≤ 0 ∧ − rcd_102_post + rcd_102_post ≤ 0 ∧ rcd_102_post − rcd_102_post ≤ 0 ∧ − rcd_102_0 + rcd_102_0 ≤ 0 ∧ rcd_102_0 − rcd_102_0 ≤ 0 ∧ − r_53_post + r_53_post ≤ 0 ∧ r_53_post − r_53_post ≤ 0 ∧ − r_53_0 + r_53_0 ≤ 0 ∧ r_53_0 − r_53_0 ≤ 0 ∧ − r_161_post + r_161_post ≤ 0 ∧ r_161_post − r_161_post ≤ 0 ∧ − r_161_0 + r_161_0 ≤ 0 ∧ r_161_0 − r_161_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 ≤ 0 ∧ − nondet_12_post + nondet_12_post ≤ 0 ∧ nondet_12_post − nondet_12_post ≤ 0 ∧ − nondet_12_1 + nondet_12_1 ≤ 0 ∧ nondet_12_1 − nondet_12_1 ≤ 0 ∧ − nondet_12_0 + nondet_12_0 ≤ 0 ∧ nondet_12_0 − nondet_12_0 ≤ 0 ∧ − lt_37_post + lt_37_post ≤ 0 ∧ lt_37_post − lt_37_post ≤ 0 ∧ − lt_37_1 + lt_37_1 ≤ 0 ∧ lt_37_1 − lt_37_1 ≤ 0 ∧ − lt_37_0 + lt_37_0 ≤ 0 ∧ lt_37_0 − lt_37_0 ≤ 0 ∧ − lt_36_post + lt_36_post ≤ 0 ∧ lt_36_post − lt_36_post ≤ 0 ∧ − lt_36_0 + lt_36_0 ≤ 0 ∧ lt_36_0 − lt_36_0 ≤ 0 ∧ − lt_237_post + lt_237_post ≤ 0 ∧ lt_237_post − lt_237_post ≤ 0 ∧ − lt_237_0 + lt_237_0 ≤ 0 ∧ lt_237_0 − lt_237_0 ≤ 0 ∧ − length_43_post + length_43_post ≤ 0 ∧ length_43_post − length_43_post ≤ 0 ∧ − length_43_0 + length_43_0 ≤ 0 ∧ length_43_0 − length_43_0 ≤ 0 ∧ − len_246_post + len_246_post ≤ 0 ∧ len_246_post − len_246_post ≤ 0 ∧ − len_246_0 + len_246_0 ≤ 0 ∧ len_246_0 − len_246_0 ≤ 0 ∧ − len_180_post + len_180_post ≤ 0 ∧ len_180_post − len_180_post ≤ 0 ∧ − len_180_0 + len_180_0 ≤ 0 ∧ len_180_0 − len_180_0 ≤ 0 ∧ − i_44_post + i_44_post ≤ 0 ∧ i_44_post − i_44_post ≤ 0 ∧ − i_44_0 + i_44_0 ≤ 0 ∧ i_44_0 − i_44_0 ≤ 0 ∧ − i_125_post + i_125_post ≤ 0 ∧ i_125_post − i_125_post ≤ 0 ∧ − i_125_0 + i_125_0 ≤ 0 ∧ i_125_0 − i_125_0 ≤ 0 ∧ − i_108_post + i_108_post ≤ 0 ∧ i_108_post − i_108_post ≤ 0 ∧ − i_108_0 + i_108_0 ≤ 0 ∧ i_108_0 − i_108_0 ≤ 0 ∧ − head_46_post + head_46_post ≤ 0 ∧ head_46_post − head_46_post ≤ 0 ∧ − head_46_0 + head_46_0 ≤ 0 ∧ head_46_0 − head_46_0 ≤ 0 ∧ − fmt_31_post + fmt_31_post ≤ 0 ∧ fmt_31_post − fmt_31_post ≤ 0 ∧ − fmt_31_4 + fmt_31_4 ≤ 0 ∧ fmt_31_4 − fmt_31_4 ≤ 0 ∧ − fmt_31_3 + fmt_31_3 ≤ 0 ∧ fmt_31_3 − fmt_31_3 ≤ 0 ∧ − fmt_31_2 + fmt_31_2 ≤ 0 ∧ fmt_31_2 − fmt_31_2 ≤ 0 ∧ − fmt_31_1 + fmt_31_1 ≤ 0 ∧ fmt_31_1 − fmt_31_1 ≤ 0 ∧ − fmt_31_0 + fmt_31_0 ≤ 0 ∧ fmt_31_0 − fmt_31_0 ≤ 0 ∧ − ct_17_post + ct_17_post ≤ 0 ∧ ct_17_post − ct_17_post ≤ 0 ∧ − ct_17_2 + ct_17_2 ≤ 0 ∧ ct_17_2 − ct_17_2 ≤ 0 ∧ − ct_17_1 + ct_17_1 ≤ 0 ∧ ct_17_1 − ct_17_1 ≤ 0 ∧ − ct_17_0 + ct_17_0 ≤ 0 ∧ ct_17_0 − ct_17_0 ≤ 0 ∧ − a_328_post + a_328_post ≤ 0 ∧ a_328_post − a_328_post ≤ 0 ∧ − a_328_0 + a_328_0 ≤ 0 ∧ a_328_0 − a_328_0 ≤ 0 ∧ − a_305_post + a_305_post ≤ 0 ∧ a_305_post − a_305_post ≤ 0 ∧ − a_305_0 + a_305_0 ≤ 0 ∧ a_305_0 − a_305_0 ≤ 0 ∧ − a_283_post + a_283_post ≤ 0 ∧ a_283_post − a_283_post ≤ 0 ∧ − a_283_0 + a_283_0 ≤ 0 ∧ a_283_0 − a_283_0 ≤ 0 ∧ − a_26_post + a_26_post ≤ 0 ∧ a_26_post − a_26_post ≤ 0 ∧ − a_26_1 + a_26_1 ≤ 0 ∧ a_26_1 − a_26_1 ≤ 0 ∧ − a_26_0 + a_26_0 ≤ 0 ∧ a_26_0 − a_26_0 ≤ 0 ∧ − a_247_post + a_247_post ≤ 0 ∧ a_247_post − a_247_post ≤ 0 ∧ − a_247_0 + a_247_0 ≤ 0 ∧ a_247_0 − a_247_0 ≤ 0 ∧ − a_197_post + a_197_post ≤ 0 ∧ a_197_post − a_197_post ≤ 0 ∧ − a_197_0 + a_197_0 ≤ 0 ∧ a_197_0 − a_197_0 ≤ 0 ∧ − a_146_0 + a_146_0 ≤ 0 ∧ a_146_0 − a_146_0 ≤ 0 | |
| 45 | 68 | 46: | 1 + x_14_0 ≤ 0 ∧ − y_19_post + y_19_post ≤ 0 ∧ y_19_post − y_19_post ≤ 0 ∧ − y_19_2 + y_19_2 ≤ 0 ∧ y_19_2 − y_19_2 ≤ 0 ∧ − y_19_1 + y_19_1 ≤ 0 ∧ y_19_1 − y_19_1 ≤ 0 ∧ − y_19_0 + y_19_0 ≤ 0 ∧ y_19_0 − y_19_0 ≤ 0 ∧ − x_SLAM_f_18_post + x_SLAM_f_18_post ≤ 0 ∧ x_SLAM_f_18_post − x_SLAM_f_18_post ≤ 0 ∧ − x_SLAM_f_18_2 + x_SLAM_f_18_2 ≤ 0 ∧ x_SLAM_f_18_2 − x_SLAM_f_18_2 ≤ 0 ∧ − x_SLAM_f_18_1 + x_SLAM_f_18_1 ≤ 0 ∧ x_SLAM_f_18_1 − x_SLAM_f_18_1 ≤ 0 ∧ − x_SLAM_f_18_0 + x_SLAM_f_18_0 ≤ 0 ∧ x_SLAM_f_18_0 − x_SLAM_f_18_0 ≤ 0 ∧ − x_34_post + x_34_post ≤ 0 ∧ x_34_post − x_34_post ≤ 0 ∧ − x_34_1 + x_34_1 ≤ 0 ∧ x_34_1 − x_34_1 ≤ 0 ∧ − x_34_0 + x_34_0 ≤ 0 ∧ x_34_0 − x_34_0 ≤ 0 ∧ − x_28_post + x_28_post ≤ 0 ∧ x_28_post − x_28_post ≤ 0 ∧ − x_28_1 + x_28_1 ≤ 0 ∧ x_28_1 − x_28_1 ≤ 0 ∧ − x_28_0 + x_28_0 ≤ 0 ∧ x_28_0 − x_28_0 ≤ 0 ∧ − x_238_post + x_238_post ≤ 0 ∧ x_238_post − x_238_post ≤ 0 ∧ − x_238_0 + x_238_0 ≤ 0 ∧ x_238_0 − x_238_0 ≤ 0 ∧ − x_20_post + x_20_post ≤ 0 ∧ x_20_post − x_20_post ≤ 0 ∧ − x_20_2 + x_20_2 ≤ 0 ∧ x_20_2 − x_20_2 ≤ 0 ∧ − x_20_1 + x_20_1 ≤ 0 ∧ x_20_1 − x_20_1 ≤ 0 ∧ − x_20_0 + x_20_0 ≤ 0 ∧ x_20_0 − x_20_0 ≤ 0 ∧ − x_177_post + x_177_post ≤ 0 ∧ x_177_post − x_177_post ≤ 0 ∧ − x_177_0 + x_177_0 ≤ 0 ∧ x_177_0 − x_177_0 ≤ 0 ∧ − x_16_post + x_16_post ≤ 0 ∧ x_16_post − x_16_post ≤ 0 ∧ − x_16_1 + x_16_1 ≤ 0 ∧ x_16_1 − x_16_1 ≤ 0 ∧ − x_16_0 + x_16_0 ≤ 0 ∧ x_16_0 − x_16_0 ≤ 0 ∧ − x_14_post + x_14_post ≤ 0 ∧ x_14_post − x_14_post ≤ 0 ∧ − x_14_0 + x_14_0 ≤ 0 ∧ x_14_0 − x_14_0 ≤ 0 ∧ − tmp_48_post + tmp_48_post ≤ 0 ∧ tmp_48_post − tmp_48_post ≤ 0 ∧ − tmp_48_0 + tmp_48_0 ≤ 0 ∧ tmp_48_0 − tmp_48_0 ≤ 0 ∧ − temp_49_post + temp_49_post ≤ 0 ∧ temp_49_post − temp_49_post ≤ 0 ∧ − temp_49_0 + temp_49_0 ≤ 0 ∧ temp_49_0 − temp_49_0 ≤ 0 ∧ − temp0_45_post + temp0_45_post ≤ 0 ∧ temp0_45_post − temp0_45_post ≤ 0 ∧ − temp0_45_1 + temp0_45_1 ≤ 0 ∧ temp0_45_1 − temp0_45_1 ≤ 0 ∧ − temp0_45_0 + temp0_45_0 ≤ 0 ∧ temp0_45_0 − temp0_45_0 ≤ 0 ∧ − temp0_32_post + temp0_32_post ≤ 0 ∧ temp0_32_post − temp0_32_post ≤ 0 ∧ − temp0_32_4 + temp0_32_4 ≤ 0 ∧ temp0_32_4 − temp0_32_4 ≤ 0 ∧ − temp0_32_3 + temp0_32_3 ≤ 0 ∧ temp0_32_3 − temp0_32_3 ≤ 0 ∧ − temp0_32_2 + temp0_32_2 ≤ 0 ∧ temp0_32_2 − temp0_32_2 ≤ 0 ∧ − temp0_32_1 + temp0_32_1 ≤ 0 ∧ temp0_32_1 − temp0_32_1 ≤ 0 ∧ − temp0_32_0 + temp0_32_0 ≤ 0 ∧ temp0_32_0 − temp0_32_0 ≤ 0 ∧ − temp0_15_0 + temp0_15_0 ≤ 0 ∧ temp0_15_0 − temp0_15_0 ≤ 0 ∧ − t_23_post + t_23_post ≤ 0 ∧ t_23_post − t_23_post ≤ 0 ∧ − t_23_1 + t_23_1 ≤ 0 ∧ t_23_1 − t_23_1 ≤ 0 ∧ − t_23_0 + t_23_0 ≤ 0 ∧ t_23_0 − t_23_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_post + result_dot_printf_sdv_special_RETURN_VALUE_41_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_post − result_dot_printf_sdv_special_RETURN_VALUE_41_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_1 + result_dot_printf_sdv_special_RETURN_VALUE_41_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_1 − result_dot_printf_sdv_special_RETURN_VALUE_41_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_0 + result_dot_printf_sdv_special_RETURN_VALUE_41_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_0 − result_dot_printf_sdv_special_RETURN_VALUE_41_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_post + result_dot_printf_sdv_special_RETURN_VALUE_38_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_post − result_dot_printf_sdv_special_RETURN_VALUE_38_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_1 + result_dot_printf_sdv_special_RETURN_VALUE_38_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_1 − result_dot_printf_sdv_special_RETURN_VALUE_38_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_0 + result_dot_printf_sdv_special_RETURN_VALUE_38_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_0 − result_dot_printf_sdv_special_RETURN_VALUE_38_0 ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_post + result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_post − result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_1 + result_dot_nondet_sdv_special_RETURN_VALUE_13_1 ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_1 − result_dot_nondet_sdv_special_RETURN_VALUE_13_1 ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_0 + result_dot_nondet_sdv_special_RETURN_VALUE_13_0 ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_0 − result_dot_nondet_sdv_special_RETURN_VALUE_13_0 ≤ 0 ∧ − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post + result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post ≤ 0 ∧ result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post ≤ 0 ∧ − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 + result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 ≤ 0 ∧ result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 ≤ 0 ∧ − result_11_post + result_11_post ≤ 0 ∧ result_11_post − result_11_post ≤ 0 ∧ − result_11_6 + result_11_6 ≤ 0 ∧ result_11_6 − result_11_6 ≤ 0 ∧ − result_11_5 + result_11_5 ≤ 0 ∧ result_11_5 − result_11_5 ≤ 0 ∧ − result_11_4 + result_11_4 ≤ 0 ∧ result_11_4 − result_11_4 ≤ 0 ∧ − result_11_3 + result_11_3 ≤ 0 ∧ result_11_3 − result_11_3 ≤ 0 ∧ − result_11_2 + result_11_2 ≤ 0 ∧ result_11_2 − result_11_2 ≤ 0 ∧ − result_11_1 + result_11_1 ≤ 0 ∧ result_11_1 − result_11_1 ≤ 0 ∧ − result_11_0 + result_11_0 ≤ 0 ∧ result_11_0 − result_11_0 ≤ 0 ∧ − rcd_72_post + rcd_72_post ≤ 0 ∧ rcd_72_post − rcd_72_post ≤ 0 ∧ − rcd_72_0 + rcd_72_0 ≤ 0 ∧ rcd_72_0 − rcd_72_0 ≤ 0 ∧ − rcd_102_post + rcd_102_post ≤ 0 ∧ rcd_102_post − rcd_102_post ≤ 0 ∧ − rcd_102_0 + rcd_102_0 ≤ 0 ∧ rcd_102_0 − rcd_102_0 ≤ 0 ∧ − r_53_post + r_53_post ≤ 0 ∧ r_53_post − r_53_post ≤ 0 ∧ − r_53_0 + r_53_0 ≤ 0 ∧ r_53_0 − r_53_0 ≤ 0 ∧ − r_161_post + r_161_post ≤ 0 ∧ r_161_post − r_161_post ≤ 0 ∧ − r_161_0 + r_161_0 ≤ 0 ∧ r_161_0 − r_161_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 ≤ 0 ∧ − nondet_12_post + nondet_12_post ≤ 0 ∧ nondet_12_post − nondet_12_post ≤ 0 ∧ − nondet_12_1 + nondet_12_1 ≤ 0 ∧ nondet_12_1 − nondet_12_1 ≤ 0 ∧ − nondet_12_0 + nondet_12_0 ≤ 0 ∧ nondet_12_0 − nondet_12_0 ≤ 0 ∧ − lt_37_post + lt_37_post ≤ 0 ∧ lt_37_post − lt_37_post ≤ 0 ∧ − lt_37_1 + lt_37_1 ≤ 0 ∧ lt_37_1 − lt_37_1 ≤ 0 ∧ − lt_37_0 + lt_37_0 ≤ 0 ∧ lt_37_0 − lt_37_0 ≤ 0 ∧ − lt_36_post + lt_36_post ≤ 0 ∧ lt_36_post − lt_36_post ≤ 0 ∧ − lt_36_0 + lt_36_0 ≤ 0 ∧ lt_36_0 − lt_36_0 ≤ 0 ∧ − lt_237_post + lt_237_post ≤ 0 ∧ lt_237_post − lt_237_post ≤ 0 ∧ − lt_237_0 + lt_237_0 ≤ 0 ∧ lt_237_0 − lt_237_0 ≤ 0 ∧ − length_43_post + length_43_post ≤ 0 ∧ length_43_post − length_43_post ≤ 0 ∧ − length_43_0 + length_43_0 ≤ 0 ∧ length_43_0 − length_43_0 ≤ 0 ∧ − len_246_post + len_246_post ≤ 0 ∧ len_246_post − len_246_post ≤ 0 ∧ − len_246_0 + len_246_0 ≤ 0 ∧ len_246_0 − len_246_0 ≤ 0 ∧ − len_180_post + len_180_post ≤ 0 ∧ len_180_post − len_180_post ≤ 0 ∧ − len_180_0 + len_180_0 ≤ 0 ∧ len_180_0 − len_180_0 ≤ 0 ∧ − i_44_post + i_44_post ≤ 0 ∧ i_44_post − i_44_post ≤ 0 ∧ − i_44_0 + i_44_0 ≤ 0 ∧ i_44_0 − i_44_0 ≤ 0 ∧ − i_125_post + i_125_post ≤ 0 ∧ i_125_post − i_125_post ≤ 0 ∧ − i_125_0 + i_125_0 ≤ 0 ∧ i_125_0 − i_125_0 ≤ 0 ∧ − i_108_post + i_108_post ≤ 0 ∧ i_108_post − i_108_post ≤ 0 ∧ − i_108_0 + i_108_0 ≤ 0 ∧ i_108_0 − i_108_0 ≤ 0 ∧ − head_46_post + head_46_post ≤ 0 ∧ head_46_post − head_46_post ≤ 0 ∧ − head_46_0 + head_46_0 ≤ 0 ∧ head_46_0 − head_46_0 ≤ 0 ∧ − fmt_31_post + fmt_31_post ≤ 0 ∧ fmt_31_post − fmt_31_post ≤ 0 ∧ − fmt_31_4 + fmt_31_4 ≤ 0 ∧ fmt_31_4 − fmt_31_4 ≤ 0 ∧ − fmt_31_3 + fmt_31_3 ≤ 0 ∧ fmt_31_3 − fmt_31_3 ≤ 0 ∧ − fmt_31_2 + fmt_31_2 ≤ 0 ∧ fmt_31_2 − fmt_31_2 ≤ 0 ∧ − fmt_31_1 + fmt_31_1 ≤ 0 ∧ fmt_31_1 − fmt_31_1 ≤ 0 ∧ − fmt_31_0 + fmt_31_0 ≤ 0 ∧ fmt_31_0 − fmt_31_0 ≤ 0 ∧ − ct_17_post + ct_17_post ≤ 0 ∧ ct_17_post − ct_17_post ≤ 0 ∧ − ct_17_2 + ct_17_2 ≤ 0 ∧ ct_17_2 − ct_17_2 ≤ 0 ∧ − ct_17_1 + ct_17_1 ≤ 0 ∧ ct_17_1 − ct_17_1 ≤ 0 ∧ − ct_17_0 + ct_17_0 ≤ 0 ∧ ct_17_0 − ct_17_0 ≤ 0 ∧ − a_328_post + a_328_post ≤ 0 ∧ a_328_post − a_328_post ≤ 0 ∧ − a_328_0 + a_328_0 ≤ 0 ∧ a_328_0 − a_328_0 ≤ 0 ∧ − a_305_post + a_305_post ≤ 0 ∧ a_305_post − a_305_post ≤ 0 ∧ − a_305_0 + a_305_0 ≤ 0 ∧ a_305_0 − a_305_0 ≤ 0 ∧ − a_283_post + a_283_post ≤ 0 ∧ a_283_post − a_283_post ≤ 0 ∧ − a_283_0 + a_283_0 ≤ 0 ∧ a_283_0 − a_283_0 ≤ 0 ∧ − a_26_post + a_26_post ≤ 0 ∧ a_26_post − a_26_post ≤ 0 ∧ − a_26_1 + a_26_1 ≤ 0 ∧ a_26_1 − a_26_1 ≤ 0 ∧ − a_26_0 + a_26_0 ≤ 0 ∧ a_26_0 − a_26_0 ≤ 0 ∧ − a_247_post + a_247_post ≤ 0 ∧ a_247_post − a_247_post ≤ 0 ∧ − a_247_0 + a_247_0 ≤ 0 ∧ a_247_0 − a_247_0 ≤ 0 ∧ − a_197_post + a_197_post ≤ 0 ∧ a_197_post − a_197_post ≤ 0 ∧ − a_197_0 + a_197_0 ≤ 0 ∧ a_197_0 − a_197_0 ≤ 0 ∧ − a_146_0 + a_146_0 ≤ 0 ∧ a_146_0 − a_146_0 ≤ 0 | |
| 46 | 69 | 47: | 1 − x_238_0 ≤ 0 ∧ − y_19_post + y_19_post ≤ 0 ∧ y_19_post − y_19_post ≤ 0 ∧ − y_19_2 + y_19_2 ≤ 0 ∧ y_19_2 − y_19_2 ≤ 0 ∧ − y_19_1 + y_19_1 ≤ 0 ∧ y_19_1 − y_19_1 ≤ 0 ∧ − y_19_0 + y_19_0 ≤ 0 ∧ y_19_0 − y_19_0 ≤ 0 ∧ − x_SLAM_f_18_post + x_SLAM_f_18_post ≤ 0 ∧ x_SLAM_f_18_post − x_SLAM_f_18_post ≤ 0 ∧ − x_SLAM_f_18_2 + x_SLAM_f_18_2 ≤ 0 ∧ x_SLAM_f_18_2 − x_SLAM_f_18_2 ≤ 0 ∧ − x_SLAM_f_18_1 + x_SLAM_f_18_1 ≤ 0 ∧ x_SLAM_f_18_1 − x_SLAM_f_18_1 ≤ 0 ∧ − x_SLAM_f_18_0 + x_SLAM_f_18_0 ≤ 0 ∧ x_SLAM_f_18_0 − x_SLAM_f_18_0 ≤ 0 ∧ − x_34_post + x_34_post ≤ 0 ∧ x_34_post − x_34_post ≤ 0 ∧ − x_34_1 + x_34_1 ≤ 0 ∧ x_34_1 − x_34_1 ≤ 0 ∧ − x_34_0 + x_34_0 ≤ 0 ∧ x_34_0 − x_34_0 ≤ 0 ∧ − x_28_post + x_28_post ≤ 0 ∧ x_28_post − x_28_post ≤ 0 ∧ − x_28_1 + x_28_1 ≤ 0 ∧ x_28_1 − x_28_1 ≤ 0 ∧ − x_28_0 + x_28_0 ≤ 0 ∧ x_28_0 − x_28_0 ≤ 0 ∧ − x_238_post + x_238_post ≤ 0 ∧ x_238_post − x_238_post ≤ 0 ∧ − x_238_0 + x_238_0 ≤ 0 ∧ x_238_0 − x_238_0 ≤ 0 ∧ − x_20_post + x_20_post ≤ 0 ∧ x_20_post − x_20_post ≤ 0 ∧ − x_20_2 + x_20_2 ≤ 0 ∧ x_20_2 − x_20_2 ≤ 0 ∧ − x_20_1 + x_20_1 ≤ 0 ∧ x_20_1 − x_20_1 ≤ 0 ∧ − x_20_0 + x_20_0 ≤ 0 ∧ x_20_0 − x_20_0 ≤ 0 ∧ − x_177_post + x_177_post ≤ 0 ∧ x_177_post − x_177_post ≤ 0 ∧ − x_177_0 + x_177_0 ≤ 0 ∧ x_177_0 − x_177_0 ≤ 0 ∧ − x_16_post + x_16_post ≤ 0 ∧ x_16_post − x_16_post ≤ 0 ∧ − x_16_1 + x_16_1 ≤ 0 ∧ x_16_1 − x_16_1 ≤ 0 ∧ − x_16_0 + x_16_0 ≤ 0 ∧ x_16_0 − x_16_0 ≤ 0 ∧ − x_14_post + x_14_post ≤ 0 ∧ x_14_post − x_14_post ≤ 0 ∧ − x_14_0 + x_14_0 ≤ 0 ∧ x_14_0 − x_14_0 ≤ 0 ∧ − tmp_48_post + tmp_48_post ≤ 0 ∧ tmp_48_post − tmp_48_post ≤ 0 ∧ − tmp_48_0 + tmp_48_0 ≤ 0 ∧ tmp_48_0 − tmp_48_0 ≤ 0 ∧ − temp_49_post + temp_49_post ≤ 0 ∧ temp_49_post − temp_49_post ≤ 0 ∧ − temp_49_0 + temp_49_0 ≤ 0 ∧ temp_49_0 − temp_49_0 ≤ 0 ∧ − temp0_45_post + temp0_45_post ≤ 0 ∧ temp0_45_post − temp0_45_post ≤ 0 ∧ − temp0_45_1 + temp0_45_1 ≤ 0 ∧ temp0_45_1 − temp0_45_1 ≤ 0 ∧ − temp0_45_0 + temp0_45_0 ≤ 0 ∧ temp0_45_0 − temp0_45_0 ≤ 0 ∧ − temp0_32_post + temp0_32_post ≤ 0 ∧ temp0_32_post − temp0_32_post ≤ 0 ∧ − temp0_32_4 + temp0_32_4 ≤ 0 ∧ temp0_32_4 − temp0_32_4 ≤ 0 ∧ − temp0_32_3 + temp0_32_3 ≤ 0 ∧ temp0_32_3 − temp0_32_3 ≤ 0 ∧ − temp0_32_2 + temp0_32_2 ≤ 0 ∧ temp0_32_2 − temp0_32_2 ≤ 0 ∧ − temp0_32_1 + temp0_32_1 ≤ 0 ∧ temp0_32_1 − temp0_32_1 ≤ 0 ∧ − temp0_32_0 + temp0_32_0 ≤ 0 ∧ temp0_32_0 − temp0_32_0 ≤ 0 ∧ − temp0_15_0 + temp0_15_0 ≤ 0 ∧ temp0_15_0 − temp0_15_0 ≤ 0 ∧ − t_23_post + t_23_post ≤ 0 ∧ t_23_post − t_23_post ≤ 0 ∧ − t_23_1 + t_23_1 ≤ 0 ∧ t_23_1 − t_23_1 ≤ 0 ∧ − t_23_0 + t_23_0 ≤ 0 ∧ t_23_0 − t_23_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_post + result_dot_printf_sdv_special_RETURN_VALUE_41_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_post − result_dot_printf_sdv_special_RETURN_VALUE_41_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_1 + result_dot_printf_sdv_special_RETURN_VALUE_41_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_1 − result_dot_printf_sdv_special_RETURN_VALUE_41_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_0 + result_dot_printf_sdv_special_RETURN_VALUE_41_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_0 − result_dot_printf_sdv_special_RETURN_VALUE_41_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_post + result_dot_printf_sdv_special_RETURN_VALUE_38_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_post − result_dot_printf_sdv_special_RETURN_VALUE_38_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_1 + result_dot_printf_sdv_special_RETURN_VALUE_38_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_1 − result_dot_printf_sdv_special_RETURN_VALUE_38_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_0 + result_dot_printf_sdv_special_RETURN_VALUE_38_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_0 − result_dot_printf_sdv_special_RETURN_VALUE_38_0 ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_post + result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_post − result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_1 + result_dot_nondet_sdv_special_RETURN_VALUE_13_1 ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_1 − result_dot_nondet_sdv_special_RETURN_VALUE_13_1 ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_0 + result_dot_nondet_sdv_special_RETURN_VALUE_13_0 ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_0 − result_dot_nondet_sdv_special_RETURN_VALUE_13_0 ≤ 0 ∧ − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post + result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post ≤ 0 ∧ result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post ≤ 0 ∧ − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 + result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 ≤ 0 ∧ result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 ≤ 0 ∧ − result_11_post + result_11_post ≤ 0 ∧ result_11_post − result_11_post ≤ 0 ∧ − result_11_6 + result_11_6 ≤ 0 ∧ result_11_6 − result_11_6 ≤ 0 ∧ − result_11_5 + result_11_5 ≤ 0 ∧ result_11_5 − result_11_5 ≤ 0 ∧ − result_11_4 + result_11_4 ≤ 0 ∧ result_11_4 − result_11_4 ≤ 0 ∧ − result_11_3 + result_11_3 ≤ 0 ∧ result_11_3 − result_11_3 ≤ 0 ∧ − result_11_2 + result_11_2 ≤ 0 ∧ result_11_2 − result_11_2 ≤ 0 ∧ − result_11_1 + result_11_1 ≤ 0 ∧ result_11_1 − result_11_1 ≤ 0 ∧ − result_11_0 + result_11_0 ≤ 0 ∧ result_11_0 − result_11_0 ≤ 0 ∧ − rcd_72_post + rcd_72_post ≤ 0 ∧ rcd_72_post − rcd_72_post ≤ 0 ∧ − rcd_72_0 + rcd_72_0 ≤ 0 ∧ rcd_72_0 − rcd_72_0 ≤ 0 ∧ − rcd_102_post + rcd_102_post ≤ 0 ∧ rcd_102_post − rcd_102_post ≤ 0 ∧ − rcd_102_0 + rcd_102_0 ≤ 0 ∧ rcd_102_0 − rcd_102_0 ≤ 0 ∧ − r_53_post + r_53_post ≤ 0 ∧ r_53_post − r_53_post ≤ 0 ∧ − r_53_0 + r_53_0 ≤ 0 ∧ r_53_0 − r_53_0 ≤ 0 ∧ − r_161_post + r_161_post ≤ 0 ∧ r_161_post − r_161_post ≤ 0 ∧ − r_161_0 + r_161_0 ≤ 0 ∧ r_161_0 − r_161_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 ≤ 0 ∧ − nondet_12_post + nondet_12_post ≤ 0 ∧ nondet_12_post − nondet_12_post ≤ 0 ∧ − nondet_12_1 + nondet_12_1 ≤ 0 ∧ nondet_12_1 − nondet_12_1 ≤ 0 ∧ − nondet_12_0 + nondet_12_0 ≤ 0 ∧ nondet_12_0 − nondet_12_0 ≤ 0 ∧ − lt_37_post + lt_37_post ≤ 0 ∧ lt_37_post − lt_37_post ≤ 0 ∧ − lt_37_1 + lt_37_1 ≤ 0 ∧ lt_37_1 − lt_37_1 ≤ 0 ∧ − lt_37_0 + lt_37_0 ≤ 0 ∧ lt_37_0 − lt_37_0 ≤ 0 ∧ − lt_36_post + lt_36_post ≤ 0 ∧ lt_36_post − lt_36_post ≤ 0 ∧ − lt_36_0 + lt_36_0 ≤ 0 ∧ lt_36_0 − lt_36_0 ≤ 0 ∧ − lt_237_post + lt_237_post ≤ 0 ∧ lt_237_post − lt_237_post ≤ 0 ∧ − lt_237_0 + lt_237_0 ≤ 0 ∧ lt_237_0 − lt_237_0 ≤ 0 ∧ − length_43_post + length_43_post ≤ 0 ∧ length_43_post − length_43_post ≤ 0 ∧ − length_43_0 + length_43_0 ≤ 0 ∧ length_43_0 − length_43_0 ≤ 0 ∧ − len_246_post + len_246_post ≤ 0 ∧ len_246_post − len_246_post ≤ 0 ∧ − len_246_0 + len_246_0 ≤ 0 ∧ len_246_0 − len_246_0 ≤ 0 ∧ − len_180_post + len_180_post ≤ 0 ∧ len_180_post − len_180_post ≤ 0 ∧ − len_180_0 + len_180_0 ≤ 0 ∧ len_180_0 − len_180_0 ≤ 0 ∧ − i_44_post + i_44_post ≤ 0 ∧ i_44_post − i_44_post ≤ 0 ∧ − i_44_0 + i_44_0 ≤ 0 ∧ i_44_0 − i_44_0 ≤ 0 ∧ − i_125_post + i_125_post ≤ 0 ∧ i_125_post − i_125_post ≤ 0 ∧ − i_125_0 + i_125_0 ≤ 0 ∧ i_125_0 − i_125_0 ≤ 0 ∧ − i_108_post + i_108_post ≤ 0 ∧ i_108_post − i_108_post ≤ 0 ∧ − i_108_0 + i_108_0 ≤ 0 ∧ i_108_0 − i_108_0 ≤ 0 ∧ − head_46_post + head_46_post ≤ 0 ∧ head_46_post − head_46_post ≤ 0 ∧ − head_46_0 + head_46_0 ≤ 0 ∧ head_46_0 − head_46_0 ≤ 0 ∧ − fmt_31_post + fmt_31_post ≤ 0 ∧ fmt_31_post − fmt_31_post ≤ 0 ∧ − fmt_31_4 + fmt_31_4 ≤ 0 ∧ fmt_31_4 − fmt_31_4 ≤ 0 ∧ − fmt_31_3 + fmt_31_3 ≤ 0 ∧ fmt_31_3 − fmt_31_3 ≤ 0 ∧ − fmt_31_2 + fmt_31_2 ≤ 0 ∧ fmt_31_2 − fmt_31_2 ≤ 0 ∧ − fmt_31_1 + fmt_31_1 ≤ 0 ∧ fmt_31_1 − fmt_31_1 ≤ 0 ∧ − fmt_31_0 + fmt_31_0 ≤ 0 ∧ fmt_31_0 − fmt_31_0 ≤ 0 ∧ − ct_17_post + ct_17_post ≤ 0 ∧ ct_17_post − ct_17_post ≤ 0 ∧ − ct_17_2 + ct_17_2 ≤ 0 ∧ ct_17_2 − ct_17_2 ≤ 0 ∧ − ct_17_1 + ct_17_1 ≤ 0 ∧ ct_17_1 − ct_17_1 ≤ 0 ∧ − ct_17_0 + ct_17_0 ≤ 0 ∧ ct_17_0 − ct_17_0 ≤ 0 ∧ − a_328_post + a_328_post ≤ 0 ∧ a_328_post − a_328_post ≤ 0 ∧ − a_328_0 + a_328_0 ≤ 0 ∧ a_328_0 − a_328_0 ≤ 0 ∧ − a_305_post + a_305_post ≤ 0 ∧ a_305_post − a_305_post ≤ 0 ∧ − a_305_0 + a_305_0 ≤ 0 ∧ a_305_0 − a_305_0 ≤ 0 ∧ − a_283_post + a_283_post ≤ 0 ∧ a_283_post − a_283_post ≤ 0 ∧ − a_283_0 + a_283_0 ≤ 0 ∧ a_283_0 − a_283_0 ≤ 0 ∧ − a_26_post + a_26_post ≤ 0 ∧ a_26_post − a_26_post ≤ 0 ∧ − a_26_1 + a_26_1 ≤ 0 ∧ a_26_1 − a_26_1 ≤ 0 ∧ − a_26_0 + a_26_0 ≤ 0 ∧ a_26_0 − a_26_0 ≤ 0 ∧ − a_247_post + a_247_post ≤ 0 ∧ a_247_post − a_247_post ≤ 0 ∧ − a_247_0 + a_247_0 ≤ 0 ∧ a_247_0 − a_247_0 ≤ 0 ∧ − a_197_post + a_197_post ≤ 0 ∧ a_197_post − a_197_post ≤ 0 ∧ − a_197_0 + a_197_0 ≤ 0 ∧ a_197_0 − a_197_0 ≤ 0 ∧ − a_146_0 + a_146_0 ≤ 0 ∧ a_146_0 − a_146_0 ≤ 0 | |
| 46 | 70 | 47: | 1 + x_238_0 ≤ 0 ∧ − y_19_post + y_19_post ≤ 0 ∧ y_19_post − y_19_post ≤ 0 ∧ − y_19_2 + y_19_2 ≤ 0 ∧ y_19_2 − y_19_2 ≤ 0 ∧ − y_19_1 + y_19_1 ≤ 0 ∧ y_19_1 − y_19_1 ≤ 0 ∧ − y_19_0 + y_19_0 ≤ 0 ∧ y_19_0 − y_19_0 ≤ 0 ∧ − x_SLAM_f_18_post + x_SLAM_f_18_post ≤ 0 ∧ x_SLAM_f_18_post − x_SLAM_f_18_post ≤ 0 ∧ − x_SLAM_f_18_2 + x_SLAM_f_18_2 ≤ 0 ∧ x_SLAM_f_18_2 − x_SLAM_f_18_2 ≤ 0 ∧ − x_SLAM_f_18_1 + x_SLAM_f_18_1 ≤ 0 ∧ x_SLAM_f_18_1 − x_SLAM_f_18_1 ≤ 0 ∧ − x_SLAM_f_18_0 + x_SLAM_f_18_0 ≤ 0 ∧ x_SLAM_f_18_0 − x_SLAM_f_18_0 ≤ 0 ∧ − x_34_post + x_34_post ≤ 0 ∧ x_34_post − x_34_post ≤ 0 ∧ − x_34_1 + x_34_1 ≤ 0 ∧ x_34_1 − x_34_1 ≤ 0 ∧ − x_34_0 + x_34_0 ≤ 0 ∧ x_34_0 − x_34_0 ≤ 0 ∧ − x_28_post + x_28_post ≤ 0 ∧ x_28_post − x_28_post ≤ 0 ∧ − x_28_1 + x_28_1 ≤ 0 ∧ x_28_1 − x_28_1 ≤ 0 ∧ − x_28_0 + x_28_0 ≤ 0 ∧ x_28_0 − x_28_0 ≤ 0 ∧ − x_238_post + x_238_post ≤ 0 ∧ x_238_post − x_238_post ≤ 0 ∧ − x_238_0 + x_238_0 ≤ 0 ∧ x_238_0 − x_238_0 ≤ 0 ∧ − x_20_post + x_20_post ≤ 0 ∧ x_20_post − x_20_post ≤ 0 ∧ − x_20_2 + x_20_2 ≤ 0 ∧ x_20_2 − x_20_2 ≤ 0 ∧ − x_20_1 + x_20_1 ≤ 0 ∧ x_20_1 − x_20_1 ≤ 0 ∧ − x_20_0 + x_20_0 ≤ 0 ∧ x_20_0 − x_20_0 ≤ 0 ∧ − x_177_post + x_177_post ≤ 0 ∧ x_177_post − x_177_post ≤ 0 ∧ − x_177_0 + x_177_0 ≤ 0 ∧ x_177_0 − x_177_0 ≤ 0 ∧ − x_16_post + x_16_post ≤ 0 ∧ x_16_post − x_16_post ≤ 0 ∧ − x_16_1 + x_16_1 ≤ 0 ∧ x_16_1 − x_16_1 ≤ 0 ∧ − x_16_0 + x_16_0 ≤ 0 ∧ x_16_0 − x_16_0 ≤ 0 ∧ − x_14_post + x_14_post ≤ 0 ∧ x_14_post − x_14_post ≤ 0 ∧ − x_14_0 + x_14_0 ≤ 0 ∧ x_14_0 − x_14_0 ≤ 0 ∧ − tmp_48_post + tmp_48_post ≤ 0 ∧ tmp_48_post − tmp_48_post ≤ 0 ∧ − tmp_48_0 + tmp_48_0 ≤ 0 ∧ tmp_48_0 − tmp_48_0 ≤ 0 ∧ − temp_49_post + temp_49_post ≤ 0 ∧ temp_49_post − temp_49_post ≤ 0 ∧ − temp_49_0 + temp_49_0 ≤ 0 ∧ temp_49_0 − temp_49_0 ≤ 0 ∧ − temp0_45_post + temp0_45_post ≤ 0 ∧ temp0_45_post − temp0_45_post ≤ 0 ∧ − temp0_45_1 + temp0_45_1 ≤ 0 ∧ temp0_45_1 − temp0_45_1 ≤ 0 ∧ − temp0_45_0 + temp0_45_0 ≤ 0 ∧ temp0_45_0 − temp0_45_0 ≤ 0 ∧ − temp0_32_post + temp0_32_post ≤ 0 ∧ temp0_32_post − temp0_32_post ≤ 0 ∧ − temp0_32_4 + temp0_32_4 ≤ 0 ∧ temp0_32_4 − temp0_32_4 ≤ 0 ∧ − temp0_32_3 + temp0_32_3 ≤ 0 ∧ temp0_32_3 − temp0_32_3 ≤ 0 ∧ − temp0_32_2 + temp0_32_2 ≤ 0 ∧ temp0_32_2 − temp0_32_2 ≤ 0 ∧ − temp0_32_1 + temp0_32_1 ≤ 0 ∧ temp0_32_1 − temp0_32_1 ≤ 0 ∧ − temp0_32_0 + temp0_32_0 ≤ 0 ∧ temp0_32_0 − temp0_32_0 ≤ 0 ∧ − temp0_15_0 + temp0_15_0 ≤ 0 ∧ temp0_15_0 − temp0_15_0 ≤ 0 ∧ − t_23_post + t_23_post ≤ 0 ∧ t_23_post − t_23_post ≤ 0 ∧ − t_23_1 + t_23_1 ≤ 0 ∧ t_23_1 − t_23_1 ≤ 0 ∧ − t_23_0 + t_23_0 ≤ 0 ∧ t_23_0 − t_23_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_post + result_dot_printf_sdv_special_RETURN_VALUE_41_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_post − result_dot_printf_sdv_special_RETURN_VALUE_41_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_1 + result_dot_printf_sdv_special_RETURN_VALUE_41_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_1 − result_dot_printf_sdv_special_RETURN_VALUE_41_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_0 + result_dot_printf_sdv_special_RETURN_VALUE_41_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_0 − result_dot_printf_sdv_special_RETURN_VALUE_41_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_post + result_dot_printf_sdv_special_RETURN_VALUE_38_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_post − result_dot_printf_sdv_special_RETURN_VALUE_38_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_1 + result_dot_printf_sdv_special_RETURN_VALUE_38_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_1 − result_dot_printf_sdv_special_RETURN_VALUE_38_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_0 + result_dot_printf_sdv_special_RETURN_VALUE_38_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_0 − result_dot_printf_sdv_special_RETURN_VALUE_38_0 ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_post + result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_post − result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_1 + result_dot_nondet_sdv_special_RETURN_VALUE_13_1 ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_1 − result_dot_nondet_sdv_special_RETURN_VALUE_13_1 ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_0 + result_dot_nondet_sdv_special_RETURN_VALUE_13_0 ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_0 − result_dot_nondet_sdv_special_RETURN_VALUE_13_0 ≤ 0 ∧ − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post + result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post ≤ 0 ∧ result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post ≤ 0 ∧ − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 + result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 ≤ 0 ∧ result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 ≤ 0 ∧ − result_11_post + result_11_post ≤ 0 ∧ result_11_post − result_11_post ≤ 0 ∧ − result_11_6 + result_11_6 ≤ 0 ∧ result_11_6 − result_11_6 ≤ 0 ∧ − result_11_5 + result_11_5 ≤ 0 ∧ result_11_5 − result_11_5 ≤ 0 ∧ − result_11_4 + result_11_4 ≤ 0 ∧ result_11_4 − result_11_4 ≤ 0 ∧ − result_11_3 + result_11_3 ≤ 0 ∧ result_11_3 − result_11_3 ≤ 0 ∧ − result_11_2 + result_11_2 ≤ 0 ∧ result_11_2 − result_11_2 ≤ 0 ∧ − result_11_1 + result_11_1 ≤ 0 ∧ result_11_1 − result_11_1 ≤ 0 ∧ − result_11_0 + result_11_0 ≤ 0 ∧ result_11_0 − result_11_0 ≤ 0 ∧ − rcd_72_post + rcd_72_post ≤ 0 ∧ rcd_72_post − rcd_72_post ≤ 0 ∧ − rcd_72_0 + rcd_72_0 ≤ 0 ∧ rcd_72_0 − rcd_72_0 ≤ 0 ∧ − rcd_102_post + rcd_102_post ≤ 0 ∧ rcd_102_post − rcd_102_post ≤ 0 ∧ − rcd_102_0 + rcd_102_0 ≤ 0 ∧ rcd_102_0 − rcd_102_0 ≤ 0 ∧ − r_53_post + r_53_post ≤ 0 ∧ r_53_post − r_53_post ≤ 0 ∧ − r_53_0 + r_53_0 ≤ 0 ∧ r_53_0 − r_53_0 ≤ 0 ∧ − r_161_post + r_161_post ≤ 0 ∧ r_161_post − r_161_post ≤ 0 ∧ − r_161_0 + r_161_0 ≤ 0 ∧ r_161_0 − r_161_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 ≤ 0 ∧ − nondet_12_post + nondet_12_post ≤ 0 ∧ nondet_12_post − nondet_12_post ≤ 0 ∧ − nondet_12_1 + nondet_12_1 ≤ 0 ∧ nondet_12_1 − nondet_12_1 ≤ 0 ∧ − nondet_12_0 + nondet_12_0 ≤ 0 ∧ nondet_12_0 − nondet_12_0 ≤ 0 ∧ − lt_37_post + lt_37_post ≤ 0 ∧ lt_37_post − lt_37_post ≤ 0 ∧ − lt_37_1 + lt_37_1 ≤ 0 ∧ lt_37_1 − lt_37_1 ≤ 0 ∧ − lt_37_0 + lt_37_0 ≤ 0 ∧ lt_37_0 − lt_37_0 ≤ 0 ∧ − lt_36_post + lt_36_post ≤ 0 ∧ lt_36_post − lt_36_post ≤ 0 ∧ − lt_36_0 + lt_36_0 ≤ 0 ∧ lt_36_0 − lt_36_0 ≤ 0 ∧ − lt_237_post + lt_237_post ≤ 0 ∧ lt_237_post − lt_237_post ≤ 0 ∧ − lt_237_0 + lt_237_0 ≤ 0 ∧ lt_237_0 − lt_237_0 ≤ 0 ∧ − length_43_post + length_43_post ≤ 0 ∧ length_43_post − length_43_post ≤ 0 ∧ − length_43_0 + length_43_0 ≤ 0 ∧ length_43_0 − length_43_0 ≤ 0 ∧ − len_246_post + len_246_post ≤ 0 ∧ len_246_post − len_246_post ≤ 0 ∧ − len_246_0 + len_246_0 ≤ 0 ∧ len_246_0 − len_246_0 ≤ 0 ∧ − len_180_post + len_180_post ≤ 0 ∧ len_180_post − len_180_post ≤ 0 ∧ − len_180_0 + len_180_0 ≤ 0 ∧ len_180_0 − len_180_0 ≤ 0 ∧ − i_44_post + i_44_post ≤ 0 ∧ i_44_post − i_44_post ≤ 0 ∧ − i_44_0 + i_44_0 ≤ 0 ∧ i_44_0 − i_44_0 ≤ 0 ∧ − i_125_post + i_125_post ≤ 0 ∧ i_125_post − i_125_post ≤ 0 ∧ − i_125_0 + i_125_0 ≤ 0 ∧ i_125_0 − i_125_0 ≤ 0 ∧ − i_108_post + i_108_post ≤ 0 ∧ i_108_post − i_108_post ≤ 0 ∧ − i_108_0 + i_108_0 ≤ 0 ∧ i_108_0 − i_108_0 ≤ 0 ∧ − head_46_post + head_46_post ≤ 0 ∧ head_46_post − head_46_post ≤ 0 ∧ − head_46_0 + head_46_0 ≤ 0 ∧ head_46_0 − head_46_0 ≤ 0 ∧ − fmt_31_post + fmt_31_post ≤ 0 ∧ fmt_31_post − fmt_31_post ≤ 0 ∧ − fmt_31_4 + fmt_31_4 ≤ 0 ∧ fmt_31_4 − fmt_31_4 ≤ 0 ∧ − fmt_31_3 + fmt_31_3 ≤ 0 ∧ fmt_31_3 − fmt_31_3 ≤ 0 ∧ − fmt_31_2 + fmt_31_2 ≤ 0 ∧ fmt_31_2 − fmt_31_2 ≤ 0 ∧ − fmt_31_1 + fmt_31_1 ≤ 0 ∧ fmt_31_1 − fmt_31_1 ≤ 0 ∧ − fmt_31_0 + fmt_31_0 ≤ 0 ∧ fmt_31_0 − fmt_31_0 ≤ 0 ∧ − ct_17_post + ct_17_post ≤ 0 ∧ ct_17_post − ct_17_post ≤ 0 ∧ − ct_17_2 + ct_17_2 ≤ 0 ∧ ct_17_2 − ct_17_2 ≤ 0 ∧ − ct_17_1 + ct_17_1 ≤ 0 ∧ ct_17_1 − ct_17_1 ≤ 0 ∧ − ct_17_0 + ct_17_0 ≤ 0 ∧ ct_17_0 − ct_17_0 ≤ 0 ∧ − a_328_post + a_328_post ≤ 0 ∧ a_328_post − a_328_post ≤ 0 ∧ − a_328_0 + a_328_0 ≤ 0 ∧ a_328_0 − a_328_0 ≤ 0 ∧ − a_305_post + a_305_post ≤ 0 ∧ a_305_post − a_305_post ≤ 0 ∧ − a_305_0 + a_305_0 ≤ 0 ∧ a_305_0 − a_305_0 ≤ 0 ∧ − a_283_post + a_283_post ≤ 0 ∧ a_283_post − a_283_post ≤ 0 ∧ − a_283_0 + a_283_0 ≤ 0 ∧ a_283_0 − a_283_0 ≤ 0 ∧ − a_26_post + a_26_post ≤ 0 ∧ a_26_post − a_26_post ≤ 0 ∧ − a_26_1 + a_26_1 ≤ 0 ∧ a_26_1 − a_26_1 ≤ 0 ∧ − a_26_0 + a_26_0 ≤ 0 ∧ a_26_0 − a_26_0 ≤ 0 ∧ − a_247_post + a_247_post ≤ 0 ∧ a_247_post − a_247_post ≤ 0 ∧ − a_247_0 + a_247_0 ≤ 0 ∧ a_247_0 − a_247_0 ≤ 0 ∧ − a_197_post + a_197_post ≤ 0 ∧ a_197_post − a_197_post ≤ 0 ∧ − a_197_0 + a_197_0 ≤ 0 ∧ a_197_0 − a_197_0 ≤ 0 ∧ − a_146_0 + a_146_0 ≤ 0 ∧ a_146_0 − a_146_0 ≤ 0 | |
| 47 | 71 | 48: | 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 1 − result_dot_nondet_sdv_special_RETURN_VALUE_13_0 ≤ 0 ∧ 2 − result_dot_nondet_sdv_special_RETURN_VALUE_13_0 ≤ 0 ∧ a_197_post − a_247_0 ≤ 0 ∧ − a_197_post + a_247_0 ≤ 0 ∧ len_180_post − len_246_0 ≤ 0 ∧ − len_180_post + len_246_0 ≤ 0 ∧ a_197_0 − a_197_post ≤ 0 ∧ − a_197_0 + a_197_post ≤ 0 ∧ len_180_0 − len_180_post ≤ 0 ∧ − len_180_0 + len_180_post ≤ 0 ∧ − y_19_post + y_19_post ≤ 0 ∧ y_19_post − y_19_post ≤ 0 ∧ − y_19_2 + y_19_2 ≤ 0 ∧ y_19_2 − y_19_2 ≤ 0 ∧ − y_19_1 + y_19_1 ≤ 0 ∧ y_19_1 − y_19_1 ≤ 0 ∧ − y_19_0 + y_19_0 ≤ 0 ∧ y_19_0 − y_19_0 ≤ 0 ∧ − x_SLAM_f_18_post + x_SLAM_f_18_post ≤ 0 ∧ x_SLAM_f_18_post − x_SLAM_f_18_post ≤ 0 ∧ − x_SLAM_f_18_2 + x_SLAM_f_18_2 ≤ 0 ∧ x_SLAM_f_18_2 − x_SLAM_f_18_2 ≤ 0 ∧ − x_SLAM_f_18_1 + x_SLAM_f_18_1 ≤ 0 ∧ x_SLAM_f_18_1 − x_SLAM_f_18_1 ≤ 0 ∧ − x_SLAM_f_18_0 + x_SLAM_f_18_0 ≤ 0 ∧ x_SLAM_f_18_0 − x_SLAM_f_18_0 ≤ 0 ∧ − x_34_post + x_34_post ≤ 0 ∧ x_34_post − x_34_post ≤ 0 ∧ − x_34_1 + x_34_1 ≤ 0 ∧ x_34_1 − x_34_1 ≤ 0 ∧ − x_34_0 + x_34_0 ≤ 0 ∧ x_34_0 − x_34_0 ≤ 0 ∧ − x_28_post + x_28_post ≤ 0 ∧ x_28_post − x_28_post ≤ 0 ∧ − x_28_1 + x_28_1 ≤ 0 ∧ x_28_1 − x_28_1 ≤ 0 ∧ − x_28_0 + x_28_0 ≤ 0 ∧ x_28_0 − x_28_0 ≤ 0 ∧ − x_238_post + x_238_post ≤ 0 ∧ x_238_post − x_238_post ≤ 0 ∧ − x_238_0 + x_238_0 ≤ 0 ∧ x_238_0 − x_238_0 ≤ 0 ∧ − x_20_post + x_20_post ≤ 0 ∧ x_20_post − x_20_post ≤ 0 ∧ − x_20_2 + x_20_2 ≤ 0 ∧ x_20_2 − x_20_2 ≤ 0 ∧ − x_20_1 + x_20_1 ≤ 0 ∧ x_20_1 − x_20_1 ≤ 0 ∧ − x_20_0 + x_20_0 ≤ 0 ∧ x_20_0 − x_20_0 ≤ 0 ∧ − x_177_post + x_177_post ≤ 0 ∧ x_177_post − x_177_post ≤ 0 ∧ − x_177_0 + x_177_0 ≤ 0 ∧ x_177_0 − x_177_0 ≤ 0 ∧ − x_16_post + x_16_post ≤ 0 ∧ x_16_post − x_16_post ≤ 0 ∧ − x_16_1 + x_16_1 ≤ 0 ∧ x_16_1 − x_16_1 ≤ 0 ∧ − x_16_0 + x_16_0 ≤ 0 ∧ x_16_0 − x_16_0 ≤ 0 ∧ − x_14_post + x_14_post ≤ 0 ∧ x_14_post − x_14_post ≤ 0 ∧ − x_14_0 + x_14_0 ≤ 0 ∧ x_14_0 − x_14_0 ≤ 0 ∧ − tmp_48_post + tmp_48_post ≤ 0 ∧ tmp_48_post − tmp_48_post ≤ 0 ∧ − tmp_48_0 + tmp_48_0 ≤ 0 ∧ tmp_48_0 − tmp_48_0 ≤ 0 ∧ − temp_49_post + temp_49_post ≤ 0 ∧ temp_49_post − temp_49_post ≤ 0 ∧ − temp_49_0 + temp_49_0 ≤ 0 ∧ temp_49_0 − temp_49_0 ≤ 0 ∧ − temp0_45_post + temp0_45_post ≤ 0 ∧ temp0_45_post − temp0_45_post ≤ 0 ∧ − temp0_45_1 + temp0_45_1 ≤ 0 ∧ temp0_45_1 − temp0_45_1 ≤ 0 ∧ − temp0_45_0 + temp0_45_0 ≤ 0 ∧ temp0_45_0 − temp0_45_0 ≤ 0 ∧ − temp0_32_post + temp0_32_post ≤ 0 ∧ temp0_32_post − temp0_32_post ≤ 0 ∧ − temp0_32_4 + temp0_32_4 ≤ 0 ∧ temp0_32_4 − temp0_32_4 ≤ 0 ∧ − temp0_32_3 + temp0_32_3 ≤ 0 ∧ temp0_32_3 − temp0_32_3 ≤ 0 ∧ − temp0_32_2 + temp0_32_2 ≤ 0 ∧ temp0_32_2 − temp0_32_2 ≤ 0 ∧ − temp0_32_1 + temp0_32_1 ≤ 0 ∧ temp0_32_1 − temp0_32_1 ≤ 0 ∧ − temp0_32_0 + temp0_32_0 ≤ 0 ∧ temp0_32_0 − temp0_32_0 ≤ 0 ∧ − temp0_15_0 + temp0_15_0 ≤ 0 ∧ temp0_15_0 − temp0_15_0 ≤ 0 ∧ − t_23_post + t_23_post ≤ 0 ∧ t_23_post − t_23_post ≤ 0 ∧ − t_23_1 + t_23_1 ≤ 0 ∧ t_23_1 − t_23_1 ≤ 0 ∧ − t_23_0 + t_23_0 ≤ 0 ∧ t_23_0 − t_23_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_post + result_dot_printf_sdv_special_RETURN_VALUE_41_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_post − result_dot_printf_sdv_special_RETURN_VALUE_41_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_1 + result_dot_printf_sdv_special_RETURN_VALUE_41_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_1 − result_dot_printf_sdv_special_RETURN_VALUE_41_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_0 + result_dot_printf_sdv_special_RETURN_VALUE_41_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_0 − result_dot_printf_sdv_special_RETURN_VALUE_41_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_post + result_dot_printf_sdv_special_RETURN_VALUE_38_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_post − result_dot_printf_sdv_special_RETURN_VALUE_38_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_1 + result_dot_printf_sdv_special_RETURN_VALUE_38_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_1 − result_dot_printf_sdv_special_RETURN_VALUE_38_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_0 + result_dot_printf_sdv_special_RETURN_VALUE_38_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_0 − result_dot_printf_sdv_special_RETURN_VALUE_38_0 ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_post + result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_post − result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_1 + result_dot_nondet_sdv_special_RETURN_VALUE_13_1 ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_1 − result_dot_nondet_sdv_special_RETURN_VALUE_13_1 ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_0 + result_dot_nondet_sdv_special_RETURN_VALUE_13_0 ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_0 − result_dot_nondet_sdv_special_RETURN_VALUE_13_0 ≤ 0 ∧ − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post + result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post ≤ 0 ∧ result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post ≤ 0 ∧ − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 + result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 ≤ 0 ∧ result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 ≤ 0 ∧ − result_11_post + result_11_post ≤ 0 ∧ result_11_post − result_11_post ≤ 0 ∧ − result_11_6 + result_11_6 ≤ 0 ∧ result_11_6 − result_11_6 ≤ 0 ∧ − result_11_5 + result_11_5 ≤ 0 ∧ result_11_5 − result_11_5 ≤ 0 ∧ − result_11_4 + result_11_4 ≤ 0 ∧ result_11_4 − result_11_4 ≤ 0 ∧ − result_11_3 + result_11_3 ≤ 0 ∧ result_11_3 − result_11_3 ≤ 0 ∧ − result_11_2 + result_11_2 ≤ 0 ∧ result_11_2 − result_11_2 ≤ 0 ∧ − result_11_1 + result_11_1 ≤ 0 ∧ result_11_1 − result_11_1 ≤ 0 ∧ − result_11_0 + result_11_0 ≤ 0 ∧ result_11_0 − result_11_0 ≤ 0 ∧ − rcd_72_post + rcd_72_post ≤ 0 ∧ rcd_72_post − rcd_72_post ≤ 0 ∧ − rcd_72_0 + rcd_72_0 ≤ 0 ∧ rcd_72_0 − rcd_72_0 ≤ 0 ∧ − rcd_102_post + rcd_102_post ≤ 0 ∧ rcd_102_post − rcd_102_post ≤ 0 ∧ − rcd_102_0 + rcd_102_0 ≤ 0 ∧ rcd_102_0 − rcd_102_0 ≤ 0 ∧ − r_53_post + r_53_post ≤ 0 ∧ r_53_post − r_53_post ≤ 0 ∧ − r_53_0 + r_53_0 ≤ 0 ∧ r_53_0 − r_53_0 ≤ 0 ∧ − r_161_post + r_161_post ≤ 0 ∧ r_161_post − r_161_post ≤ 0 ∧ − r_161_0 + r_161_0 ≤ 0 ∧ r_161_0 − r_161_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 ≤ 0 ∧ − nondet_12_post + nondet_12_post ≤ 0 ∧ nondet_12_post − nondet_12_post ≤ 0 ∧ − nondet_12_1 + nondet_12_1 ≤ 0 ∧ nondet_12_1 − nondet_12_1 ≤ 0 ∧ − nondet_12_0 + nondet_12_0 ≤ 0 ∧ nondet_12_0 − nondet_12_0 ≤ 0 ∧ − lt_37_post + lt_37_post ≤ 0 ∧ lt_37_post − lt_37_post ≤ 0 ∧ − lt_37_1 + lt_37_1 ≤ 0 ∧ lt_37_1 − lt_37_1 ≤ 0 ∧ − lt_37_0 + lt_37_0 ≤ 0 ∧ lt_37_0 − lt_37_0 ≤ 0 ∧ − lt_36_post + lt_36_post ≤ 0 ∧ lt_36_post − lt_36_post ≤ 0 ∧ − lt_36_0 + lt_36_0 ≤ 0 ∧ lt_36_0 − lt_36_0 ≤ 0 ∧ − lt_237_post + lt_237_post ≤ 0 ∧ lt_237_post − lt_237_post ≤ 0 ∧ − lt_237_0 + lt_237_0 ≤ 0 ∧ lt_237_0 − lt_237_0 ≤ 0 ∧ − length_43_post + length_43_post ≤ 0 ∧ length_43_post − length_43_post ≤ 0 ∧ − length_43_0 + length_43_0 ≤ 0 ∧ length_43_0 − length_43_0 ≤ 0 ∧ − len_246_post + len_246_post ≤ 0 ∧ len_246_post − len_246_post ≤ 0 ∧ − len_246_0 + len_246_0 ≤ 0 ∧ len_246_0 − len_246_0 ≤ 0 ∧ − i_44_post + i_44_post ≤ 0 ∧ i_44_post − i_44_post ≤ 0 ∧ − i_44_0 + i_44_0 ≤ 0 ∧ i_44_0 − i_44_0 ≤ 0 ∧ − i_125_post + i_125_post ≤ 0 ∧ i_125_post − i_125_post ≤ 0 ∧ − i_125_0 + i_125_0 ≤ 0 ∧ i_125_0 − i_125_0 ≤ 0 ∧ − i_108_post + i_108_post ≤ 0 ∧ i_108_post − i_108_post ≤ 0 ∧ − i_108_0 + i_108_0 ≤ 0 ∧ i_108_0 − i_108_0 ≤ 0 ∧ − head_46_post + head_46_post ≤ 0 ∧ head_46_post − head_46_post ≤ 0 ∧ − head_46_0 + head_46_0 ≤ 0 ∧ head_46_0 − head_46_0 ≤ 0 ∧ − fmt_31_post + fmt_31_post ≤ 0 ∧ fmt_31_post − fmt_31_post ≤ 0 ∧ − fmt_31_4 + fmt_31_4 ≤ 0 ∧ fmt_31_4 − fmt_31_4 ≤ 0 ∧ − fmt_31_3 + fmt_31_3 ≤ 0 ∧ fmt_31_3 − fmt_31_3 ≤ 0 ∧ − fmt_31_2 + fmt_31_2 ≤ 0 ∧ fmt_31_2 − fmt_31_2 ≤ 0 ∧ − fmt_31_1 + fmt_31_1 ≤ 0 ∧ fmt_31_1 − fmt_31_1 ≤ 0 ∧ − fmt_31_0 + fmt_31_0 ≤ 0 ∧ fmt_31_0 − fmt_31_0 ≤ 0 ∧ − ct_17_post + ct_17_post ≤ 0 ∧ ct_17_post − ct_17_post ≤ 0 ∧ − ct_17_2 + ct_17_2 ≤ 0 ∧ ct_17_2 − ct_17_2 ≤ 0 ∧ − ct_17_1 + ct_17_1 ≤ 0 ∧ ct_17_1 − ct_17_1 ≤ 0 ∧ − ct_17_0 + ct_17_0 ≤ 0 ∧ ct_17_0 − ct_17_0 ≤ 0 ∧ − a_328_post + a_328_post ≤ 0 ∧ a_328_post − a_328_post ≤ 0 ∧ − a_328_0 + a_328_0 ≤ 0 ∧ a_328_0 − a_328_0 ≤ 0 ∧ − a_305_post + a_305_post ≤ 0 ∧ a_305_post − a_305_post ≤ 0 ∧ − a_305_0 + a_305_0 ≤ 0 ∧ a_305_0 − a_305_0 ≤ 0 ∧ − a_283_post + a_283_post ≤ 0 ∧ a_283_post − a_283_post ≤ 0 ∧ − a_283_0 + a_283_0 ≤ 0 ∧ a_283_0 − a_283_0 ≤ 0 ∧ − a_26_post + a_26_post ≤ 0 ∧ a_26_post − a_26_post ≤ 0 ∧ − a_26_1 + a_26_1 ≤ 0 ∧ a_26_1 − a_26_1 ≤ 0 ∧ − a_26_0 + a_26_0 ≤ 0 ∧ a_26_0 − a_26_0 ≤ 0 ∧ − a_247_post + a_247_post ≤ 0 ∧ a_247_post − a_247_post ≤ 0 ∧ − a_247_0 + a_247_0 ≤ 0 ∧ a_247_0 − a_247_0 ≤ 0 ∧ − a_146_0 + a_146_0 ≤ 0 ∧ a_146_0 − a_146_0 ≤ 0 | |
| 48 | 72 | 40: | − y_19_post + y_19_post ≤ 0 ∧ y_19_post − y_19_post ≤ 0 ∧ − y_19_2 + y_19_2 ≤ 0 ∧ y_19_2 − y_19_2 ≤ 0 ∧ − y_19_1 + y_19_1 ≤ 0 ∧ y_19_1 − y_19_1 ≤ 0 ∧ − y_19_0 + y_19_0 ≤ 0 ∧ y_19_0 − y_19_0 ≤ 0 ∧ − x_SLAM_f_18_post + x_SLAM_f_18_post ≤ 0 ∧ x_SLAM_f_18_post − x_SLAM_f_18_post ≤ 0 ∧ − x_SLAM_f_18_2 + x_SLAM_f_18_2 ≤ 0 ∧ x_SLAM_f_18_2 − x_SLAM_f_18_2 ≤ 0 ∧ − x_SLAM_f_18_1 + x_SLAM_f_18_1 ≤ 0 ∧ x_SLAM_f_18_1 − x_SLAM_f_18_1 ≤ 0 ∧ − x_SLAM_f_18_0 + x_SLAM_f_18_0 ≤ 0 ∧ x_SLAM_f_18_0 − x_SLAM_f_18_0 ≤ 0 ∧ − x_34_post + x_34_post ≤ 0 ∧ x_34_post − x_34_post ≤ 0 ∧ − x_34_1 + x_34_1 ≤ 0 ∧ x_34_1 − x_34_1 ≤ 0 ∧ − x_34_0 + x_34_0 ≤ 0 ∧ x_34_0 − x_34_0 ≤ 0 ∧ − x_28_post + x_28_post ≤ 0 ∧ x_28_post − x_28_post ≤ 0 ∧ − x_28_1 + x_28_1 ≤ 0 ∧ x_28_1 − x_28_1 ≤ 0 ∧ − x_28_0 + x_28_0 ≤ 0 ∧ x_28_0 − x_28_0 ≤ 0 ∧ − x_238_post + x_238_post ≤ 0 ∧ x_238_post − x_238_post ≤ 0 ∧ − x_238_0 + x_238_0 ≤ 0 ∧ x_238_0 − x_238_0 ≤ 0 ∧ − x_20_post + x_20_post ≤ 0 ∧ x_20_post − x_20_post ≤ 0 ∧ − x_20_2 + x_20_2 ≤ 0 ∧ x_20_2 − x_20_2 ≤ 0 ∧ − x_20_1 + x_20_1 ≤ 0 ∧ x_20_1 − x_20_1 ≤ 0 ∧ − x_20_0 + x_20_0 ≤ 0 ∧ x_20_0 − x_20_0 ≤ 0 ∧ − x_177_post + x_177_post ≤ 0 ∧ x_177_post − x_177_post ≤ 0 ∧ − x_177_0 + x_177_0 ≤ 0 ∧ x_177_0 − x_177_0 ≤ 0 ∧ − x_16_post + x_16_post ≤ 0 ∧ x_16_post − x_16_post ≤ 0 ∧ − x_16_1 + x_16_1 ≤ 0 ∧ x_16_1 − x_16_1 ≤ 0 ∧ − x_16_0 + x_16_0 ≤ 0 ∧ x_16_0 − x_16_0 ≤ 0 ∧ − x_14_post + x_14_post ≤ 0 ∧ x_14_post − x_14_post ≤ 0 ∧ − x_14_0 + x_14_0 ≤ 0 ∧ x_14_0 − x_14_0 ≤ 0 ∧ − tmp_48_post + tmp_48_post ≤ 0 ∧ tmp_48_post − tmp_48_post ≤ 0 ∧ − tmp_48_0 + tmp_48_0 ≤ 0 ∧ tmp_48_0 − tmp_48_0 ≤ 0 ∧ − temp_49_post + temp_49_post ≤ 0 ∧ temp_49_post − temp_49_post ≤ 0 ∧ − temp_49_0 + temp_49_0 ≤ 0 ∧ temp_49_0 − temp_49_0 ≤ 0 ∧ − temp0_45_post + temp0_45_post ≤ 0 ∧ temp0_45_post − temp0_45_post ≤ 0 ∧ − temp0_45_1 + temp0_45_1 ≤ 0 ∧ temp0_45_1 − temp0_45_1 ≤ 0 ∧ − temp0_45_0 + temp0_45_0 ≤ 0 ∧ temp0_45_0 − temp0_45_0 ≤ 0 ∧ − temp0_32_post + temp0_32_post ≤ 0 ∧ temp0_32_post − temp0_32_post ≤ 0 ∧ − temp0_32_4 + temp0_32_4 ≤ 0 ∧ temp0_32_4 − temp0_32_4 ≤ 0 ∧ − temp0_32_3 + temp0_32_3 ≤ 0 ∧ temp0_32_3 − temp0_32_3 ≤ 0 ∧ − temp0_32_2 + temp0_32_2 ≤ 0 ∧ temp0_32_2 − temp0_32_2 ≤ 0 ∧ − temp0_32_1 + temp0_32_1 ≤ 0 ∧ temp0_32_1 − temp0_32_1 ≤ 0 ∧ − temp0_32_0 + temp0_32_0 ≤ 0 ∧ temp0_32_0 − temp0_32_0 ≤ 0 ∧ − temp0_15_0 + temp0_15_0 ≤ 0 ∧ temp0_15_0 − temp0_15_0 ≤ 0 ∧ − t_23_post + t_23_post ≤ 0 ∧ t_23_post − t_23_post ≤ 0 ∧ − t_23_1 + t_23_1 ≤ 0 ∧ t_23_1 − t_23_1 ≤ 0 ∧ − t_23_0 + t_23_0 ≤ 0 ∧ t_23_0 − t_23_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_post + result_dot_printf_sdv_special_RETURN_VALUE_41_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_post − result_dot_printf_sdv_special_RETURN_VALUE_41_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_1 + result_dot_printf_sdv_special_RETURN_VALUE_41_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_1 − result_dot_printf_sdv_special_RETURN_VALUE_41_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_0 + result_dot_printf_sdv_special_RETURN_VALUE_41_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_0 − result_dot_printf_sdv_special_RETURN_VALUE_41_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_post + result_dot_printf_sdv_special_RETURN_VALUE_38_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_post − result_dot_printf_sdv_special_RETURN_VALUE_38_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_1 + result_dot_printf_sdv_special_RETURN_VALUE_38_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_1 − result_dot_printf_sdv_special_RETURN_VALUE_38_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_0 + result_dot_printf_sdv_special_RETURN_VALUE_38_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_0 − result_dot_printf_sdv_special_RETURN_VALUE_38_0 ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_post + result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_post − result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_1 + result_dot_nondet_sdv_special_RETURN_VALUE_13_1 ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_1 − result_dot_nondet_sdv_special_RETURN_VALUE_13_1 ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_0 + result_dot_nondet_sdv_special_RETURN_VALUE_13_0 ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_0 − result_dot_nondet_sdv_special_RETURN_VALUE_13_0 ≤ 0 ∧ − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post + result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post ≤ 0 ∧ result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post ≤ 0 ∧ − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 + result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 ≤ 0 ∧ result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 ≤ 0 ∧ − result_11_post + result_11_post ≤ 0 ∧ result_11_post − result_11_post ≤ 0 ∧ − result_11_6 + result_11_6 ≤ 0 ∧ result_11_6 − result_11_6 ≤ 0 ∧ − result_11_5 + result_11_5 ≤ 0 ∧ result_11_5 − result_11_5 ≤ 0 ∧ − result_11_4 + result_11_4 ≤ 0 ∧ result_11_4 − result_11_4 ≤ 0 ∧ − result_11_3 + result_11_3 ≤ 0 ∧ result_11_3 − result_11_3 ≤ 0 ∧ − result_11_2 + result_11_2 ≤ 0 ∧ result_11_2 − result_11_2 ≤ 0 ∧ − result_11_1 + result_11_1 ≤ 0 ∧ result_11_1 − result_11_1 ≤ 0 ∧ − result_11_0 + result_11_0 ≤ 0 ∧ result_11_0 − result_11_0 ≤ 0 ∧ − rcd_72_post + rcd_72_post ≤ 0 ∧ rcd_72_post − rcd_72_post ≤ 0 ∧ − rcd_72_0 + rcd_72_0 ≤ 0 ∧ rcd_72_0 − rcd_72_0 ≤ 0 ∧ − rcd_102_post + rcd_102_post ≤ 0 ∧ rcd_102_post − rcd_102_post ≤ 0 ∧ − rcd_102_0 + rcd_102_0 ≤ 0 ∧ rcd_102_0 − rcd_102_0 ≤ 0 ∧ − r_53_post + r_53_post ≤ 0 ∧ r_53_post − r_53_post ≤ 0 ∧ − r_53_0 + r_53_0 ≤ 0 ∧ r_53_0 − r_53_0 ≤ 0 ∧ − r_161_post + r_161_post ≤ 0 ∧ r_161_post − r_161_post ≤ 0 ∧ − r_161_0 + r_161_0 ≤ 0 ∧ r_161_0 − r_161_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 ≤ 0 ∧ − nondet_12_post + nondet_12_post ≤ 0 ∧ nondet_12_post − nondet_12_post ≤ 0 ∧ − nondet_12_1 + nondet_12_1 ≤ 0 ∧ nondet_12_1 − nondet_12_1 ≤ 0 ∧ − nondet_12_0 + nondet_12_0 ≤ 0 ∧ nondet_12_0 − nondet_12_0 ≤ 0 ∧ − lt_37_post + lt_37_post ≤ 0 ∧ lt_37_post − lt_37_post ≤ 0 ∧ − lt_37_1 + lt_37_1 ≤ 0 ∧ lt_37_1 − lt_37_1 ≤ 0 ∧ − lt_37_0 + lt_37_0 ≤ 0 ∧ lt_37_0 − lt_37_0 ≤ 0 ∧ − lt_36_post + lt_36_post ≤ 0 ∧ lt_36_post − lt_36_post ≤ 0 ∧ − lt_36_0 + lt_36_0 ≤ 0 ∧ lt_36_0 − lt_36_0 ≤ 0 ∧ − lt_237_post + lt_237_post ≤ 0 ∧ lt_237_post − lt_237_post ≤ 0 ∧ − lt_237_0 + lt_237_0 ≤ 0 ∧ lt_237_0 − lt_237_0 ≤ 0 ∧ − length_43_post + length_43_post ≤ 0 ∧ length_43_post − length_43_post ≤ 0 ∧ − length_43_0 + length_43_0 ≤ 0 ∧ length_43_0 − length_43_0 ≤ 0 ∧ − len_246_post + len_246_post ≤ 0 ∧ len_246_post − len_246_post ≤ 0 ∧ − len_246_0 + len_246_0 ≤ 0 ∧ len_246_0 − len_246_0 ≤ 0 ∧ − len_180_post + len_180_post ≤ 0 ∧ len_180_post − len_180_post ≤ 0 ∧ − len_180_0 + len_180_0 ≤ 0 ∧ len_180_0 − len_180_0 ≤ 0 ∧ − i_44_post + i_44_post ≤ 0 ∧ i_44_post − i_44_post ≤ 0 ∧ − i_44_0 + i_44_0 ≤ 0 ∧ i_44_0 − i_44_0 ≤ 0 ∧ − i_125_post + i_125_post ≤ 0 ∧ i_125_post − i_125_post ≤ 0 ∧ − i_125_0 + i_125_0 ≤ 0 ∧ i_125_0 − i_125_0 ≤ 0 ∧ − i_108_post + i_108_post ≤ 0 ∧ i_108_post − i_108_post ≤ 0 ∧ − i_108_0 + i_108_0 ≤ 0 ∧ i_108_0 − i_108_0 ≤ 0 ∧ − head_46_post + head_46_post ≤ 0 ∧ head_46_post − head_46_post ≤ 0 ∧ − head_46_0 + head_46_0 ≤ 0 ∧ head_46_0 − head_46_0 ≤ 0 ∧ − fmt_31_post + fmt_31_post ≤ 0 ∧ fmt_31_post − fmt_31_post ≤ 0 ∧ − fmt_31_4 + fmt_31_4 ≤ 0 ∧ fmt_31_4 − fmt_31_4 ≤ 0 ∧ − fmt_31_3 + fmt_31_3 ≤ 0 ∧ fmt_31_3 − fmt_31_3 ≤ 0 ∧ − fmt_31_2 + fmt_31_2 ≤ 0 ∧ fmt_31_2 − fmt_31_2 ≤ 0 ∧ − fmt_31_1 + fmt_31_1 ≤ 0 ∧ fmt_31_1 − fmt_31_1 ≤ 0 ∧ − fmt_31_0 + fmt_31_0 ≤ 0 ∧ fmt_31_0 − fmt_31_0 ≤ 0 ∧ − ct_17_post + ct_17_post ≤ 0 ∧ ct_17_post − ct_17_post ≤ 0 ∧ − ct_17_2 + ct_17_2 ≤ 0 ∧ ct_17_2 − ct_17_2 ≤ 0 ∧ − ct_17_1 + ct_17_1 ≤ 0 ∧ ct_17_1 − ct_17_1 ≤ 0 ∧ − ct_17_0 + ct_17_0 ≤ 0 ∧ ct_17_0 − ct_17_0 ≤ 0 ∧ − a_328_post + a_328_post ≤ 0 ∧ a_328_post − a_328_post ≤ 0 ∧ − a_328_0 + a_328_0 ≤ 0 ∧ a_328_0 − a_328_0 ≤ 0 ∧ − a_305_post + a_305_post ≤ 0 ∧ a_305_post − a_305_post ≤ 0 ∧ − a_305_0 + a_305_0 ≤ 0 ∧ a_305_0 − a_305_0 ≤ 0 ∧ − a_283_post + a_283_post ≤ 0 ∧ a_283_post − a_283_post ≤ 0 ∧ − a_283_0 + a_283_0 ≤ 0 ∧ a_283_0 − a_283_0 ≤ 0 ∧ − a_26_post + a_26_post ≤ 0 ∧ a_26_post − a_26_post ≤ 0 ∧ − a_26_1 + a_26_1 ≤ 0 ∧ a_26_1 − a_26_1 ≤ 0 ∧ − a_26_0 + a_26_0 ≤ 0 ∧ a_26_0 − a_26_0 ≤ 0 ∧ − a_247_post + a_247_post ≤ 0 ∧ a_247_post − a_247_post ≤ 0 ∧ − a_247_0 + a_247_0 ≤ 0 ∧ a_247_0 − a_247_0 ≤ 0 ∧ − a_197_post + a_197_post ≤ 0 ∧ a_197_post − a_197_post ≤ 0 ∧ − a_197_0 + a_197_0 ≤ 0 ∧ a_197_0 − a_197_0 ≤ 0 ∧ − a_146_0 + a_146_0 ≤ 0 ∧ a_146_0 − a_146_0 ≤ 0 | |
| 38 | 73 | 49: | 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ − a_146_0 ≤ 0 ∧ − x_28_0 ≤ 0 ∧ x_28_0 ≤ 0 ∧ − a_146_0 ≤ 0 ∧ fmt_31_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 ≤ 0 ∧ − fmt_31_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 ≤ 0 ∧ temp0_32_1 ≤ 0 ∧ − temp0_32_1 ≤ 0 ∧ result_11_1 − temp0_32_1 ≤ 0 ∧ − result_11_1 + temp0_32_1 ≤ 0 ∧ − result_11_1 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 ≤ 0 ∧ result_11_1 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 ≤ 0 ∧ − x_14_0 + x_16_post ≤ 0 ∧ x_14_0 − x_16_post ≤ 0 ∧ ct_17_post ≤ 0 ∧ − ct_17_post ≤ 0 ∧ − x_16_post + x_SLAM_f_18_post ≤ 0 ∧ x_16_post − x_SLAM_f_18_post ≤ 0 ∧ − ct_17_post + y_19_post ≤ 0 ∧ ct_17_post − y_19_post ≤ 0 ∧ x_20_post − x_SLAM_f_18_post ≤ 0 ∧ − x_20_post + x_SLAM_f_18_post ≤ 0 ∧ − ct_17_post ≤ 0 ∧ ct_17_post ≤ 0 ∧ − y_19_post ≤ 0 ∧ y_19_post ≤ 0 ∧ 1 − len_180_0 ≤ 0 ∧ −1 + len_180_0 ≤ 0 ∧ x_14_0 − x_16_post ≤ 0 ∧ − x_14_0 + x_16_post ≤ 0 ∧ x_14_0 − x_SLAM_f_18_post ≤ 0 ∧ − x_14_0 + x_SLAM_f_18_post ≤ 0 ∧ x_14_0 − x_20_post ≤ 0 ∧ − x_14_0 + x_20_post ≤ 0 ∧ x_16_post − x_SLAM_f_18_post ≤ 0 ∧ − x_16_post + x_SLAM_f_18_post ≤ 0 ∧ ct_17_post − y_19_post ≤ 0 ∧ − ct_17_post + y_19_post ≤ 0 ∧ − x_20_post + x_SLAM_f_18_post ≤ 0 ∧ x_20_post − x_SLAM_f_18_post ≤ 0 ∧ a_26_0 − a_26_post ≤ 0 ∧ − a_26_0 + a_26_post ≤ 0 ∧ ct_17_0 − ct_17_post ≤ 0 ∧ − ct_17_0 + ct_17_post ≤ 0 ∧ fmt_31_0 − fmt_31_post ≤ 0 ∧ − fmt_31_0 + fmt_31_post ≤ 0 ∧ lt_36_0 − lt_36_post ≤ 0 ∧ − lt_36_0 + lt_36_post ≤ 0 ∧ lt_37_0 − lt_37_post ≤ 0 ∧ − lt_37_0 + lt_37_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post ≤ 0 ∧ result_11_0 − result_11_post ≤ 0 ∧ − result_11_0 + result_11_post ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_0 − result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_0 + result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_0 − result_dot_printf_sdv_special_RETURN_VALUE_38_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_0 + result_dot_printf_sdv_special_RETURN_VALUE_38_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_0 − result_dot_printf_sdv_special_RETURN_VALUE_41_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_0 + result_dot_printf_sdv_special_RETURN_VALUE_41_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post ≤ 0 ∧ temp0_32_0 − temp0_32_post ≤ 0 ∧ − temp0_32_0 + temp0_32_post ≤ 0 ∧ x_16_0 − x_16_post ≤ 0 ∧ − x_16_0 + x_16_post ≤ 0 ∧ x_20_0 − x_20_post ≤ 0 ∧ − x_20_0 + x_20_post ≤ 0 ∧ x_28_0 − x_28_post ≤ 0 ∧ − x_28_0 + x_28_post ≤ 0 ∧ x_34_0 − x_34_post ≤ 0 ∧ − x_34_0 + x_34_post ≤ 0 ∧ x_SLAM_f_18_0 − x_SLAM_f_18_post ≤ 0 ∧ − x_SLAM_f_18_0 + x_SLAM_f_18_post ≤ 0 ∧ y_19_0 − y_19_post ≤ 0 ∧ − y_19_0 + y_19_post ≤ 0 ∧ − y_19_2 + y_19_2 ≤ 0 ∧ y_19_2 − y_19_2 ≤ 0 ∧ − y_19_1 + y_19_1 ≤ 0 ∧ y_19_1 − y_19_1 ≤ 0 ∧ − x_SLAM_f_18_2 + x_SLAM_f_18_2 ≤ 0 ∧ x_SLAM_f_18_2 − x_SLAM_f_18_2 ≤ 0 ∧ − x_SLAM_f_18_1 + x_SLAM_f_18_1 ≤ 0 ∧ x_SLAM_f_18_1 − x_SLAM_f_18_1 ≤ 0 ∧ − x_34_1 + x_34_1 ≤ 0 ∧ x_34_1 − x_34_1 ≤ 0 ∧ − x_28_1 + x_28_1 ≤ 0 ∧ x_28_1 − x_28_1 ≤ 0 ∧ − x_238_post + x_238_post ≤ 0 ∧ x_238_post − x_238_post ≤ 0 ∧ − x_238_0 + x_238_0 ≤ 0 ∧ x_238_0 − x_238_0 ≤ 0 ∧ − x_20_2 + x_20_2 ≤ 0 ∧ x_20_2 − x_20_2 ≤ 0 ∧ − x_20_1 + x_20_1 ≤ 0 ∧ x_20_1 − x_20_1 ≤ 0 ∧ − x_177_post + x_177_post ≤ 0 ∧ x_177_post − x_177_post ≤ 0 ∧ − x_177_0 + x_177_0 ≤ 0 ∧ x_177_0 − x_177_0 ≤ 0 ∧ − x_16_1 + x_16_1 ≤ 0 ∧ x_16_1 − x_16_1 ≤ 0 ∧ − x_14_post + x_14_post ≤ 0 ∧ x_14_post − x_14_post ≤ 0 ∧ − x_14_0 + x_14_0 ≤ 0 ∧ x_14_0 − x_14_0 ≤ 0 ∧ − tmp_48_post + tmp_48_post ≤ 0 ∧ tmp_48_post − tmp_48_post ≤ 0 ∧ − tmp_48_0 + tmp_48_0 ≤ 0 ∧ tmp_48_0 − tmp_48_0 ≤ 0 ∧ − temp_49_post + temp_49_post ≤ 0 ∧ temp_49_post − temp_49_post ≤ 0 ∧ − temp_49_0 + temp_49_0 ≤ 0 ∧ temp_49_0 − temp_49_0 ≤ 0 ∧ − temp0_45_post + temp0_45_post ≤ 0 ∧ temp0_45_post − temp0_45_post ≤ 0 ∧ − temp0_45_1 + temp0_45_1 ≤ 0 ∧ temp0_45_1 − temp0_45_1 ≤ 0 ∧ − temp0_45_0 + temp0_45_0 ≤ 0 ∧ temp0_45_0 − temp0_45_0 ≤ 0 ∧ − temp0_32_4 + temp0_32_4 ≤ 0 ∧ temp0_32_4 − temp0_32_4 ≤ 0 ∧ − temp0_32_3 + temp0_32_3 ≤ 0 ∧ temp0_32_3 − temp0_32_3 ≤ 0 ∧ − temp0_15_0 + temp0_15_0 ≤ 0 ∧ temp0_15_0 − temp0_15_0 ≤ 0 ∧ − t_23_post + t_23_post ≤ 0 ∧ t_23_post − t_23_post ≤ 0 ∧ − t_23_1 + t_23_1 ≤ 0 ∧ t_23_1 − t_23_1 ≤ 0 ∧ − t_23_0 + t_23_0 ≤ 0 ∧ t_23_0 − t_23_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_1 + result_dot_printf_sdv_special_RETURN_VALUE_41_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_1 − result_dot_printf_sdv_special_RETURN_VALUE_41_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_1 + result_dot_printf_sdv_special_RETURN_VALUE_38_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_1 − result_dot_printf_sdv_special_RETURN_VALUE_38_1 ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_1 + result_dot_nondet_sdv_special_RETURN_VALUE_13_1 ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_1 − result_dot_nondet_sdv_special_RETURN_VALUE_13_1 ≤ 0 ∧ − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post + result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post ≤ 0 ∧ result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post ≤ 0 ∧ − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 + result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 ≤ 0 ∧ result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 ≤ 0 ∧ − result_11_6 + result_11_6 ≤ 0 ∧ result_11_6 − result_11_6 ≤ 0 ∧ − result_11_5 + result_11_5 ≤ 0 ∧ result_11_5 − result_11_5 ≤ 0 ∧ − result_11_4 + result_11_4 ≤ 0 ∧ result_11_4 − result_11_4 ≤ 0 ∧ − result_11_3 + result_11_3 ≤ 0 ∧ result_11_3 − result_11_3 ≤ 0 ∧ − result_11_2 + result_11_2 ≤ 0 ∧ result_11_2 − result_11_2 ≤ 0 ∧ − rcd_72_post + rcd_72_post ≤ 0 ∧ rcd_72_post − rcd_72_post ≤ 0 ∧ − rcd_72_0 + rcd_72_0 ≤ 0 ∧ rcd_72_0 − rcd_72_0 ≤ 0 ∧ − rcd_102_post + rcd_102_post ≤ 0 ∧ rcd_102_post − rcd_102_post ≤ 0 ∧ − rcd_102_0 + rcd_102_0 ≤ 0 ∧ rcd_102_0 − rcd_102_0 ≤ 0 ∧ − r_53_post + r_53_post ≤ 0 ∧ r_53_post − r_53_post ≤ 0 ∧ − r_53_0 + r_53_0 ≤ 0 ∧ r_53_0 − r_53_0 ≤ 0 ∧ − r_161_post + r_161_post ≤ 0 ∧ r_161_post − r_161_post ≤ 0 ∧ − r_161_0 + r_161_0 ≤ 0 ∧ r_161_0 − r_161_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 ≤ 0 ∧ − nondet_12_post + nondet_12_post ≤ 0 ∧ nondet_12_post − nondet_12_post ≤ 0 ∧ − nondet_12_1 + nondet_12_1 ≤ 0 ∧ nondet_12_1 − nondet_12_1 ≤ 0 ∧ − nondet_12_0 + nondet_12_0 ≤ 0 ∧ nondet_12_0 − nondet_12_0 ≤ 0 ∧ − lt_37_1 + lt_37_1 ≤ 0 ∧ lt_37_1 − lt_37_1 ≤ 0 ∧ − lt_237_post + lt_237_post ≤ 0 ∧ lt_237_post − lt_237_post ≤ 0 ∧ − lt_237_0 + lt_237_0 ≤ 0 ∧ lt_237_0 − lt_237_0 ≤ 0 ∧ − length_43_post + length_43_post ≤ 0 ∧ length_43_post − length_43_post ≤ 0 ∧ − length_43_0 + length_43_0 ≤ 0 ∧ length_43_0 − length_43_0 ≤ 0 ∧ − len_246_post + len_246_post ≤ 0 ∧ len_246_post − len_246_post ≤ 0 ∧ − len_246_0 + len_246_0 ≤ 0 ∧ len_246_0 − len_246_0 ≤ 0 ∧ − len_180_post + len_180_post ≤ 0 ∧ len_180_post − len_180_post ≤ 0 ∧ − len_180_0 + len_180_0 ≤ 0 ∧ len_180_0 − len_180_0 ≤ 0 ∧ − i_44_post + i_44_post ≤ 0 ∧ i_44_post − i_44_post ≤ 0 ∧ − i_44_0 + i_44_0 ≤ 0 ∧ i_44_0 − i_44_0 ≤ 0 ∧ − i_125_post + i_125_post ≤ 0 ∧ i_125_post − i_125_post ≤ 0 ∧ − i_125_0 + i_125_0 ≤ 0 ∧ i_125_0 − i_125_0 ≤ 0 ∧ − i_108_post + i_108_post ≤ 0 ∧ i_108_post − i_108_post ≤ 0 ∧ − i_108_0 + i_108_0 ≤ 0 ∧ i_108_0 − i_108_0 ≤ 0 ∧ − head_46_post + head_46_post ≤ 0 ∧ head_46_post − head_46_post ≤ 0 ∧ − head_46_0 + head_46_0 ≤ 0 ∧ head_46_0 − head_46_0 ≤ 0 ∧ − fmt_31_4 + fmt_31_4 ≤ 0 ∧ fmt_31_4 − fmt_31_4 ≤ 0 ∧ − fmt_31_3 + fmt_31_3 ≤ 0 ∧ fmt_31_3 − fmt_31_3 ≤ 0 ∧ − ct_17_2 + ct_17_2 ≤ 0 ∧ ct_17_2 − ct_17_2 ≤ 0 ∧ − ct_17_1 + ct_17_1 ≤ 0 ∧ ct_17_1 − ct_17_1 ≤ 0 ∧ − a_328_post + a_328_post ≤ 0 ∧ a_328_post − a_328_post ≤ 0 ∧ − a_328_0 + a_328_0 ≤ 0 ∧ a_328_0 − a_328_0 ≤ 0 ∧ − a_305_post + a_305_post ≤ 0 ∧ a_305_post − a_305_post ≤ 0 ∧ − a_305_0 + a_305_0 ≤ 0 ∧ a_305_0 − a_305_0 ≤ 0 ∧ − a_283_post + a_283_post ≤ 0 ∧ a_283_post − a_283_post ≤ 0 ∧ − a_283_0 + a_283_0 ≤ 0 ∧ a_283_0 − a_283_0 ≤ 0 ∧ − a_26_1 + a_26_1 ≤ 0 ∧ a_26_1 − a_26_1 ≤ 0 ∧ − a_247_post + a_247_post ≤ 0 ∧ a_247_post − a_247_post ≤ 0 ∧ − a_247_0 + a_247_0 ≤ 0 ∧ a_247_0 − a_247_0 ≤ 0 ∧ − a_197_post + a_197_post ≤ 0 ∧ a_197_post − a_197_post ≤ 0 ∧ − a_197_0 + a_197_0 ≤ 0 ∧ a_197_0 − a_197_0 ≤ 0 ∧ − a_146_0 + a_146_0 ≤ 0 ∧ a_146_0 − a_146_0 ≤ 0 | |
| 49 | 74 | 50: | 1 − x_14_0 ≤ 0 ∧ − y_19_post + y_19_post ≤ 0 ∧ y_19_post − y_19_post ≤ 0 ∧ − y_19_2 + y_19_2 ≤ 0 ∧ y_19_2 − y_19_2 ≤ 0 ∧ − y_19_1 + y_19_1 ≤ 0 ∧ y_19_1 − y_19_1 ≤ 0 ∧ − y_19_0 + y_19_0 ≤ 0 ∧ y_19_0 − y_19_0 ≤ 0 ∧ − x_SLAM_f_18_post + x_SLAM_f_18_post ≤ 0 ∧ x_SLAM_f_18_post − x_SLAM_f_18_post ≤ 0 ∧ − x_SLAM_f_18_2 + x_SLAM_f_18_2 ≤ 0 ∧ x_SLAM_f_18_2 − x_SLAM_f_18_2 ≤ 0 ∧ − x_SLAM_f_18_1 + x_SLAM_f_18_1 ≤ 0 ∧ x_SLAM_f_18_1 − x_SLAM_f_18_1 ≤ 0 ∧ − x_SLAM_f_18_0 + x_SLAM_f_18_0 ≤ 0 ∧ x_SLAM_f_18_0 − x_SLAM_f_18_0 ≤ 0 ∧ − x_34_post + x_34_post ≤ 0 ∧ x_34_post − x_34_post ≤ 0 ∧ − x_34_1 + x_34_1 ≤ 0 ∧ x_34_1 − x_34_1 ≤ 0 ∧ − x_34_0 + x_34_0 ≤ 0 ∧ x_34_0 − x_34_0 ≤ 0 ∧ − x_28_post + x_28_post ≤ 0 ∧ x_28_post − x_28_post ≤ 0 ∧ − x_28_1 + x_28_1 ≤ 0 ∧ x_28_1 − x_28_1 ≤ 0 ∧ − x_28_0 + x_28_0 ≤ 0 ∧ x_28_0 − x_28_0 ≤ 0 ∧ − x_238_post + x_238_post ≤ 0 ∧ x_238_post − x_238_post ≤ 0 ∧ − x_238_0 + x_238_0 ≤ 0 ∧ x_238_0 − x_238_0 ≤ 0 ∧ − x_20_post + x_20_post ≤ 0 ∧ x_20_post − x_20_post ≤ 0 ∧ − x_20_2 + x_20_2 ≤ 0 ∧ x_20_2 − x_20_2 ≤ 0 ∧ − x_20_1 + x_20_1 ≤ 0 ∧ x_20_1 − x_20_1 ≤ 0 ∧ − x_20_0 + x_20_0 ≤ 0 ∧ x_20_0 − x_20_0 ≤ 0 ∧ − x_177_post + x_177_post ≤ 0 ∧ x_177_post − x_177_post ≤ 0 ∧ − x_177_0 + x_177_0 ≤ 0 ∧ x_177_0 − x_177_0 ≤ 0 ∧ − x_16_post + x_16_post ≤ 0 ∧ x_16_post − x_16_post ≤ 0 ∧ − x_16_1 + x_16_1 ≤ 0 ∧ x_16_1 − x_16_1 ≤ 0 ∧ − x_16_0 + x_16_0 ≤ 0 ∧ x_16_0 − x_16_0 ≤ 0 ∧ − x_14_post + x_14_post ≤ 0 ∧ x_14_post − x_14_post ≤ 0 ∧ − x_14_0 + x_14_0 ≤ 0 ∧ x_14_0 − x_14_0 ≤ 0 ∧ − tmp_48_post + tmp_48_post ≤ 0 ∧ tmp_48_post − tmp_48_post ≤ 0 ∧ − tmp_48_0 + tmp_48_0 ≤ 0 ∧ tmp_48_0 − tmp_48_0 ≤ 0 ∧ − temp_49_post + temp_49_post ≤ 0 ∧ temp_49_post − temp_49_post ≤ 0 ∧ − temp_49_0 + temp_49_0 ≤ 0 ∧ temp_49_0 − temp_49_0 ≤ 0 ∧ − temp0_45_post + temp0_45_post ≤ 0 ∧ temp0_45_post − temp0_45_post ≤ 0 ∧ − temp0_45_1 + temp0_45_1 ≤ 0 ∧ temp0_45_1 − temp0_45_1 ≤ 0 ∧ − temp0_45_0 + temp0_45_0 ≤ 0 ∧ temp0_45_0 − temp0_45_0 ≤ 0 ∧ − temp0_32_post + temp0_32_post ≤ 0 ∧ temp0_32_post − temp0_32_post ≤ 0 ∧ − temp0_32_4 + temp0_32_4 ≤ 0 ∧ temp0_32_4 − temp0_32_4 ≤ 0 ∧ − temp0_32_3 + temp0_32_3 ≤ 0 ∧ temp0_32_3 − temp0_32_3 ≤ 0 ∧ − temp0_32_2 + temp0_32_2 ≤ 0 ∧ temp0_32_2 − temp0_32_2 ≤ 0 ∧ − temp0_32_1 + temp0_32_1 ≤ 0 ∧ temp0_32_1 − temp0_32_1 ≤ 0 ∧ − temp0_32_0 + temp0_32_0 ≤ 0 ∧ temp0_32_0 − temp0_32_0 ≤ 0 ∧ − temp0_15_0 + temp0_15_0 ≤ 0 ∧ temp0_15_0 − temp0_15_0 ≤ 0 ∧ − t_23_post + t_23_post ≤ 0 ∧ t_23_post − t_23_post ≤ 0 ∧ − t_23_1 + t_23_1 ≤ 0 ∧ t_23_1 − t_23_1 ≤ 0 ∧ − t_23_0 + t_23_0 ≤ 0 ∧ t_23_0 − t_23_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_post + result_dot_printf_sdv_special_RETURN_VALUE_41_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_post − result_dot_printf_sdv_special_RETURN_VALUE_41_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_1 + result_dot_printf_sdv_special_RETURN_VALUE_41_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_1 − result_dot_printf_sdv_special_RETURN_VALUE_41_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_0 + result_dot_printf_sdv_special_RETURN_VALUE_41_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_0 − result_dot_printf_sdv_special_RETURN_VALUE_41_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_post + result_dot_printf_sdv_special_RETURN_VALUE_38_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_post − result_dot_printf_sdv_special_RETURN_VALUE_38_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_1 + result_dot_printf_sdv_special_RETURN_VALUE_38_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_1 − result_dot_printf_sdv_special_RETURN_VALUE_38_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_0 + result_dot_printf_sdv_special_RETURN_VALUE_38_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_0 − result_dot_printf_sdv_special_RETURN_VALUE_38_0 ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_post + result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_post − result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_1 + result_dot_nondet_sdv_special_RETURN_VALUE_13_1 ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_1 − result_dot_nondet_sdv_special_RETURN_VALUE_13_1 ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_0 + result_dot_nondet_sdv_special_RETURN_VALUE_13_0 ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_0 − result_dot_nondet_sdv_special_RETURN_VALUE_13_0 ≤ 0 ∧ − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post + result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post ≤ 0 ∧ result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post ≤ 0 ∧ − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 + result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 ≤ 0 ∧ result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 ≤ 0 ∧ − result_11_post + result_11_post ≤ 0 ∧ result_11_post − result_11_post ≤ 0 ∧ − result_11_6 + result_11_6 ≤ 0 ∧ result_11_6 − result_11_6 ≤ 0 ∧ − result_11_5 + result_11_5 ≤ 0 ∧ result_11_5 − result_11_5 ≤ 0 ∧ − result_11_4 + result_11_4 ≤ 0 ∧ result_11_4 − result_11_4 ≤ 0 ∧ − result_11_3 + result_11_3 ≤ 0 ∧ result_11_3 − result_11_3 ≤ 0 ∧ − result_11_2 + result_11_2 ≤ 0 ∧ result_11_2 − result_11_2 ≤ 0 ∧ − result_11_1 + result_11_1 ≤ 0 ∧ result_11_1 − result_11_1 ≤ 0 ∧ − result_11_0 + result_11_0 ≤ 0 ∧ result_11_0 − result_11_0 ≤ 0 ∧ − rcd_72_post + rcd_72_post ≤ 0 ∧ rcd_72_post − rcd_72_post ≤ 0 ∧ − rcd_72_0 + rcd_72_0 ≤ 0 ∧ rcd_72_0 − rcd_72_0 ≤ 0 ∧ − rcd_102_post + rcd_102_post ≤ 0 ∧ rcd_102_post − rcd_102_post ≤ 0 ∧ − rcd_102_0 + rcd_102_0 ≤ 0 ∧ rcd_102_0 − rcd_102_0 ≤ 0 ∧ − r_53_post + r_53_post ≤ 0 ∧ r_53_post − r_53_post ≤ 0 ∧ − r_53_0 + r_53_0 ≤ 0 ∧ r_53_0 − r_53_0 ≤ 0 ∧ − r_161_post + r_161_post ≤ 0 ∧ r_161_post − r_161_post ≤ 0 ∧ − r_161_0 + r_161_0 ≤ 0 ∧ r_161_0 − r_161_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 ≤ 0 ∧ − nondet_12_post + nondet_12_post ≤ 0 ∧ nondet_12_post − nondet_12_post ≤ 0 ∧ − nondet_12_1 + nondet_12_1 ≤ 0 ∧ nondet_12_1 − nondet_12_1 ≤ 0 ∧ − nondet_12_0 + nondet_12_0 ≤ 0 ∧ nondet_12_0 − nondet_12_0 ≤ 0 ∧ − lt_37_post + lt_37_post ≤ 0 ∧ lt_37_post − lt_37_post ≤ 0 ∧ − lt_37_1 + lt_37_1 ≤ 0 ∧ lt_37_1 − lt_37_1 ≤ 0 ∧ − lt_37_0 + lt_37_0 ≤ 0 ∧ lt_37_0 − lt_37_0 ≤ 0 ∧ − lt_36_post + lt_36_post ≤ 0 ∧ lt_36_post − lt_36_post ≤ 0 ∧ − lt_36_0 + lt_36_0 ≤ 0 ∧ lt_36_0 − lt_36_0 ≤ 0 ∧ − lt_237_post + lt_237_post ≤ 0 ∧ lt_237_post − lt_237_post ≤ 0 ∧ − lt_237_0 + lt_237_0 ≤ 0 ∧ lt_237_0 − lt_237_0 ≤ 0 ∧ − length_43_post + length_43_post ≤ 0 ∧ length_43_post − length_43_post ≤ 0 ∧ − length_43_0 + length_43_0 ≤ 0 ∧ length_43_0 − length_43_0 ≤ 0 ∧ − len_246_post + len_246_post ≤ 0 ∧ len_246_post − len_246_post ≤ 0 ∧ − len_246_0 + len_246_0 ≤ 0 ∧ len_246_0 − len_246_0 ≤ 0 ∧ − len_180_post + len_180_post ≤ 0 ∧ len_180_post − len_180_post ≤ 0 ∧ − len_180_0 + len_180_0 ≤ 0 ∧ len_180_0 − len_180_0 ≤ 0 ∧ − i_44_post + i_44_post ≤ 0 ∧ i_44_post − i_44_post ≤ 0 ∧ − i_44_0 + i_44_0 ≤ 0 ∧ i_44_0 − i_44_0 ≤ 0 ∧ − i_125_post + i_125_post ≤ 0 ∧ i_125_post − i_125_post ≤ 0 ∧ − i_125_0 + i_125_0 ≤ 0 ∧ i_125_0 − i_125_0 ≤ 0 ∧ − i_108_post + i_108_post ≤ 0 ∧ i_108_post − i_108_post ≤ 0 ∧ − i_108_0 + i_108_0 ≤ 0 ∧ i_108_0 − i_108_0 ≤ 0 ∧ − head_46_post + head_46_post ≤ 0 ∧ head_46_post − head_46_post ≤ 0 ∧ − head_46_0 + head_46_0 ≤ 0 ∧ head_46_0 − head_46_0 ≤ 0 ∧ − fmt_31_post + fmt_31_post ≤ 0 ∧ fmt_31_post − fmt_31_post ≤ 0 ∧ − fmt_31_4 + fmt_31_4 ≤ 0 ∧ fmt_31_4 − fmt_31_4 ≤ 0 ∧ − fmt_31_3 + fmt_31_3 ≤ 0 ∧ fmt_31_3 − fmt_31_3 ≤ 0 ∧ − fmt_31_2 + fmt_31_2 ≤ 0 ∧ fmt_31_2 − fmt_31_2 ≤ 0 ∧ − fmt_31_1 + fmt_31_1 ≤ 0 ∧ fmt_31_1 − fmt_31_1 ≤ 0 ∧ − fmt_31_0 + fmt_31_0 ≤ 0 ∧ fmt_31_0 − fmt_31_0 ≤ 0 ∧ − ct_17_post + ct_17_post ≤ 0 ∧ ct_17_post − ct_17_post ≤ 0 ∧ − ct_17_2 + ct_17_2 ≤ 0 ∧ ct_17_2 − ct_17_2 ≤ 0 ∧ − ct_17_1 + ct_17_1 ≤ 0 ∧ ct_17_1 − ct_17_1 ≤ 0 ∧ − ct_17_0 + ct_17_0 ≤ 0 ∧ ct_17_0 − ct_17_0 ≤ 0 ∧ − a_328_post + a_328_post ≤ 0 ∧ a_328_post − a_328_post ≤ 0 ∧ − a_328_0 + a_328_0 ≤ 0 ∧ a_328_0 − a_328_0 ≤ 0 ∧ − a_305_post + a_305_post ≤ 0 ∧ a_305_post − a_305_post ≤ 0 ∧ − a_305_0 + a_305_0 ≤ 0 ∧ a_305_0 − a_305_0 ≤ 0 ∧ − a_283_post + a_283_post ≤ 0 ∧ a_283_post − a_283_post ≤ 0 ∧ − a_283_0 + a_283_0 ≤ 0 ∧ a_283_0 − a_283_0 ≤ 0 ∧ − a_26_post + a_26_post ≤ 0 ∧ a_26_post − a_26_post ≤ 0 ∧ − a_26_1 + a_26_1 ≤ 0 ∧ a_26_1 − a_26_1 ≤ 0 ∧ − a_26_0 + a_26_0 ≤ 0 ∧ a_26_0 − a_26_0 ≤ 0 ∧ − a_247_post + a_247_post ≤ 0 ∧ a_247_post − a_247_post ≤ 0 ∧ − a_247_0 + a_247_0 ≤ 0 ∧ a_247_0 − a_247_0 ≤ 0 ∧ − a_197_post + a_197_post ≤ 0 ∧ a_197_post − a_197_post ≤ 0 ∧ − a_197_0 + a_197_0 ≤ 0 ∧ a_197_0 − a_197_0 ≤ 0 ∧ − a_146_0 + a_146_0 ≤ 0 ∧ a_146_0 − a_146_0 ≤ 0 | |
| 49 | 75 | 50: | 1 + x_14_0 ≤ 0 ∧ − y_19_post + y_19_post ≤ 0 ∧ y_19_post − y_19_post ≤ 0 ∧ − y_19_2 + y_19_2 ≤ 0 ∧ y_19_2 − y_19_2 ≤ 0 ∧ − y_19_1 + y_19_1 ≤ 0 ∧ y_19_1 − y_19_1 ≤ 0 ∧ − y_19_0 + y_19_0 ≤ 0 ∧ y_19_0 − y_19_0 ≤ 0 ∧ − x_SLAM_f_18_post + x_SLAM_f_18_post ≤ 0 ∧ x_SLAM_f_18_post − x_SLAM_f_18_post ≤ 0 ∧ − x_SLAM_f_18_2 + x_SLAM_f_18_2 ≤ 0 ∧ x_SLAM_f_18_2 − x_SLAM_f_18_2 ≤ 0 ∧ − x_SLAM_f_18_1 + x_SLAM_f_18_1 ≤ 0 ∧ x_SLAM_f_18_1 − x_SLAM_f_18_1 ≤ 0 ∧ − x_SLAM_f_18_0 + x_SLAM_f_18_0 ≤ 0 ∧ x_SLAM_f_18_0 − x_SLAM_f_18_0 ≤ 0 ∧ − x_34_post + x_34_post ≤ 0 ∧ x_34_post − x_34_post ≤ 0 ∧ − x_34_1 + x_34_1 ≤ 0 ∧ x_34_1 − x_34_1 ≤ 0 ∧ − x_34_0 + x_34_0 ≤ 0 ∧ x_34_0 − x_34_0 ≤ 0 ∧ − x_28_post + x_28_post ≤ 0 ∧ x_28_post − x_28_post ≤ 0 ∧ − x_28_1 + x_28_1 ≤ 0 ∧ x_28_1 − x_28_1 ≤ 0 ∧ − x_28_0 + x_28_0 ≤ 0 ∧ x_28_0 − x_28_0 ≤ 0 ∧ − x_238_post + x_238_post ≤ 0 ∧ x_238_post − x_238_post ≤ 0 ∧ − x_238_0 + x_238_0 ≤ 0 ∧ x_238_0 − x_238_0 ≤ 0 ∧ − x_20_post + x_20_post ≤ 0 ∧ x_20_post − x_20_post ≤ 0 ∧ − x_20_2 + x_20_2 ≤ 0 ∧ x_20_2 − x_20_2 ≤ 0 ∧ − x_20_1 + x_20_1 ≤ 0 ∧ x_20_1 − x_20_1 ≤ 0 ∧ − x_20_0 + x_20_0 ≤ 0 ∧ x_20_0 − x_20_0 ≤ 0 ∧ − x_177_post + x_177_post ≤ 0 ∧ x_177_post − x_177_post ≤ 0 ∧ − x_177_0 + x_177_0 ≤ 0 ∧ x_177_0 − x_177_0 ≤ 0 ∧ − x_16_post + x_16_post ≤ 0 ∧ x_16_post − x_16_post ≤ 0 ∧ − x_16_1 + x_16_1 ≤ 0 ∧ x_16_1 − x_16_1 ≤ 0 ∧ − x_16_0 + x_16_0 ≤ 0 ∧ x_16_0 − x_16_0 ≤ 0 ∧ − x_14_post + x_14_post ≤ 0 ∧ x_14_post − x_14_post ≤ 0 ∧ − x_14_0 + x_14_0 ≤ 0 ∧ x_14_0 − x_14_0 ≤ 0 ∧ − tmp_48_post + tmp_48_post ≤ 0 ∧ tmp_48_post − tmp_48_post ≤ 0 ∧ − tmp_48_0 + tmp_48_0 ≤ 0 ∧ tmp_48_0 − tmp_48_0 ≤ 0 ∧ − temp_49_post + temp_49_post ≤ 0 ∧ temp_49_post − temp_49_post ≤ 0 ∧ − temp_49_0 + temp_49_0 ≤ 0 ∧ temp_49_0 − temp_49_0 ≤ 0 ∧ − temp0_45_post + temp0_45_post ≤ 0 ∧ temp0_45_post − temp0_45_post ≤ 0 ∧ − temp0_45_1 + temp0_45_1 ≤ 0 ∧ temp0_45_1 − temp0_45_1 ≤ 0 ∧ − temp0_45_0 + temp0_45_0 ≤ 0 ∧ temp0_45_0 − temp0_45_0 ≤ 0 ∧ − temp0_32_post + temp0_32_post ≤ 0 ∧ temp0_32_post − temp0_32_post ≤ 0 ∧ − temp0_32_4 + temp0_32_4 ≤ 0 ∧ temp0_32_4 − temp0_32_4 ≤ 0 ∧ − temp0_32_3 + temp0_32_3 ≤ 0 ∧ temp0_32_3 − temp0_32_3 ≤ 0 ∧ − temp0_32_2 + temp0_32_2 ≤ 0 ∧ temp0_32_2 − temp0_32_2 ≤ 0 ∧ − temp0_32_1 + temp0_32_1 ≤ 0 ∧ temp0_32_1 − temp0_32_1 ≤ 0 ∧ − temp0_32_0 + temp0_32_0 ≤ 0 ∧ temp0_32_0 − temp0_32_0 ≤ 0 ∧ − temp0_15_0 + temp0_15_0 ≤ 0 ∧ temp0_15_0 − temp0_15_0 ≤ 0 ∧ − t_23_post + t_23_post ≤ 0 ∧ t_23_post − t_23_post ≤ 0 ∧ − t_23_1 + t_23_1 ≤ 0 ∧ t_23_1 − t_23_1 ≤ 0 ∧ − t_23_0 + t_23_0 ≤ 0 ∧ t_23_0 − t_23_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_post + result_dot_printf_sdv_special_RETURN_VALUE_41_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_post − result_dot_printf_sdv_special_RETURN_VALUE_41_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_1 + result_dot_printf_sdv_special_RETURN_VALUE_41_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_1 − result_dot_printf_sdv_special_RETURN_VALUE_41_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_0 + result_dot_printf_sdv_special_RETURN_VALUE_41_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_0 − result_dot_printf_sdv_special_RETURN_VALUE_41_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_post + result_dot_printf_sdv_special_RETURN_VALUE_38_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_post − result_dot_printf_sdv_special_RETURN_VALUE_38_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_1 + result_dot_printf_sdv_special_RETURN_VALUE_38_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_1 − result_dot_printf_sdv_special_RETURN_VALUE_38_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_0 + result_dot_printf_sdv_special_RETURN_VALUE_38_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_0 − result_dot_printf_sdv_special_RETURN_VALUE_38_0 ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_post + result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_post − result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_1 + result_dot_nondet_sdv_special_RETURN_VALUE_13_1 ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_1 − result_dot_nondet_sdv_special_RETURN_VALUE_13_1 ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_0 + result_dot_nondet_sdv_special_RETURN_VALUE_13_0 ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_0 − result_dot_nondet_sdv_special_RETURN_VALUE_13_0 ≤ 0 ∧ − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post + result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post ≤ 0 ∧ result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post ≤ 0 ∧ − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 + result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 ≤ 0 ∧ result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 ≤ 0 ∧ − result_11_post + result_11_post ≤ 0 ∧ result_11_post − result_11_post ≤ 0 ∧ − result_11_6 + result_11_6 ≤ 0 ∧ result_11_6 − result_11_6 ≤ 0 ∧ − result_11_5 + result_11_5 ≤ 0 ∧ result_11_5 − result_11_5 ≤ 0 ∧ − result_11_4 + result_11_4 ≤ 0 ∧ result_11_4 − result_11_4 ≤ 0 ∧ − result_11_3 + result_11_3 ≤ 0 ∧ result_11_3 − result_11_3 ≤ 0 ∧ − result_11_2 + result_11_2 ≤ 0 ∧ result_11_2 − result_11_2 ≤ 0 ∧ − result_11_1 + result_11_1 ≤ 0 ∧ result_11_1 − result_11_1 ≤ 0 ∧ − result_11_0 + result_11_0 ≤ 0 ∧ result_11_0 − result_11_0 ≤ 0 ∧ − rcd_72_post + rcd_72_post ≤ 0 ∧ rcd_72_post − rcd_72_post ≤ 0 ∧ − rcd_72_0 + rcd_72_0 ≤ 0 ∧ rcd_72_0 − rcd_72_0 ≤ 0 ∧ − rcd_102_post + rcd_102_post ≤ 0 ∧ rcd_102_post − rcd_102_post ≤ 0 ∧ − rcd_102_0 + rcd_102_0 ≤ 0 ∧ rcd_102_0 − rcd_102_0 ≤ 0 ∧ − r_53_post + r_53_post ≤ 0 ∧ r_53_post − r_53_post ≤ 0 ∧ − r_53_0 + r_53_0 ≤ 0 ∧ r_53_0 − r_53_0 ≤ 0 ∧ − r_161_post + r_161_post ≤ 0 ∧ r_161_post − r_161_post ≤ 0 ∧ − r_161_0 + r_161_0 ≤ 0 ∧ r_161_0 − r_161_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 ≤ 0 ∧ − nondet_12_post + nondet_12_post ≤ 0 ∧ nondet_12_post − nondet_12_post ≤ 0 ∧ − nondet_12_1 + nondet_12_1 ≤ 0 ∧ nondet_12_1 − nondet_12_1 ≤ 0 ∧ − nondet_12_0 + nondet_12_0 ≤ 0 ∧ nondet_12_0 − nondet_12_0 ≤ 0 ∧ − lt_37_post + lt_37_post ≤ 0 ∧ lt_37_post − lt_37_post ≤ 0 ∧ − lt_37_1 + lt_37_1 ≤ 0 ∧ lt_37_1 − lt_37_1 ≤ 0 ∧ − lt_37_0 + lt_37_0 ≤ 0 ∧ lt_37_0 − lt_37_0 ≤ 0 ∧ − lt_36_post + lt_36_post ≤ 0 ∧ lt_36_post − lt_36_post ≤ 0 ∧ − lt_36_0 + lt_36_0 ≤ 0 ∧ lt_36_0 − lt_36_0 ≤ 0 ∧ − lt_237_post + lt_237_post ≤ 0 ∧ lt_237_post − lt_237_post ≤ 0 ∧ − lt_237_0 + lt_237_0 ≤ 0 ∧ lt_237_0 − lt_237_0 ≤ 0 ∧ − length_43_post + length_43_post ≤ 0 ∧ length_43_post − length_43_post ≤ 0 ∧ − length_43_0 + length_43_0 ≤ 0 ∧ length_43_0 − length_43_0 ≤ 0 ∧ − len_246_post + len_246_post ≤ 0 ∧ len_246_post − len_246_post ≤ 0 ∧ − len_246_0 + len_246_0 ≤ 0 ∧ len_246_0 − len_246_0 ≤ 0 ∧ − len_180_post + len_180_post ≤ 0 ∧ len_180_post − len_180_post ≤ 0 ∧ − len_180_0 + len_180_0 ≤ 0 ∧ len_180_0 − len_180_0 ≤ 0 ∧ − i_44_post + i_44_post ≤ 0 ∧ i_44_post − i_44_post ≤ 0 ∧ − i_44_0 + i_44_0 ≤ 0 ∧ i_44_0 − i_44_0 ≤ 0 ∧ − i_125_post + i_125_post ≤ 0 ∧ i_125_post − i_125_post ≤ 0 ∧ − i_125_0 + i_125_0 ≤ 0 ∧ i_125_0 − i_125_0 ≤ 0 ∧ − i_108_post + i_108_post ≤ 0 ∧ i_108_post − i_108_post ≤ 0 ∧ − i_108_0 + i_108_0 ≤ 0 ∧ i_108_0 − i_108_0 ≤ 0 ∧ − head_46_post + head_46_post ≤ 0 ∧ head_46_post − head_46_post ≤ 0 ∧ − head_46_0 + head_46_0 ≤ 0 ∧ head_46_0 − head_46_0 ≤ 0 ∧ − fmt_31_post + fmt_31_post ≤ 0 ∧ fmt_31_post − fmt_31_post ≤ 0 ∧ − fmt_31_4 + fmt_31_4 ≤ 0 ∧ fmt_31_4 − fmt_31_4 ≤ 0 ∧ − fmt_31_3 + fmt_31_3 ≤ 0 ∧ fmt_31_3 − fmt_31_3 ≤ 0 ∧ − fmt_31_2 + fmt_31_2 ≤ 0 ∧ fmt_31_2 − fmt_31_2 ≤ 0 ∧ − fmt_31_1 + fmt_31_1 ≤ 0 ∧ fmt_31_1 − fmt_31_1 ≤ 0 ∧ − fmt_31_0 + fmt_31_0 ≤ 0 ∧ fmt_31_0 − fmt_31_0 ≤ 0 ∧ − ct_17_post + ct_17_post ≤ 0 ∧ ct_17_post − ct_17_post ≤ 0 ∧ − ct_17_2 + ct_17_2 ≤ 0 ∧ ct_17_2 − ct_17_2 ≤ 0 ∧ − ct_17_1 + ct_17_1 ≤ 0 ∧ ct_17_1 − ct_17_1 ≤ 0 ∧ − ct_17_0 + ct_17_0 ≤ 0 ∧ ct_17_0 − ct_17_0 ≤ 0 ∧ − a_328_post + a_328_post ≤ 0 ∧ a_328_post − a_328_post ≤ 0 ∧ − a_328_0 + a_328_0 ≤ 0 ∧ a_328_0 − a_328_0 ≤ 0 ∧ − a_305_post + a_305_post ≤ 0 ∧ a_305_post − a_305_post ≤ 0 ∧ − a_305_0 + a_305_0 ≤ 0 ∧ a_305_0 − a_305_0 ≤ 0 ∧ − a_283_post + a_283_post ≤ 0 ∧ a_283_post − a_283_post ≤ 0 ∧ − a_283_0 + a_283_0 ≤ 0 ∧ a_283_0 − a_283_0 ≤ 0 ∧ − a_26_post + a_26_post ≤ 0 ∧ a_26_post − a_26_post ≤ 0 ∧ − a_26_1 + a_26_1 ≤ 0 ∧ a_26_1 − a_26_1 ≤ 0 ∧ − a_26_0 + a_26_0 ≤ 0 ∧ a_26_0 − a_26_0 ≤ 0 ∧ − a_247_post + a_247_post ≤ 0 ∧ a_247_post − a_247_post ≤ 0 ∧ − a_247_0 + a_247_0 ≤ 0 ∧ a_247_0 − a_247_0 ≤ 0 ∧ − a_197_post + a_197_post ≤ 0 ∧ a_197_post − a_197_post ≤ 0 ∧ − a_197_0 + a_197_0 ≤ 0 ∧ a_197_0 − a_197_0 ≤ 0 ∧ − a_146_0 + a_146_0 ≤ 0 ∧ a_146_0 − a_146_0 ≤ 0 | |
| 50 | 76 | 11: | 1 − result_dot_nondet_sdv_special_RETURN_VALUE_13_0 ≤ 0 ∧ 2 − result_dot_nondet_sdv_special_RETURN_VALUE_13_0 ≤ 0 ∧ − y_19_post + y_19_post ≤ 0 ∧ y_19_post − y_19_post ≤ 0 ∧ − y_19_2 + y_19_2 ≤ 0 ∧ y_19_2 − y_19_2 ≤ 0 ∧ − y_19_1 + y_19_1 ≤ 0 ∧ y_19_1 − y_19_1 ≤ 0 ∧ − y_19_0 + y_19_0 ≤ 0 ∧ y_19_0 − y_19_0 ≤ 0 ∧ − x_SLAM_f_18_post + x_SLAM_f_18_post ≤ 0 ∧ x_SLAM_f_18_post − x_SLAM_f_18_post ≤ 0 ∧ − x_SLAM_f_18_2 + x_SLAM_f_18_2 ≤ 0 ∧ x_SLAM_f_18_2 − x_SLAM_f_18_2 ≤ 0 ∧ − x_SLAM_f_18_1 + x_SLAM_f_18_1 ≤ 0 ∧ x_SLAM_f_18_1 − x_SLAM_f_18_1 ≤ 0 ∧ − x_SLAM_f_18_0 + x_SLAM_f_18_0 ≤ 0 ∧ x_SLAM_f_18_0 − x_SLAM_f_18_0 ≤ 0 ∧ − x_34_post + x_34_post ≤ 0 ∧ x_34_post − x_34_post ≤ 0 ∧ − x_34_1 + x_34_1 ≤ 0 ∧ x_34_1 − x_34_1 ≤ 0 ∧ − x_34_0 + x_34_0 ≤ 0 ∧ x_34_0 − x_34_0 ≤ 0 ∧ − x_28_post + x_28_post ≤ 0 ∧ x_28_post − x_28_post ≤ 0 ∧ − x_28_1 + x_28_1 ≤ 0 ∧ x_28_1 − x_28_1 ≤ 0 ∧ − x_28_0 + x_28_0 ≤ 0 ∧ x_28_0 − x_28_0 ≤ 0 ∧ − x_238_post + x_238_post ≤ 0 ∧ x_238_post − x_238_post ≤ 0 ∧ − x_238_0 + x_238_0 ≤ 0 ∧ x_238_0 − x_238_0 ≤ 0 ∧ − x_20_post + x_20_post ≤ 0 ∧ x_20_post − x_20_post ≤ 0 ∧ − x_20_2 + x_20_2 ≤ 0 ∧ x_20_2 − x_20_2 ≤ 0 ∧ − x_20_1 + x_20_1 ≤ 0 ∧ x_20_1 − x_20_1 ≤ 0 ∧ − x_20_0 + x_20_0 ≤ 0 ∧ x_20_0 − x_20_0 ≤ 0 ∧ − x_177_post + x_177_post ≤ 0 ∧ x_177_post − x_177_post ≤ 0 ∧ − x_177_0 + x_177_0 ≤ 0 ∧ x_177_0 − x_177_0 ≤ 0 ∧ − x_16_post + x_16_post ≤ 0 ∧ x_16_post − x_16_post ≤ 0 ∧ − x_16_1 + x_16_1 ≤ 0 ∧ x_16_1 − x_16_1 ≤ 0 ∧ − x_16_0 + x_16_0 ≤ 0 ∧ x_16_0 − x_16_0 ≤ 0 ∧ − x_14_post + x_14_post ≤ 0 ∧ x_14_post − x_14_post ≤ 0 ∧ − x_14_0 + x_14_0 ≤ 0 ∧ x_14_0 − x_14_0 ≤ 0 ∧ − tmp_48_post + tmp_48_post ≤ 0 ∧ tmp_48_post − tmp_48_post ≤ 0 ∧ − tmp_48_0 + tmp_48_0 ≤ 0 ∧ tmp_48_0 − tmp_48_0 ≤ 0 ∧ − temp_49_post + temp_49_post ≤ 0 ∧ temp_49_post − temp_49_post ≤ 0 ∧ − temp_49_0 + temp_49_0 ≤ 0 ∧ temp_49_0 − temp_49_0 ≤ 0 ∧ − temp0_45_post + temp0_45_post ≤ 0 ∧ temp0_45_post − temp0_45_post ≤ 0 ∧ − temp0_45_1 + temp0_45_1 ≤ 0 ∧ temp0_45_1 − temp0_45_1 ≤ 0 ∧ − temp0_45_0 + temp0_45_0 ≤ 0 ∧ temp0_45_0 − temp0_45_0 ≤ 0 ∧ − temp0_32_post + temp0_32_post ≤ 0 ∧ temp0_32_post − temp0_32_post ≤ 0 ∧ − temp0_32_4 + temp0_32_4 ≤ 0 ∧ temp0_32_4 − temp0_32_4 ≤ 0 ∧ − temp0_32_3 + temp0_32_3 ≤ 0 ∧ temp0_32_3 − temp0_32_3 ≤ 0 ∧ − temp0_32_2 + temp0_32_2 ≤ 0 ∧ temp0_32_2 − temp0_32_2 ≤ 0 ∧ − temp0_32_1 + temp0_32_1 ≤ 0 ∧ temp0_32_1 − temp0_32_1 ≤ 0 ∧ − temp0_32_0 + temp0_32_0 ≤ 0 ∧ temp0_32_0 − temp0_32_0 ≤ 0 ∧ − temp0_15_0 + temp0_15_0 ≤ 0 ∧ temp0_15_0 − temp0_15_0 ≤ 0 ∧ − t_23_post + t_23_post ≤ 0 ∧ t_23_post − t_23_post ≤ 0 ∧ − t_23_1 + t_23_1 ≤ 0 ∧ t_23_1 − t_23_1 ≤ 0 ∧ − t_23_0 + t_23_0 ≤ 0 ∧ t_23_0 − t_23_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_post + result_dot_printf_sdv_special_RETURN_VALUE_41_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_post − result_dot_printf_sdv_special_RETURN_VALUE_41_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_1 + result_dot_printf_sdv_special_RETURN_VALUE_41_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_1 − result_dot_printf_sdv_special_RETURN_VALUE_41_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_0 + result_dot_printf_sdv_special_RETURN_VALUE_41_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_0 − result_dot_printf_sdv_special_RETURN_VALUE_41_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_post + result_dot_printf_sdv_special_RETURN_VALUE_38_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_post − result_dot_printf_sdv_special_RETURN_VALUE_38_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_1 + result_dot_printf_sdv_special_RETURN_VALUE_38_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_1 − result_dot_printf_sdv_special_RETURN_VALUE_38_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_0 + result_dot_printf_sdv_special_RETURN_VALUE_38_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_0 − result_dot_printf_sdv_special_RETURN_VALUE_38_0 ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_post + result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_post − result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_1 + result_dot_nondet_sdv_special_RETURN_VALUE_13_1 ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_1 − result_dot_nondet_sdv_special_RETURN_VALUE_13_1 ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_0 + result_dot_nondet_sdv_special_RETURN_VALUE_13_0 ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_0 − result_dot_nondet_sdv_special_RETURN_VALUE_13_0 ≤ 0 ∧ − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post + result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post ≤ 0 ∧ result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post ≤ 0 ∧ − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 + result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 ≤ 0 ∧ result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 ≤ 0 ∧ − result_11_post + result_11_post ≤ 0 ∧ result_11_post − result_11_post ≤ 0 ∧ − result_11_6 + result_11_6 ≤ 0 ∧ result_11_6 − result_11_6 ≤ 0 ∧ − result_11_5 + result_11_5 ≤ 0 ∧ result_11_5 − result_11_5 ≤ 0 ∧ − result_11_4 + result_11_4 ≤ 0 ∧ result_11_4 − result_11_4 ≤ 0 ∧ − result_11_3 + result_11_3 ≤ 0 ∧ result_11_3 − result_11_3 ≤ 0 ∧ − result_11_2 + result_11_2 ≤ 0 ∧ result_11_2 − result_11_2 ≤ 0 ∧ − result_11_1 + result_11_1 ≤ 0 ∧ result_11_1 − result_11_1 ≤ 0 ∧ − result_11_0 + result_11_0 ≤ 0 ∧ result_11_0 − result_11_0 ≤ 0 ∧ − rcd_72_post + rcd_72_post ≤ 0 ∧ rcd_72_post − rcd_72_post ≤ 0 ∧ − rcd_72_0 + rcd_72_0 ≤ 0 ∧ rcd_72_0 − rcd_72_0 ≤ 0 ∧ − rcd_102_post + rcd_102_post ≤ 0 ∧ rcd_102_post − rcd_102_post ≤ 0 ∧ − rcd_102_0 + rcd_102_0 ≤ 0 ∧ rcd_102_0 − rcd_102_0 ≤ 0 ∧ − r_53_post + r_53_post ≤ 0 ∧ r_53_post − r_53_post ≤ 0 ∧ − r_53_0 + r_53_0 ≤ 0 ∧ r_53_0 − r_53_0 ≤ 0 ∧ − r_161_post + r_161_post ≤ 0 ∧ r_161_post − r_161_post ≤ 0 ∧ − r_161_0 + r_161_0 ≤ 0 ∧ r_161_0 − r_161_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 ≤ 0 ∧ − nondet_12_post + nondet_12_post ≤ 0 ∧ nondet_12_post − nondet_12_post ≤ 0 ∧ − nondet_12_1 + nondet_12_1 ≤ 0 ∧ nondet_12_1 − nondet_12_1 ≤ 0 ∧ − nondet_12_0 + nondet_12_0 ≤ 0 ∧ nondet_12_0 − nondet_12_0 ≤ 0 ∧ − lt_37_post + lt_37_post ≤ 0 ∧ lt_37_post − lt_37_post ≤ 0 ∧ − lt_37_1 + lt_37_1 ≤ 0 ∧ lt_37_1 − lt_37_1 ≤ 0 ∧ − lt_37_0 + lt_37_0 ≤ 0 ∧ lt_37_0 − lt_37_0 ≤ 0 ∧ − lt_36_post + lt_36_post ≤ 0 ∧ lt_36_post − lt_36_post ≤ 0 ∧ − lt_36_0 + lt_36_0 ≤ 0 ∧ lt_36_0 − lt_36_0 ≤ 0 ∧ − lt_237_post + lt_237_post ≤ 0 ∧ lt_237_post − lt_237_post ≤ 0 ∧ − lt_237_0 + lt_237_0 ≤ 0 ∧ lt_237_0 − lt_237_0 ≤ 0 ∧ − length_43_post + length_43_post ≤ 0 ∧ length_43_post − length_43_post ≤ 0 ∧ − length_43_0 + length_43_0 ≤ 0 ∧ length_43_0 − length_43_0 ≤ 0 ∧ − len_246_post + len_246_post ≤ 0 ∧ len_246_post − len_246_post ≤ 0 ∧ − len_246_0 + len_246_0 ≤ 0 ∧ len_246_0 − len_246_0 ≤ 0 ∧ − len_180_post + len_180_post ≤ 0 ∧ len_180_post − len_180_post ≤ 0 ∧ − len_180_0 + len_180_0 ≤ 0 ∧ len_180_0 − len_180_0 ≤ 0 ∧ − i_44_post + i_44_post ≤ 0 ∧ i_44_post − i_44_post ≤ 0 ∧ − i_44_0 + i_44_0 ≤ 0 ∧ i_44_0 − i_44_0 ≤ 0 ∧ − i_125_post + i_125_post ≤ 0 ∧ i_125_post − i_125_post ≤ 0 ∧ − i_125_0 + i_125_0 ≤ 0 ∧ i_125_0 − i_125_0 ≤ 0 ∧ − i_108_post + i_108_post ≤ 0 ∧ i_108_post − i_108_post ≤ 0 ∧ − i_108_0 + i_108_0 ≤ 0 ∧ i_108_0 − i_108_0 ≤ 0 ∧ − head_46_post + head_46_post ≤ 0 ∧ head_46_post − head_46_post ≤ 0 ∧ − head_46_0 + head_46_0 ≤ 0 ∧ head_46_0 − head_46_0 ≤ 0 ∧ − fmt_31_post + fmt_31_post ≤ 0 ∧ fmt_31_post − fmt_31_post ≤ 0 ∧ − fmt_31_4 + fmt_31_4 ≤ 0 ∧ fmt_31_4 − fmt_31_4 ≤ 0 ∧ − fmt_31_3 + fmt_31_3 ≤ 0 ∧ fmt_31_3 − fmt_31_3 ≤ 0 ∧ − fmt_31_2 + fmt_31_2 ≤ 0 ∧ fmt_31_2 − fmt_31_2 ≤ 0 ∧ − fmt_31_1 + fmt_31_1 ≤ 0 ∧ fmt_31_1 − fmt_31_1 ≤ 0 ∧ − fmt_31_0 + fmt_31_0 ≤ 0 ∧ fmt_31_0 − fmt_31_0 ≤ 0 ∧ − ct_17_post + ct_17_post ≤ 0 ∧ ct_17_post − ct_17_post ≤ 0 ∧ − ct_17_2 + ct_17_2 ≤ 0 ∧ ct_17_2 − ct_17_2 ≤ 0 ∧ − ct_17_1 + ct_17_1 ≤ 0 ∧ ct_17_1 − ct_17_1 ≤ 0 ∧ − ct_17_0 + ct_17_0 ≤ 0 ∧ ct_17_0 − ct_17_0 ≤ 0 ∧ − a_328_post + a_328_post ≤ 0 ∧ a_328_post − a_328_post ≤ 0 ∧ − a_328_0 + a_328_0 ≤ 0 ∧ a_328_0 − a_328_0 ≤ 0 ∧ − a_305_post + a_305_post ≤ 0 ∧ a_305_post − a_305_post ≤ 0 ∧ − a_305_0 + a_305_0 ≤ 0 ∧ a_305_0 − a_305_0 ≤ 0 ∧ − a_283_post + a_283_post ≤ 0 ∧ a_283_post − a_283_post ≤ 0 ∧ − a_283_0 + a_283_0 ≤ 0 ∧ a_283_0 − a_283_0 ≤ 0 ∧ − a_26_post + a_26_post ≤ 0 ∧ a_26_post − a_26_post ≤ 0 ∧ − a_26_1 + a_26_1 ≤ 0 ∧ a_26_1 − a_26_1 ≤ 0 ∧ − a_26_0 + a_26_0 ≤ 0 ∧ a_26_0 − a_26_0 ≤ 0 ∧ − a_247_post + a_247_post ≤ 0 ∧ a_247_post − a_247_post ≤ 0 ∧ − a_247_0 + a_247_0 ≤ 0 ∧ a_247_0 − a_247_0 ≤ 0 ∧ − a_197_post + a_197_post ≤ 0 ∧ a_197_post − a_197_post ≤ 0 ∧ − a_197_0 + a_197_0 ≤ 0 ∧ a_197_0 − a_197_0 ≤ 0 ∧ − a_146_0 + a_146_0 ≤ 0 ∧ a_146_0 − a_146_0 ≤ 0 | |
| 38 | 77 | 51: | 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ − a_146_0 ≤ 0 ∧ a_26_0 − a_26_post ≤ 0 ∧ − a_26_0 + a_26_post ≤ 0 ∧ r_161_0 − r_161_post ≤ 0 ∧ − r_161_0 + r_161_post ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_0 − result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_0 + result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_0 − result_dot_printf_sdv_special_RETURN_VALUE_41_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_0 + result_dot_printf_sdv_special_RETURN_VALUE_41_post ≤ 0 ∧ x_14_0 − x_14_post ≤ 0 ∧ − x_14_0 + x_14_post ≤ 0 ∧ x_177_0 − x_177_post ≤ 0 ∧ − x_177_0 + x_177_post ≤ 0 ∧ − y_19_post + y_19_post ≤ 0 ∧ y_19_post − y_19_post ≤ 0 ∧ − y_19_2 + y_19_2 ≤ 0 ∧ y_19_2 − y_19_2 ≤ 0 ∧ − y_19_1 + y_19_1 ≤ 0 ∧ y_19_1 − y_19_1 ≤ 0 ∧ − y_19_0 + y_19_0 ≤ 0 ∧ y_19_0 − y_19_0 ≤ 0 ∧ − x_SLAM_f_18_post + x_SLAM_f_18_post ≤ 0 ∧ x_SLAM_f_18_post − x_SLAM_f_18_post ≤ 0 ∧ − x_SLAM_f_18_2 + x_SLAM_f_18_2 ≤ 0 ∧ x_SLAM_f_18_2 − x_SLAM_f_18_2 ≤ 0 ∧ − x_SLAM_f_18_1 + x_SLAM_f_18_1 ≤ 0 ∧ x_SLAM_f_18_1 − x_SLAM_f_18_1 ≤ 0 ∧ − x_SLAM_f_18_0 + x_SLAM_f_18_0 ≤ 0 ∧ x_SLAM_f_18_0 − x_SLAM_f_18_0 ≤ 0 ∧ − x_34_post + x_34_post ≤ 0 ∧ x_34_post − x_34_post ≤ 0 ∧ − x_34_1 + x_34_1 ≤ 0 ∧ x_34_1 − x_34_1 ≤ 0 ∧ − x_34_0 + x_34_0 ≤ 0 ∧ x_34_0 − x_34_0 ≤ 0 ∧ − x_28_post + x_28_post ≤ 0 ∧ x_28_post − x_28_post ≤ 0 ∧ − x_28_1 + x_28_1 ≤ 0 ∧ x_28_1 − x_28_1 ≤ 0 ∧ − x_28_0 + x_28_0 ≤ 0 ∧ x_28_0 − x_28_0 ≤ 0 ∧ − x_238_post + x_238_post ≤ 0 ∧ x_238_post − x_238_post ≤ 0 ∧ − x_238_0 + x_238_0 ≤ 0 ∧ x_238_0 − x_238_0 ≤ 0 ∧ − x_20_post + x_20_post ≤ 0 ∧ x_20_post − x_20_post ≤ 0 ∧ − x_20_2 + x_20_2 ≤ 0 ∧ x_20_2 − x_20_2 ≤ 0 ∧ − x_20_1 + x_20_1 ≤ 0 ∧ x_20_1 − x_20_1 ≤ 0 ∧ − x_20_0 + x_20_0 ≤ 0 ∧ x_20_0 − x_20_0 ≤ 0 ∧ − x_16_post + x_16_post ≤ 0 ∧ x_16_post − x_16_post ≤ 0 ∧ − x_16_1 + x_16_1 ≤ 0 ∧ x_16_1 − x_16_1 ≤ 0 ∧ − x_16_0 + x_16_0 ≤ 0 ∧ x_16_0 − x_16_0 ≤ 0 ∧ − tmp_48_post + tmp_48_post ≤ 0 ∧ tmp_48_post − tmp_48_post ≤ 0 ∧ − tmp_48_0 + tmp_48_0 ≤ 0 ∧ tmp_48_0 − tmp_48_0 ≤ 0 ∧ − temp_49_post + temp_49_post ≤ 0 ∧ temp_49_post − temp_49_post ≤ 0 ∧ − temp_49_0 + temp_49_0 ≤ 0 ∧ temp_49_0 − temp_49_0 ≤ 0 ∧ − temp0_45_post + temp0_45_post ≤ 0 ∧ temp0_45_post − temp0_45_post ≤ 0 ∧ − temp0_45_1 + temp0_45_1 ≤ 0 ∧ temp0_45_1 − temp0_45_1 ≤ 0 ∧ − temp0_45_0 + temp0_45_0 ≤ 0 ∧ temp0_45_0 − temp0_45_0 ≤ 0 ∧ − temp0_32_post + temp0_32_post ≤ 0 ∧ temp0_32_post − temp0_32_post ≤ 0 ∧ − temp0_32_4 + temp0_32_4 ≤ 0 ∧ temp0_32_4 − temp0_32_4 ≤ 0 ∧ − temp0_32_3 + temp0_32_3 ≤ 0 ∧ temp0_32_3 − temp0_32_3 ≤ 0 ∧ − temp0_32_2 + temp0_32_2 ≤ 0 ∧ temp0_32_2 − temp0_32_2 ≤ 0 ∧ − temp0_32_1 + temp0_32_1 ≤ 0 ∧ temp0_32_1 − temp0_32_1 ≤ 0 ∧ − temp0_32_0 + temp0_32_0 ≤ 0 ∧ temp0_32_0 − temp0_32_0 ≤ 0 ∧ − temp0_15_0 + temp0_15_0 ≤ 0 ∧ temp0_15_0 − temp0_15_0 ≤ 0 ∧ − t_23_post + t_23_post ≤ 0 ∧ t_23_post − t_23_post ≤ 0 ∧ − t_23_1 + t_23_1 ≤ 0 ∧ t_23_1 − t_23_1 ≤ 0 ∧ − t_23_0 + t_23_0 ≤ 0 ∧ t_23_0 − t_23_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_1 + result_dot_printf_sdv_special_RETURN_VALUE_41_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_1 − result_dot_printf_sdv_special_RETURN_VALUE_41_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_post + result_dot_printf_sdv_special_RETURN_VALUE_38_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_post − result_dot_printf_sdv_special_RETURN_VALUE_38_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_1 + result_dot_printf_sdv_special_RETURN_VALUE_38_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_1 − result_dot_printf_sdv_special_RETURN_VALUE_38_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_0 + result_dot_printf_sdv_special_RETURN_VALUE_38_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_0 − result_dot_printf_sdv_special_RETURN_VALUE_38_0 ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_1 + result_dot_nondet_sdv_special_RETURN_VALUE_13_1 ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_1 − result_dot_nondet_sdv_special_RETURN_VALUE_13_1 ≤ 0 ∧ − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post + result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post ≤ 0 ∧ result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post ≤ 0 ∧ − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 + result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 ≤ 0 ∧ result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 ≤ 0 ∧ − result_11_post + result_11_post ≤ 0 ∧ result_11_post − result_11_post ≤ 0 ∧ − result_11_6 + result_11_6 ≤ 0 ∧ result_11_6 − result_11_6 ≤ 0 ∧ − result_11_5 + result_11_5 ≤ 0 ∧ result_11_5 − result_11_5 ≤ 0 ∧ − result_11_4 + result_11_4 ≤ 0 ∧ result_11_4 − result_11_4 ≤ 0 ∧ − result_11_3 + result_11_3 ≤ 0 ∧ result_11_3 − result_11_3 ≤ 0 ∧ − result_11_2 + result_11_2 ≤ 0 ∧ result_11_2 − result_11_2 ≤ 0 ∧ − result_11_1 + result_11_1 ≤ 0 ∧ result_11_1 − result_11_1 ≤ 0 ∧ − result_11_0 + result_11_0 ≤ 0 ∧ result_11_0 − result_11_0 ≤ 0 ∧ − rcd_72_post + rcd_72_post ≤ 0 ∧ rcd_72_post − rcd_72_post ≤ 0 ∧ − rcd_72_0 + rcd_72_0 ≤ 0 ∧ rcd_72_0 − rcd_72_0 ≤ 0 ∧ − rcd_102_post + rcd_102_post ≤ 0 ∧ rcd_102_post − rcd_102_post ≤ 0 ∧ − rcd_102_0 + rcd_102_0 ≤ 0 ∧ rcd_102_0 − rcd_102_0 ≤ 0 ∧ − r_53_post + r_53_post ≤ 0 ∧ r_53_post − r_53_post ≤ 0 ∧ − r_53_0 + r_53_0 ≤ 0 ∧ r_53_0 − r_53_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 ≤ 0 ∧ − nondet_12_post + nondet_12_post ≤ 0 ∧ nondet_12_post − nondet_12_post ≤ 0 ∧ − nondet_12_1 + nondet_12_1 ≤ 0 ∧ nondet_12_1 − nondet_12_1 ≤ 0 ∧ − nondet_12_0 + nondet_12_0 ≤ 0 ∧ nondet_12_0 − nondet_12_0 ≤ 0 ∧ − lt_37_post + lt_37_post ≤ 0 ∧ lt_37_post − lt_37_post ≤ 0 ∧ − lt_37_1 + lt_37_1 ≤ 0 ∧ lt_37_1 − lt_37_1 ≤ 0 ∧ − lt_37_0 + lt_37_0 ≤ 0 ∧ lt_37_0 − lt_37_0 ≤ 0 ∧ − lt_36_post + lt_36_post ≤ 0 ∧ lt_36_post − lt_36_post ≤ 0 ∧ − lt_36_0 + lt_36_0 ≤ 0 ∧ lt_36_0 − lt_36_0 ≤ 0 ∧ − lt_237_post + lt_237_post ≤ 0 ∧ lt_237_post − lt_237_post ≤ 0 ∧ − lt_237_0 + lt_237_0 ≤ 0 ∧ lt_237_0 − lt_237_0 ≤ 0 ∧ − length_43_post + length_43_post ≤ 0 ∧ length_43_post − length_43_post ≤ 0 ∧ − length_43_0 + length_43_0 ≤ 0 ∧ length_43_0 − length_43_0 ≤ 0 ∧ − len_246_post + len_246_post ≤ 0 ∧ len_246_post − len_246_post ≤ 0 ∧ − len_246_0 + len_246_0 ≤ 0 ∧ len_246_0 − len_246_0 ≤ 0 ∧ − len_180_post + len_180_post ≤ 0 ∧ len_180_post − len_180_post ≤ 0 ∧ − len_180_0 + len_180_0 ≤ 0 ∧ len_180_0 − len_180_0 ≤ 0 ∧ − i_44_post + i_44_post ≤ 0 ∧ i_44_post − i_44_post ≤ 0 ∧ − i_44_0 + i_44_0 ≤ 0 ∧ i_44_0 − i_44_0 ≤ 0 ∧ − i_125_post + i_125_post ≤ 0 ∧ i_125_post − i_125_post ≤ 0 ∧ − i_125_0 + i_125_0 ≤ 0 ∧ i_125_0 − i_125_0 ≤ 0 ∧ − i_108_post + i_108_post ≤ 0 ∧ i_108_post − i_108_post ≤ 0 ∧ − i_108_0 + i_108_0 ≤ 0 ∧ i_108_0 − i_108_0 ≤ 0 ∧ − head_46_post + head_46_post ≤ 0 ∧ head_46_post − head_46_post ≤ 0 ∧ − head_46_0 + head_46_0 ≤ 0 ∧ head_46_0 − head_46_0 ≤ 0 ∧ − fmt_31_post + fmt_31_post ≤ 0 ∧ fmt_31_post − fmt_31_post ≤ 0 ∧ − fmt_31_4 + fmt_31_4 ≤ 0 ∧ fmt_31_4 − fmt_31_4 ≤ 0 ∧ − fmt_31_3 + fmt_31_3 ≤ 0 ∧ fmt_31_3 − fmt_31_3 ≤ 0 ∧ − fmt_31_2 + fmt_31_2 ≤ 0 ∧ fmt_31_2 − fmt_31_2 ≤ 0 ∧ − fmt_31_1 + fmt_31_1 ≤ 0 ∧ fmt_31_1 − fmt_31_1 ≤ 0 ∧ − fmt_31_0 + fmt_31_0 ≤ 0 ∧ fmt_31_0 − fmt_31_0 ≤ 0 ∧ − ct_17_post + ct_17_post ≤ 0 ∧ ct_17_post − ct_17_post ≤ 0 ∧ − ct_17_2 + ct_17_2 ≤ 0 ∧ ct_17_2 − ct_17_2 ≤ 0 ∧ − ct_17_1 + ct_17_1 ≤ 0 ∧ ct_17_1 − ct_17_1 ≤ 0 ∧ − ct_17_0 + ct_17_0 ≤ 0 ∧ ct_17_0 − ct_17_0 ≤ 0 ∧ − a_328_post + a_328_post ≤ 0 ∧ a_328_post − a_328_post ≤ 0 ∧ − a_328_0 + a_328_0 ≤ 0 ∧ a_328_0 − a_328_0 ≤ 0 ∧ − a_305_post + a_305_post ≤ 0 ∧ a_305_post − a_305_post ≤ 0 ∧ − a_305_0 + a_305_0 ≤ 0 ∧ a_305_0 − a_305_0 ≤ 0 ∧ − a_283_post + a_283_post ≤ 0 ∧ a_283_post − a_283_post ≤ 0 ∧ − a_283_0 + a_283_0 ≤ 0 ∧ a_283_0 − a_283_0 ≤ 0 ∧ − a_26_1 + a_26_1 ≤ 0 ∧ a_26_1 − a_26_1 ≤ 0 ∧ − a_247_post + a_247_post ≤ 0 ∧ a_247_post − a_247_post ≤ 0 ∧ − a_247_0 + a_247_0 ≤ 0 ∧ a_247_0 − a_247_0 ≤ 0 ∧ − a_197_post + a_197_post ≤ 0 ∧ a_197_post − a_197_post ≤ 0 ∧ − a_197_0 + a_197_0 ≤ 0 ∧ a_197_0 − a_197_0 ≤ 0 ∧ − a_146_0 + a_146_0 ≤ 0 ∧ a_146_0 − a_146_0 ≤ 0 | |
| 51 | 78 | 52: | 1 − x_28_0 ≤ 0 ∧ − y_19_post + y_19_post ≤ 0 ∧ y_19_post − y_19_post ≤ 0 ∧ − y_19_2 + y_19_2 ≤ 0 ∧ y_19_2 − y_19_2 ≤ 0 ∧ − y_19_1 + y_19_1 ≤ 0 ∧ y_19_1 − y_19_1 ≤ 0 ∧ − y_19_0 + y_19_0 ≤ 0 ∧ y_19_0 − y_19_0 ≤ 0 ∧ − x_SLAM_f_18_post + x_SLAM_f_18_post ≤ 0 ∧ x_SLAM_f_18_post − x_SLAM_f_18_post ≤ 0 ∧ − x_SLAM_f_18_2 + x_SLAM_f_18_2 ≤ 0 ∧ x_SLAM_f_18_2 − x_SLAM_f_18_2 ≤ 0 ∧ − x_SLAM_f_18_1 + x_SLAM_f_18_1 ≤ 0 ∧ x_SLAM_f_18_1 − x_SLAM_f_18_1 ≤ 0 ∧ − x_SLAM_f_18_0 + x_SLAM_f_18_0 ≤ 0 ∧ x_SLAM_f_18_0 − x_SLAM_f_18_0 ≤ 0 ∧ − x_34_post + x_34_post ≤ 0 ∧ x_34_post − x_34_post ≤ 0 ∧ − x_34_1 + x_34_1 ≤ 0 ∧ x_34_1 − x_34_1 ≤ 0 ∧ − x_34_0 + x_34_0 ≤ 0 ∧ x_34_0 − x_34_0 ≤ 0 ∧ − x_28_post + x_28_post ≤ 0 ∧ x_28_post − x_28_post ≤ 0 ∧ − x_28_1 + x_28_1 ≤ 0 ∧ x_28_1 − x_28_1 ≤ 0 ∧ − x_28_0 + x_28_0 ≤ 0 ∧ x_28_0 − x_28_0 ≤ 0 ∧ − x_238_post + x_238_post ≤ 0 ∧ x_238_post − x_238_post ≤ 0 ∧ − x_238_0 + x_238_0 ≤ 0 ∧ x_238_0 − x_238_0 ≤ 0 ∧ − x_20_post + x_20_post ≤ 0 ∧ x_20_post − x_20_post ≤ 0 ∧ − x_20_2 + x_20_2 ≤ 0 ∧ x_20_2 − x_20_2 ≤ 0 ∧ − x_20_1 + x_20_1 ≤ 0 ∧ x_20_1 − x_20_1 ≤ 0 ∧ − x_20_0 + x_20_0 ≤ 0 ∧ x_20_0 − x_20_0 ≤ 0 ∧ − x_177_post + x_177_post ≤ 0 ∧ x_177_post − x_177_post ≤ 0 ∧ − x_177_0 + x_177_0 ≤ 0 ∧ x_177_0 − x_177_0 ≤ 0 ∧ − x_16_post + x_16_post ≤ 0 ∧ x_16_post − x_16_post ≤ 0 ∧ − x_16_1 + x_16_1 ≤ 0 ∧ x_16_1 − x_16_1 ≤ 0 ∧ − x_16_0 + x_16_0 ≤ 0 ∧ x_16_0 − x_16_0 ≤ 0 ∧ − x_14_post + x_14_post ≤ 0 ∧ x_14_post − x_14_post ≤ 0 ∧ − x_14_0 + x_14_0 ≤ 0 ∧ x_14_0 − x_14_0 ≤ 0 ∧ − tmp_48_post + tmp_48_post ≤ 0 ∧ tmp_48_post − tmp_48_post ≤ 0 ∧ − tmp_48_0 + tmp_48_0 ≤ 0 ∧ tmp_48_0 − tmp_48_0 ≤ 0 ∧ − temp_49_post + temp_49_post ≤ 0 ∧ temp_49_post − temp_49_post ≤ 0 ∧ − temp_49_0 + temp_49_0 ≤ 0 ∧ temp_49_0 − temp_49_0 ≤ 0 ∧ − temp0_45_post + temp0_45_post ≤ 0 ∧ temp0_45_post − temp0_45_post ≤ 0 ∧ − temp0_45_1 + temp0_45_1 ≤ 0 ∧ temp0_45_1 − temp0_45_1 ≤ 0 ∧ − temp0_45_0 + temp0_45_0 ≤ 0 ∧ temp0_45_0 − temp0_45_0 ≤ 0 ∧ − temp0_32_post + temp0_32_post ≤ 0 ∧ temp0_32_post − temp0_32_post ≤ 0 ∧ − temp0_32_4 + temp0_32_4 ≤ 0 ∧ temp0_32_4 − temp0_32_4 ≤ 0 ∧ − temp0_32_3 + temp0_32_3 ≤ 0 ∧ temp0_32_3 − temp0_32_3 ≤ 0 ∧ − temp0_32_2 + temp0_32_2 ≤ 0 ∧ temp0_32_2 − temp0_32_2 ≤ 0 ∧ − temp0_32_1 + temp0_32_1 ≤ 0 ∧ temp0_32_1 − temp0_32_1 ≤ 0 ∧ − temp0_32_0 + temp0_32_0 ≤ 0 ∧ temp0_32_0 − temp0_32_0 ≤ 0 ∧ − temp0_15_0 + temp0_15_0 ≤ 0 ∧ temp0_15_0 − temp0_15_0 ≤ 0 ∧ − t_23_post + t_23_post ≤ 0 ∧ t_23_post − t_23_post ≤ 0 ∧ − t_23_1 + t_23_1 ≤ 0 ∧ t_23_1 − t_23_1 ≤ 0 ∧ − t_23_0 + t_23_0 ≤ 0 ∧ t_23_0 − t_23_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_post + result_dot_printf_sdv_special_RETURN_VALUE_41_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_post − result_dot_printf_sdv_special_RETURN_VALUE_41_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_1 + result_dot_printf_sdv_special_RETURN_VALUE_41_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_1 − result_dot_printf_sdv_special_RETURN_VALUE_41_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_0 + result_dot_printf_sdv_special_RETURN_VALUE_41_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_0 − result_dot_printf_sdv_special_RETURN_VALUE_41_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_post + result_dot_printf_sdv_special_RETURN_VALUE_38_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_post − result_dot_printf_sdv_special_RETURN_VALUE_38_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_1 + result_dot_printf_sdv_special_RETURN_VALUE_38_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_1 − result_dot_printf_sdv_special_RETURN_VALUE_38_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_0 + result_dot_printf_sdv_special_RETURN_VALUE_38_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_0 − result_dot_printf_sdv_special_RETURN_VALUE_38_0 ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_post + result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_post − result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_1 + result_dot_nondet_sdv_special_RETURN_VALUE_13_1 ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_1 − result_dot_nondet_sdv_special_RETURN_VALUE_13_1 ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_0 + result_dot_nondet_sdv_special_RETURN_VALUE_13_0 ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_0 − result_dot_nondet_sdv_special_RETURN_VALUE_13_0 ≤ 0 ∧ − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post + result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post ≤ 0 ∧ result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post ≤ 0 ∧ − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 + result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 ≤ 0 ∧ result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 ≤ 0 ∧ − result_11_post + result_11_post ≤ 0 ∧ result_11_post − result_11_post ≤ 0 ∧ − result_11_6 + result_11_6 ≤ 0 ∧ result_11_6 − result_11_6 ≤ 0 ∧ − result_11_5 + result_11_5 ≤ 0 ∧ result_11_5 − result_11_5 ≤ 0 ∧ − result_11_4 + result_11_4 ≤ 0 ∧ result_11_4 − result_11_4 ≤ 0 ∧ − result_11_3 + result_11_3 ≤ 0 ∧ result_11_3 − result_11_3 ≤ 0 ∧ − result_11_2 + result_11_2 ≤ 0 ∧ result_11_2 − result_11_2 ≤ 0 ∧ − result_11_1 + result_11_1 ≤ 0 ∧ result_11_1 − result_11_1 ≤ 0 ∧ − result_11_0 + result_11_0 ≤ 0 ∧ result_11_0 − result_11_0 ≤ 0 ∧ − rcd_72_post + rcd_72_post ≤ 0 ∧ rcd_72_post − rcd_72_post ≤ 0 ∧ − rcd_72_0 + rcd_72_0 ≤ 0 ∧ rcd_72_0 − rcd_72_0 ≤ 0 ∧ − rcd_102_post + rcd_102_post ≤ 0 ∧ rcd_102_post − rcd_102_post ≤ 0 ∧ − rcd_102_0 + rcd_102_0 ≤ 0 ∧ rcd_102_0 − rcd_102_0 ≤ 0 ∧ − r_53_post + r_53_post ≤ 0 ∧ r_53_post − r_53_post ≤ 0 ∧ − r_53_0 + r_53_0 ≤ 0 ∧ r_53_0 − r_53_0 ≤ 0 ∧ − r_161_post + r_161_post ≤ 0 ∧ r_161_post − r_161_post ≤ 0 ∧ − r_161_0 + r_161_0 ≤ 0 ∧ r_161_0 − r_161_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 ≤ 0 ∧ − nondet_12_post + nondet_12_post ≤ 0 ∧ nondet_12_post − nondet_12_post ≤ 0 ∧ − nondet_12_1 + nondet_12_1 ≤ 0 ∧ nondet_12_1 − nondet_12_1 ≤ 0 ∧ − nondet_12_0 + nondet_12_0 ≤ 0 ∧ nondet_12_0 − nondet_12_0 ≤ 0 ∧ − lt_37_post + lt_37_post ≤ 0 ∧ lt_37_post − lt_37_post ≤ 0 ∧ − lt_37_1 + lt_37_1 ≤ 0 ∧ lt_37_1 − lt_37_1 ≤ 0 ∧ − lt_37_0 + lt_37_0 ≤ 0 ∧ lt_37_0 − lt_37_0 ≤ 0 ∧ − lt_36_post + lt_36_post ≤ 0 ∧ lt_36_post − lt_36_post ≤ 0 ∧ − lt_36_0 + lt_36_0 ≤ 0 ∧ lt_36_0 − lt_36_0 ≤ 0 ∧ − lt_237_post + lt_237_post ≤ 0 ∧ lt_237_post − lt_237_post ≤ 0 ∧ − lt_237_0 + lt_237_0 ≤ 0 ∧ lt_237_0 − lt_237_0 ≤ 0 ∧ − length_43_post + length_43_post ≤ 0 ∧ length_43_post − length_43_post ≤ 0 ∧ − length_43_0 + length_43_0 ≤ 0 ∧ length_43_0 − length_43_0 ≤ 0 ∧ − len_246_post + len_246_post ≤ 0 ∧ len_246_post − len_246_post ≤ 0 ∧ − len_246_0 + len_246_0 ≤ 0 ∧ len_246_0 − len_246_0 ≤ 0 ∧ − len_180_post + len_180_post ≤ 0 ∧ len_180_post − len_180_post ≤ 0 ∧ − len_180_0 + len_180_0 ≤ 0 ∧ len_180_0 − len_180_0 ≤ 0 ∧ − i_44_post + i_44_post ≤ 0 ∧ i_44_post − i_44_post ≤ 0 ∧ − i_44_0 + i_44_0 ≤ 0 ∧ i_44_0 − i_44_0 ≤ 0 ∧ − i_125_post + i_125_post ≤ 0 ∧ i_125_post − i_125_post ≤ 0 ∧ − i_125_0 + i_125_0 ≤ 0 ∧ i_125_0 − i_125_0 ≤ 0 ∧ − i_108_post + i_108_post ≤ 0 ∧ i_108_post − i_108_post ≤ 0 ∧ − i_108_0 + i_108_0 ≤ 0 ∧ i_108_0 − i_108_0 ≤ 0 ∧ − head_46_post + head_46_post ≤ 0 ∧ head_46_post − head_46_post ≤ 0 ∧ − head_46_0 + head_46_0 ≤ 0 ∧ head_46_0 − head_46_0 ≤ 0 ∧ − fmt_31_post + fmt_31_post ≤ 0 ∧ fmt_31_post − fmt_31_post ≤ 0 ∧ − fmt_31_4 + fmt_31_4 ≤ 0 ∧ fmt_31_4 − fmt_31_4 ≤ 0 ∧ − fmt_31_3 + fmt_31_3 ≤ 0 ∧ fmt_31_3 − fmt_31_3 ≤ 0 ∧ − fmt_31_2 + fmt_31_2 ≤ 0 ∧ fmt_31_2 − fmt_31_2 ≤ 0 ∧ − fmt_31_1 + fmt_31_1 ≤ 0 ∧ fmt_31_1 − fmt_31_1 ≤ 0 ∧ − fmt_31_0 + fmt_31_0 ≤ 0 ∧ fmt_31_0 − fmt_31_0 ≤ 0 ∧ − ct_17_post + ct_17_post ≤ 0 ∧ ct_17_post − ct_17_post ≤ 0 ∧ − ct_17_2 + ct_17_2 ≤ 0 ∧ ct_17_2 − ct_17_2 ≤ 0 ∧ − ct_17_1 + ct_17_1 ≤ 0 ∧ ct_17_1 − ct_17_1 ≤ 0 ∧ − ct_17_0 + ct_17_0 ≤ 0 ∧ ct_17_0 − ct_17_0 ≤ 0 ∧ − a_328_post + a_328_post ≤ 0 ∧ a_328_post − a_328_post ≤ 0 ∧ − a_328_0 + a_328_0 ≤ 0 ∧ a_328_0 − a_328_0 ≤ 0 ∧ − a_305_post + a_305_post ≤ 0 ∧ a_305_post − a_305_post ≤ 0 ∧ − a_305_0 + a_305_0 ≤ 0 ∧ a_305_0 − a_305_0 ≤ 0 ∧ − a_283_post + a_283_post ≤ 0 ∧ a_283_post − a_283_post ≤ 0 ∧ − a_283_0 + a_283_0 ≤ 0 ∧ a_283_0 − a_283_0 ≤ 0 ∧ − a_26_post + a_26_post ≤ 0 ∧ a_26_post − a_26_post ≤ 0 ∧ − a_26_1 + a_26_1 ≤ 0 ∧ a_26_1 − a_26_1 ≤ 0 ∧ − a_26_0 + a_26_0 ≤ 0 ∧ a_26_0 − a_26_0 ≤ 0 ∧ − a_247_post + a_247_post ≤ 0 ∧ a_247_post − a_247_post ≤ 0 ∧ − a_247_0 + a_247_0 ≤ 0 ∧ a_247_0 − a_247_0 ≤ 0 ∧ − a_197_post + a_197_post ≤ 0 ∧ a_197_post − a_197_post ≤ 0 ∧ − a_197_0 + a_197_0 ≤ 0 ∧ a_197_0 − a_197_0 ≤ 0 ∧ − a_146_0 + a_146_0 ≤ 0 ∧ a_146_0 − a_146_0 ≤ 0 | |
| 51 | 79 | 52: | 1 + x_28_0 ≤ 0 ∧ − y_19_post + y_19_post ≤ 0 ∧ y_19_post − y_19_post ≤ 0 ∧ − y_19_2 + y_19_2 ≤ 0 ∧ y_19_2 − y_19_2 ≤ 0 ∧ − y_19_1 + y_19_1 ≤ 0 ∧ y_19_1 − y_19_1 ≤ 0 ∧ − y_19_0 + y_19_0 ≤ 0 ∧ y_19_0 − y_19_0 ≤ 0 ∧ − x_SLAM_f_18_post + x_SLAM_f_18_post ≤ 0 ∧ x_SLAM_f_18_post − x_SLAM_f_18_post ≤ 0 ∧ − x_SLAM_f_18_2 + x_SLAM_f_18_2 ≤ 0 ∧ x_SLAM_f_18_2 − x_SLAM_f_18_2 ≤ 0 ∧ − x_SLAM_f_18_1 + x_SLAM_f_18_1 ≤ 0 ∧ x_SLAM_f_18_1 − x_SLAM_f_18_1 ≤ 0 ∧ − x_SLAM_f_18_0 + x_SLAM_f_18_0 ≤ 0 ∧ x_SLAM_f_18_0 − x_SLAM_f_18_0 ≤ 0 ∧ − x_34_post + x_34_post ≤ 0 ∧ x_34_post − x_34_post ≤ 0 ∧ − x_34_1 + x_34_1 ≤ 0 ∧ x_34_1 − x_34_1 ≤ 0 ∧ − x_34_0 + x_34_0 ≤ 0 ∧ x_34_0 − x_34_0 ≤ 0 ∧ − x_28_post + x_28_post ≤ 0 ∧ x_28_post − x_28_post ≤ 0 ∧ − x_28_1 + x_28_1 ≤ 0 ∧ x_28_1 − x_28_1 ≤ 0 ∧ − x_28_0 + x_28_0 ≤ 0 ∧ x_28_0 − x_28_0 ≤ 0 ∧ − x_238_post + x_238_post ≤ 0 ∧ x_238_post − x_238_post ≤ 0 ∧ − x_238_0 + x_238_0 ≤ 0 ∧ x_238_0 − x_238_0 ≤ 0 ∧ − x_20_post + x_20_post ≤ 0 ∧ x_20_post − x_20_post ≤ 0 ∧ − x_20_2 + x_20_2 ≤ 0 ∧ x_20_2 − x_20_2 ≤ 0 ∧ − x_20_1 + x_20_1 ≤ 0 ∧ x_20_1 − x_20_1 ≤ 0 ∧ − x_20_0 + x_20_0 ≤ 0 ∧ x_20_0 − x_20_0 ≤ 0 ∧ − x_177_post + x_177_post ≤ 0 ∧ x_177_post − x_177_post ≤ 0 ∧ − x_177_0 + x_177_0 ≤ 0 ∧ x_177_0 − x_177_0 ≤ 0 ∧ − x_16_post + x_16_post ≤ 0 ∧ x_16_post − x_16_post ≤ 0 ∧ − x_16_1 + x_16_1 ≤ 0 ∧ x_16_1 − x_16_1 ≤ 0 ∧ − x_16_0 + x_16_0 ≤ 0 ∧ x_16_0 − x_16_0 ≤ 0 ∧ − x_14_post + x_14_post ≤ 0 ∧ x_14_post − x_14_post ≤ 0 ∧ − x_14_0 + x_14_0 ≤ 0 ∧ x_14_0 − x_14_0 ≤ 0 ∧ − tmp_48_post + tmp_48_post ≤ 0 ∧ tmp_48_post − tmp_48_post ≤ 0 ∧ − tmp_48_0 + tmp_48_0 ≤ 0 ∧ tmp_48_0 − tmp_48_0 ≤ 0 ∧ − temp_49_post + temp_49_post ≤ 0 ∧ temp_49_post − temp_49_post ≤ 0 ∧ − temp_49_0 + temp_49_0 ≤ 0 ∧ temp_49_0 − temp_49_0 ≤ 0 ∧ − temp0_45_post + temp0_45_post ≤ 0 ∧ temp0_45_post − temp0_45_post ≤ 0 ∧ − temp0_45_1 + temp0_45_1 ≤ 0 ∧ temp0_45_1 − temp0_45_1 ≤ 0 ∧ − temp0_45_0 + temp0_45_0 ≤ 0 ∧ temp0_45_0 − temp0_45_0 ≤ 0 ∧ − temp0_32_post + temp0_32_post ≤ 0 ∧ temp0_32_post − temp0_32_post ≤ 0 ∧ − temp0_32_4 + temp0_32_4 ≤ 0 ∧ temp0_32_4 − temp0_32_4 ≤ 0 ∧ − temp0_32_3 + temp0_32_3 ≤ 0 ∧ temp0_32_3 − temp0_32_3 ≤ 0 ∧ − temp0_32_2 + temp0_32_2 ≤ 0 ∧ temp0_32_2 − temp0_32_2 ≤ 0 ∧ − temp0_32_1 + temp0_32_1 ≤ 0 ∧ temp0_32_1 − temp0_32_1 ≤ 0 ∧ − temp0_32_0 + temp0_32_0 ≤ 0 ∧ temp0_32_0 − temp0_32_0 ≤ 0 ∧ − temp0_15_0 + temp0_15_0 ≤ 0 ∧ temp0_15_0 − temp0_15_0 ≤ 0 ∧ − t_23_post + t_23_post ≤ 0 ∧ t_23_post − t_23_post ≤ 0 ∧ − t_23_1 + t_23_1 ≤ 0 ∧ t_23_1 − t_23_1 ≤ 0 ∧ − t_23_0 + t_23_0 ≤ 0 ∧ t_23_0 − t_23_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_post + result_dot_printf_sdv_special_RETURN_VALUE_41_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_post − result_dot_printf_sdv_special_RETURN_VALUE_41_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_1 + result_dot_printf_sdv_special_RETURN_VALUE_41_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_1 − result_dot_printf_sdv_special_RETURN_VALUE_41_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_0 + result_dot_printf_sdv_special_RETURN_VALUE_41_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_0 − result_dot_printf_sdv_special_RETURN_VALUE_41_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_post + result_dot_printf_sdv_special_RETURN_VALUE_38_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_post − result_dot_printf_sdv_special_RETURN_VALUE_38_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_1 + result_dot_printf_sdv_special_RETURN_VALUE_38_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_1 − result_dot_printf_sdv_special_RETURN_VALUE_38_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_0 + result_dot_printf_sdv_special_RETURN_VALUE_38_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_0 − result_dot_printf_sdv_special_RETURN_VALUE_38_0 ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_post + result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_post − result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_1 + result_dot_nondet_sdv_special_RETURN_VALUE_13_1 ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_1 − result_dot_nondet_sdv_special_RETURN_VALUE_13_1 ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_0 + result_dot_nondet_sdv_special_RETURN_VALUE_13_0 ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_0 − result_dot_nondet_sdv_special_RETURN_VALUE_13_0 ≤ 0 ∧ − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post + result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post ≤ 0 ∧ result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post ≤ 0 ∧ − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 + result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 ≤ 0 ∧ result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 ≤ 0 ∧ − result_11_post + result_11_post ≤ 0 ∧ result_11_post − result_11_post ≤ 0 ∧ − result_11_6 + result_11_6 ≤ 0 ∧ result_11_6 − result_11_6 ≤ 0 ∧ − result_11_5 + result_11_5 ≤ 0 ∧ result_11_5 − result_11_5 ≤ 0 ∧ − result_11_4 + result_11_4 ≤ 0 ∧ result_11_4 − result_11_4 ≤ 0 ∧ − result_11_3 + result_11_3 ≤ 0 ∧ result_11_3 − result_11_3 ≤ 0 ∧ − result_11_2 + result_11_2 ≤ 0 ∧ result_11_2 − result_11_2 ≤ 0 ∧ − result_11_1 + result_11_1 ≤ 0 ∧ result_11_1 − result_11_1 ≤ 0 ∧ − result_11_0 + result_11_0 ≤ 0 ∧ result_11_0 − result_11_0 ≤ 0 ∧ − rcd_72_post + rcd_72_post ≤ 0 ∧ rcd_72_post − rcd_72_post ≤ 0 ∧ − rcd_72_0 + rcd_72_0 ≤ 0 ∧ rcd_72_0 − rcd_72_0 ≤ 0 ∧ − rcd_102_post + rcd_102_post ≤ 0 ∧ rcd_102_post − rcd_102_post ≤ 0 ∧ − rcd_102_0 + rcd_102_0 ≤ 0 ∧ rcd_102_0 − rcd_102_0 ≤ 0 ∧ − r_53_post + r_53_post ≤ 0 ∧ r_53_post − r_53_post ≤ 0 ∧ − r_53_0 + r_53_0 ≤ 0 ∧ r_53_0 − r_53_0 ≤ 0 ∧ − r_161_post + r_161_post ≤ 0 ∧ r_161_post − r_161_post ≤ 0 ∧ − r_161_0 + r_161_0 ≤ 0 ∧ r_161_0 − r_161_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 ≤ 0 ∧ − nondet_12_post + nondet_12_post ≤ 0 ∧ nondet_12_post − nondet_12_post ≤ 0 ∧ − nondet_12_1 + nondet_12_1 ≤ 0 ∧ nondet_12_1 − nondet_12_1 ≤ 0 ∧ − nondet_12_0 + nondet_12_0 ≤ 0 ∧ nondet_12_0 − nondet_12_0 ≤ 0 ∧ − lt_37_post + lt_37_post ≤ 0 ∧ lt_37_post − lt_37_post ≤ 0 ∧ − lt_37_1 + lt_37_1 ≤ 0 ∧ lt_37_1 − lt_37_1 ≤ 0 ∧ − lt_37_0 + lt_37_0 ≤ 0 ∧ lt_37_0 − lt_37_0 ≤ 0 ∧ − lt_36_post + lt_36_post ≤ 0 ∧ lt_36_post − lt_36_post ≤ 0 ∧ − lt_36_0 + lt_36_0 ≤ 0 ∧ lt_36_0 − lt_36_0 ≤ 0 ∧ − lt_237_post + lt_237_post ≤ 0 ∧ lt_237_post − lt_237_post ≤ 0 ∧ − lt_237_0 + lt_237_0 ≤ 0 ∧ lt_237_0 − lt_237_0 ≤ 0 ∧ − length_43_post + length_43_post ≤ 0 ∧ length_43_post − length_43_post ≤ 0 ∧ − length_43_0 + length_43_0 ≤ 0 ∧ length_43_0 − length_43_0 ≤ 0 ∧ − len_246_post + len_246_post ≤ 0 ∧ len_246_post − len_246_post ≤ 0 ∧ − len_246_0 + len_246_0 ≤ 0 ∧ len_246_0 − len_246_0 ≤ 0 ∧ − len_180_post + len_180_post ≤ 0 ∧ len_180_post − len_180_post ≤ 0 ∧ − len_180_0 + len_180_0 ≤ 0 ∧ len_180_0 − len_180_0 ≤ 0 ∧ − i_44_post + i_44_post ≤ 0 ∧ i_44_post − i_44_post ≤ 0 ∧ − i_44_0 + i_44_0 ≤ 0 ∧ i_44_0 − i_44_0 ≤ 0 ∧ − i_125_post + i_125_post ≤ 0 ∧ i_125_post − i_125_post ≤ 0 ∧ − i_125_0 + i_125_0 ≤ 0 ∧ i_125_0 − i_125_0 ≤ 0 ∧ − i_108_post + i_108_post ≤ 0 ∧ i_108_post − i_108_post ≤ 0 ∧ − i_108_0 + i_108_0 ≤ 0 ∧ i_108_0 − i_108_0 ≤ 0 ∧ − head_46_post + head_46_post ≤ 0 ∧ head_46_post − head_46_post ≤ 0 ∧ − head_46_0 + head_46_0 ≤ 0 ∧ head_46_0 − head_46_0 ≤ 0 ∧ − fmt_31_post + fmt_31_post ≤ 0 ∧ fmt_31_post − fmt_31_post ≤ 0 ∧ − fmt_31_4 + fmt_31_4 ≤ 0 ∧ fmt_31_4 − fmt_31_4 ≤ 0 ∧ − fmt_31_3 + fmt_31_3 ≤ 0 ∧ fmt_31_3 − fmt_31_3 ≤ 0 ∧ − fmt_31_2 + fmt_31_2 ≤ 0 ∧ fmt_31_2 − fmt_31_2 ≤ 0 ∧ − fmt_31_1 + fmt_31_1 ≤ 0 ∧ fmt_31_1 − fmt_31_1 ≤ 0 ∧ − fmt_31_0 + fmt_31_0 ≤ 0 ∧ fmt_31_0 − fmt_31_0 ≤ 0 ∧ − ct_17_post + ct_17_post ≤ 0 ∧ ct_17_post − ct_17_post ≤ 0 ∧ − ct_17_2 + ct_17_2 ≤ 0 ∧ ct_17_2 − ct_17_2 ≤ 0 ∧ − ct_17_1 + ct_17_1 ≤ 0 ∧ ct_17_1 − ct_17_1 ≤ 0 ∧ − ct_17_0 + ct_17_0 ≤ 0 ∧ ct_17_0 − ct_17_0 ≤ 0 ∧ − a_328_post + a_328_post ≤ 0 ∧ a_328_post − a_328_post ≤ 0 ∧ − a_328_0 + a_328_0 ≤ 0 ∧ a_328_0 − a_328_0 ≤ 0 ∧ − a_305_post + a_305_post ≤ 0 ∧ a_305_post − a_305_post ≤ 0 ∧ − a_305_0 + a_305_0 ≤ 0 ∧ a_305_0 − a_305_0 ≤ 0 ∧ − a_283_post + a_283_post ≤ 0 ∧ a_283_post − a_283_post ≤ 0 ∧ − a_283_0 + a_283_0 ≤ 0 ∧ a_283_0 − a_283_0 ≤ 0 ∧ − a_26_post + a_26_post ≤ 0 ∧ a_26_post − a_26_post ≤ 0 ∧ − a_26_1 + a_26_1 ≤ 0 ∧ a_26_1 − a_26_1 ≤ 0 ∧ − a_26_0 + a_26_0 ≤ 0 ∧ a_26_0 − a_26_0 ≤ 0 ∧ − a_247_post + a_247_post ≤ 0 ∧ a_247_post − a_247_post ≤ 0 ∧ − a_247_0 + a_247_0 ≤ 0 ∧ a_247_0 − a_247_0 ≤ 0 ∧ − a_197_post + a_197_post ≤ 0 ∧ a_197_post − a_197_post ≤ 0 ∧ − a_197_0 + a_197_0 ≤ 0 ∧ a_197_0 − a_197_0 ≤ 0 ∧ − a_146_0 + a_146_0 ≤ 0 ∧ a_146_0 − a_146_0 ≤ 0 | |
| 52 | 80 | 53: | 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ fmt_31_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post ≤ 0 ∧ − fmt_31_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post ≤ 0 ∧ temp0_32_1 ≤ 0 ∧ − temp0_32_1 ≤ 0 ∧ result_11_1 − temp0_32_1 ≤ 0 ∧ − result_11_1 + temp0_32_1 ≤ 0 ∧ − result_11_1 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post ≤ 0 ∧ result_11_1 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post ≤ 0 ∧ − x_28_0 + x_34_1 ≤ 0 ∧ x_28_0 − x_34_1 ≤ 0 ∧ fmt_31_3 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 ≤ 0 ∧ − fmt_31_3 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 ≤ 0 ∧ temp0_32_3 ≤ 0 ∧ − temp0_32_3 ≤ 0 ∧ result_11_3 − temp0_32_3 ≤ 0 ∧ − result_11_3 + temp0_32_3 ≤ 0 ∧ − result_11_3 + result_dot_printf_sdv_special_RETURN_VALUE_38_1 ≤ 0 ∧ result_11_3 − result_dot_printf_sdv_special_RETURN_VALUE_38_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_0 ≤ 0 ∧ − a_26_0 + x_14_0 ≤ 0 ∧ a_26_0 − x_14_0 ≤ 0 ∧ fmt_31_0 − fmt_31_post ≤ 0 ∧ − fmt_31_0 + fmt_31_post ≤ 0 ∧ lt_36_0 − lt_36_post ≤ 0 ∧ − lt_36_0 + lt_36_post ≤ 0 ∧ lt_37_0 − lt_37_post ≤ 0 ∧ − lt_37_0 + lt_37_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post ≤ 0 ∧ result_11_0 − result_11_post ≤ 0 ∧ − result_11_0 + result_11_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_0 − result_dot_printf_sdv_special_RETURN_VALUE_38_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_0 + result_dot_printf_sdv_special_RETURN_VALUE_38_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post ≤ 0 ∧ temp0_32_0 − temp0_32_post ≤ 0 ∧ − temp0_32_0 + temp0_32_post ≤ 0 ∧ x_34_0 − x_34_post ≤ 0 ∧ − x_34_0 + x_34_post ≤ 0 ∧ − y_19_post + y_19_post ≤ 0 ∧ y_19_post − y_19_post ≤ 0 ∧ − y_19_2 + y_19_2 ≤ 0 ∧ y_19_2 − y_19_2 ≤ 0 ∧ − y_19_1 + y_19_1 ≤ 0 ∧ y_19_1 − y_19_1 ≤ 0 ∧ − y_19_0 + y_19_0 ≤ 0 ∧ y_19_0 − y_19_0 ≤ 0 ∧ − x_SLAM_f_18_post + x_SLAM_f_18_post ≤ 0 ∧ x_SLAM_f_18_post − x_SLAM_f_18_post ≤ 0 ∧ − x_SLAM_f_18_2 + x_SLAM_f_18_2 ≤ 0 ∧ x_SLAM_f_18_2 − x_SLAM_f_18_2 ≤ 0 ∧ − x_SLAM_f_18_1 + x_SLAM_f_18_1 ≤ 0 ∧ x_SLAM_f_18_1 − x_SLAM_f_18_1 ≤ 0 ∧ − x_SLAM_f_18_0 + x_SLAM_f_18_0 ≤ 0 ∧ x_SLAM_f_18_0 − x_SLAM_f_18_0 ≤ 0 ∧ − x_28_post + x_28_post ≤ 0 ∧ x_28_post − x_28_post ≤ 0 ∧ − x_28_1 + x_28_1 ≤ 0 ∧ x_28_1 − x_28_1 ≤ 0 ∧ − x_28_0 + x_28_0 ≤ 0 ∧ x_28_0 − x_28_0 ≤ 0 ∧ − x_238_post + x_238_post ≤ 0 ∧ x_238_post − x_238_post ≤ 0 ∧ − x_238_0 + x_238_0 ≤ 0 ∧ x_238_0 − x_238_0 ≤ 0 ∧ − x_20_post + x_20_post ≤ 0 ∧ x_20_post − x_20_post ≤ 0 ∧ − x_20_2 + x_20_2 ≤ 0 ∧ x_20_2 − x_20_2 ≤ 0 ∧ − x_20_1 + x_20_1 ≤ 0 ∧ x_20_1 − x_20_1 ≤ 0 ∧ − x_20_0 + x_20_0 ≤ 0 ∧ x_20_0 − x_20_0 ≤ 0 ∧ − x_177_post + x_177_post ≤ 0 ∧ x_177_post − x_177_post ≤ 0 ∧ − x_177_0 + x_177_0 ≤ 0 ∧ x_177_0 − x_177_0 ≤ 0 ∧ − x_16_post + x_16_post ≤ 0 ∧ x_16_post − x_16_post ≤ 0 ∧ − x_16_1 + x_16_1 ≤ 0 ∧ x_16_1 − x_16_1 ≤ 0 ∧ − x_16_0 + x_16_0 ≤ 0 ∧ x_16_0 − x_16_0 ≤ 0 ∧ − x_14_post + x_14_post ≤ 0 ∧ x_14_post − x_14_post ≤ 0 ∧ − x_14_0 + x_14_0 ≤ 0 ∧ x_14_0 − x_14_0 ≤ 0 ∧ − tmp_48_post + tmp_48_post ≤ 0 ∧ tmp_48_post − tmp_48_post ≤ 0 ∧ − tmp_48_0 + tmp_48_0 ≤ 0 ∧ tmp_48_0 − tmp_48_0 ≤ 0 ∧ − temp_49_post + temp_49_post ≤ 0 ∧ temp_49_post − temp_49_post ≤ 0 ∧ − temp_49_0 + temp_49_0 ≤ 0 ∧ temp_49_0 − temp_49_0 ≤ 0 ∧ − temp0_45_post + temp0_45_post ≤ 0 ∧ temp0_45_post − temp0_45_post ≤ 0 ∧ − temp0_45_1 + temp0_45_1 ≤ 0 ∧ temp0_45_1 − temp0_45_1 ≤ 0 ∧ − temp0_45_0 + temp0_45_0 ≤ 0 ∧ temp0_45_0 − temp0_45_0 ≤ 0 ∧ − temp0_15_0 + temp0_15_0 ≤ 0 ∧ temp0_15_0 − temp0_15_0 ≤ 0 ∧ − t_23_post + t_23_post ≤ 0 ∧ t_23_post − t_23_post ≤ 0 ∧ − t_23_1 + t_23_1 ≤ 0 ∧ t_23_1 − t_23_1 ≤ 0 ∧ − t_23_0 + t_23_0 ≤ 0 ∧ t_23_0 − t_23_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_post + result_dot_printf_sdv_special_RETURN_VALUE_41_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_post − result_dot_printf_sdv_special_RETURN_VALUE_41_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_1 + result_dot_printf_sdv_special_RETURN_VALUE_41_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_1 − result_dot_printf_sdv_special_RETURN_VALUE_41_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_0 + result_dot_printf_sdv_special_RETURN_VALUE_41_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_0 − result_dot_printf_sdv_special_RETURN_VALUE_41_0 ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_post + result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_post − result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_1 + result_dot_nondet_sdv_special_RETURN_VALUE_13_1 ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_1 − result_dot_nondet_sdv_special_RETURN_VALUE_13_1 ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_0 + result_dot_nondet_sdv_special_RETURN_VALUE_13_0 ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_0 − result_dot_nondet_sdv_special_RETURN_VALUE_13_0 ≤ 0 ∧ − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post + result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post ≤ 0 ∧ result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post ≤ 0 ∧ − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 + result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 ≤ 0 ∧ result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 ≤ 0 ∧ − result_11_6 + result_11_6 ≤ 0 ∧ result_11_6 − result_11_6 ≤ 0 ∧ − result_11_5 + result_11_5 ≤ 0 ∧ result_11_5 − result_11_5 ≤ 0 ∧ − result_11_4 + result_11_4 ≤ 0 ∧ result_11_4 − result_11_4 ≤ 0 ∧ − rcd_72_post + rcd_72_post ≤ 0 ∧ rcd_72_post − rcd_72_post ≤ 0 ∧ − rcd_72_0 + rcd_72_0 ≤ 0 ∧ rcd_72_0 − rcd_72_0 ≤ 0 ∧ − rcd_102_post + rcd_102_post ≤ 0 ∧ rcd_102_post − rcd_102_post ≤ 0 ∧ − rcd_102_0 + rcd_102_0 ≤ 0 ∧ rcd_102_0 − rcd_102_0 ≤ 0 ∧ − r_53_post + r_53_post ≤ 0 ∧ r_53_post − r_53_post ≤ 0 ∧ − r_53_0 + r_53_0 ≤ 0 ∧ r_53_0 − r_53_0 ≤ 0 ∧ − r_161_post + r_161_post ≤ 0 ∧ r_161_post − r_161_post ≤ 0 ∧ − r_161_0 + r_161_0 ≤ 0 ∧ r_161_0 − r_161_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 ≤ 0 ∧ − nondet_12_post + nondet_12_post ≤ 0 ∧ nondet_12_post − nondet_12_post ≤ 0 ∧ − nondet_12_1 + nondet_12_1 ≤ 0 ∧ nondet_12_1 − nondet_12_1 ≤ 0 ∧ − nondet_12_0 + nondet_12_0 ≤ 0 ∧ nondet_12_0 − nondet_12_0 ≤ 0 ∧ − lt_237_post + lt_237_post ≤ 0 ∧ lt_237_post − lt_237_post ≤ 0 ∧ − lt_237_0 + lt_237_0 ≤ 0 ∧ lt_237_0 − lt_237_0 ≤ 0 ∧ − length_43_post + length_43_post ≤ 0 ∧ length_43_post − length_43_post ≤ 0 ∧ − length_43_0 + length_43_0 ≤ 0 ∧ length_43_0 − length_43_0 ≤ 0 ∧ − len_246_post + len_246_post ≤ 0 ∧ len_246_post − len_246_post ≤ 0 ∧ − len_246_0 + len_246_0 ≤ 0 ∧ len_246_0 − len_246_0 ≤ 0 ∧ − len_180_post + len_180_post ≤ 0 ∧ len_180_post − len_180_post ≤ 0 ∧ − len_180_0 + len_180_0 ≤ 0 ∧ len_180_0 − len_180_0 ≤ 0 ∧ − i_44_post + i_44_post ≤ 0 ∧ i_44_post − i_44_post ≤ 0 ∧ − i_44_0 + i_44_0 ≤ 0 ∧ i_44_0 − i_44_0 ≤ 0 ∧ − i_125_post + i_125_post ≤ 0 ∧ i_125_post − i_125_post ≤ 0 ∧ − i_125_0 + i_125_0 ≤ 0 ∧ i_125_0 − i_125_0 ≤ 0 ∧ − i_108_post + i_108_post ≤ 0 ∧ i_108_post − i_108_post ≤ 0 ∧ − i_108_0 + i_108_0 ≤ 0 ∧ i_108_0 − i_108_0 ≤ 0 ∧ − head_46_post + head_46_post ≤ 0 ∧ head_46_post − head_46_post ≤ 0 ∧ − head_46_0 + head_46_0 ≤ 0 ∧ head_46_0 − head_46_0 ≤ 0 ∧ − ct_17_post + ct_17_post ≤ 0 ∧ ct_17_post − ct_17_post ≤ 0 ∧ − ct_17_2 + ct_17_2 ≤ 0 ∧ ct_17_2 − ct_17_2 ≤ 0 ∧ − ct_17_1 + ct_17_1 ≤ 0 ∧ ct_17_1 − ct_17_1 ≤ 0 ∧ − ct_17_0 + ct_17_0 ≤ 0 ∧ ct_17_0 − ct_17_0 ≤ 0 ∧ − a_328_post + a_328_post ≤ 0 ∧ a_328_post − a_328_post ≤ 0 ∧ − a_328_0 + a_328_0 ≤ 0 ∧ a_328_0 − a_328_0 ≤ 0 ∧ − a_305_post + a_305_post ≤ 0 ∧ a_305_post − a_305_post ≤ 0 ∧ − a_305_0 + a_305_0 ≤ 0 ∧ a_305_0 − a_305_0 ≤ 0 ∧ − a_283_post + a_283_post ≤ 0 ∧ a_283_post − a_283_post ≤ 0 ∧ − a_283_0 + a_283_0 ≤ 0 ∧ a_283_0 − a_283_0 ≤ 0 ∧ − a_26_post + a_26_post ≤ 0 ∧ a_26_post − a_26_post ≤ 0 ∧ − a_26_1 + a_26_1 ≤ 0 ∧ a_26_1 − a_26_1 ≤ 0 ∧ − a_26_0 + a_26_0 ≤ 0 ∧ a_26_0 − a_26_0 ≤ 0 ∧ − a_247_post + a_247_post ≤ 0 ∧ a_247_post − a_247_post ≤ 0 ∧ − a_247_0 + a_247_0 ≤ 0 ∧ a_247_0 − a_247_0 ≤ 0 ∧ − a_197_post + a_197_post ≤ 0 ∧ a_197_post − a_197_post ≤ 0 ∧ − a_197_0 + a_197_0 ≤ 0 ∧ a_197_0 − a_197_0 ≤ 0 ∧ − a_146_0 + a_146_0 ≤ 0 ∧ a_146_0 − a_146_0 ≤ 0 | |
| 53 | 81 | 54: | 1 − x_14_0 ≤ 0 ∧ − y_19_post + y_19_post ≤ 0 ∧ y_19_post − y_19_post ≤ 0 ∧ − y_19_2 + y_19_2 ≤ 0 ∧ y_19_2 − y_19_2 ≤ 0 ∧ − y_19_1 + y_19_1 ≤ 0 ∧ y_19_1 − y_19_1 ≤ 0 ∧ − y_19_0 + y_19_0 ≤ 0 ∧ y_19_0 − y_19_0 ≤ 0 ∧ − x_SLAM_f_18_post + x_SLAM_f_18_post ≤ 0 ∧ x_SLAM_f_18_post − x_SLAM_f_18_post ≤ 0 ∧ − x_SLAM_f_18_2 + x_SLAM_f_18_2 ≤ 0 ∧ x_SLAM_f_18_2 − x_SLAM_f_18_2 ≤ 0 ∧ − x_SLAM_f_18_1 + x_SLAM_f_18_1 ≤ 0 ∧ x_SLAM_f_18_1 − x_SLAM_f_18_1 ≤ 0 ∧ − x_SLAM_f_18_0 + x_SLAM_f_18_0 ≤ 0 ∧ x_SLAM_f_18_0 − x_SLAM_f_18_0 ≤ 0 ∧ − x_34_post + x_34_post ≤ 0 ∧ x_34_post − x_34_post ≤ 0 ∧ − x_34_1 + x_34_1 ≤ 0 ∧ x_34_1 − x_34_1 ≤ 0 ∧ − x_34_0 + x_34_0 ≤ 0 ∧ x_34_0 − x_34_0 ≤ 0 ∧ − x_28_post + x_28_post ≤ 0 ∧ x_28_post − x_28_post ≤ 0 ∧ − x_28_1 + x_28_1 ≤ 0 ∧ x_28_1 − x_28_1 ≤ 0 ∧ − x_28_0 + x_28_0 ≤ 0 ∧ x_28_0 − x_28_0 ≤ 0 ∧ − x_238_post + x_238_post ≤ 0 ∧ x_238_post − x_238_post ≤ 0 ∧ − x_238_0 + x_238_0 ≤ 0 ∧ x_238_0 − x_238_0 ≤ 0 ∧ − x_20_post + x_20_post ≤ 0 ∧ x_20_post − x_20_post ≤ 0 ∧ − x_20_2 + x_20_2 ≤ 0 ∧ x_20_2 − x_20_2 ≤ 0 ∧ − x_20_1 + x_20_1 ≤ 0 ∧ x_20_1 − x_20_1 ≤ 0 ∧ − x_20_0 + x_20_0 ≤ 0 ∧ x_20_0 − x_20_0 ≤ 0 ∧ − x_177_post + x_177_post ≤ 0 ∧ x_177_post − x_177_post ≤ 0 ∧ − x_177_0 + x_177_0 ≤ 0 ∧ x_177_0 − x_177_0 ≤ 0 ∧ − x_16_post + x_16_post ≤ 0 ∧ x_16_post − x_16_post ≤ 0 ∧ − x_16_1 + x_16_1 ≤ 0 ∧ x_16_1 − x_16_1 ≤ 0 ∧ − x_16_0 + x_16_0 ≤ 0 ∧ x_16_0 − x_16_0 ≤ 0 ∧ − x_14_post + x_14_post ≤ 0 ∧ x_14_post − x_14_post ≤ 0 ∧ − x_14_0 + x_14_0 ≤ 0 ∧ x_14_0 − x_14_0 ≤ 0 ∧ − tmp_48_post + tmp_48_post ≤ 0 ∧ tmp_48_post − tmp_48_post ≤ 0 ∧ − tmp_48_0 + tmp_48_0 ≤ 0 ∧ tmp_48_0 − tmp_48_0 ≤ 0 ∧ − temp_49_post + temp_49_post ≤ 0 ∧ temp_49_post − temp_49_post ≤ 0 ∧ − temp_49_0 + temp_49_0 ≤ 0 ∧ temp_49_0 − temp_49_0 ≤ 0 ∧ − temp0_45_post + temp0_45_post ≤ 0 ∧ temp0_45_post − temp0_45_post ≤ 0 ∧ − temp0_45_1 + temp0_45_1 ≤ 0 ∧ temp0_45_1 − temp0_45_1 ≤ 0 ∧ − temp0_45_0 + temp0_45_0 ≤ 0 ∧ temp0_45_0 − temp0_45_0 ≤ 0 ∧ − temp0_32_post + temp0_32_post ≤ 0 ∧ temp0_32_post − temp0_32_post ≤ 0 ∧ − temp0_32_4 + temp0_32_4 ≤ 0 ∧ temp0_32_4 − temp0_32_4 ≤ 0 ∧ − temp0_32_3 + temp0_32_3 ≤ 0 ∧ temp0_32_3 − temp0_32_3 ≤ 0 ∧ − temp0_32_2 + temp0_32_2 ≤ 0 ∧ temp0_32_2 − temp0_32_2 ≤ 0 ∧ − temp0_32_1 + temp0_32_1 ≤ 0 ∧ temp0_32_1 − temp0_32_1 ≤ 0 ∧ − temp0_32_0 + temp0_32_0 ≤ 0 ∧ temp0_32_0 − temp0_32_0 ≤ 0 ∧ − temp0_15_0 + temp0_15_0 ≤ 0 ∧ temp0_15_0 − temp0_15_0 ≤ 0 ∧ − t_23_post + t_23_post ≤ 0 ∧ t_23_post − t_23_post ≤ 0 ∧ − t_23_1 + t_23_1 ≤ 0 ∧ t_23_1 − t_23_1 ≤ 0 ∧ − t_23_0 + t_23_0 ≤ 0 ∧ t_23_0 − t_23_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_post + result_dot_printf_sdv_special_RETURN_VALUE_41_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_post − result_dot_printf_sdv_special_RETURN_VALUE_41_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_1 + result_dot_printf_sdv_special_RETURN_VALUE_41_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_1 − result_dot_printf_sdv_special_RETURN_VALUE_41_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_0 + result_dot_printf_sdv_special_RETURN_VALUE_41_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_0 − result_dot_printf_sdv_special_RETURN_VALUE_41_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_post + result_dot_printf_sdv_special_RETURN_VALUE_38_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_post − result_dot_printf_sdv_special_RETURN_VALUE_38_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_1 + result_dot_printf_sdv_special_RETURN_VALUE_38_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_1 − result_dot_printf_sdv_special_RETURN_VALUE_38_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_0 + result_dot_printf_sdv_special_RETURN_VALUE_38_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_0 − result_dot_printf_sdv_special_RETURN_VALUE_38_0 ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_post + result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_post − result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_1 + result_dot_nondet_sdv_special_RETURN_VALUE_13_1 ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_1 − result_dot_nondet_sdv_special_RETURN_VALUE_13_1 ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_0 + result_dot_nondet_sdv_special_RETURN_VALUE_13_0 ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_0 − result_dot_nondet_sdv_special_RETURN_VALUE_13_0 ≤ 0 ∧ − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post + result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post ≤ 0 ∧ result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post ≤ 0 ∧ − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 + result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 ≤ 0 ∧ result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 ≤ 0 ∧ − result_11_post + result_11_post ≤ 0 ∧ result_11_post − result_11_post ≤ 0 ∧ − result_11_6 + result_11_6 ≤ 0 ∧ result_11_6 − result_11_6 ≤ 0 ∧ − result_11_5 + result_11_5 ≤ 0 ∧ result_11_5 − result_11_5 ≤ 0 ∧ − result_11_4 + result_11_4 ≤ 0 ∧ result_11_4 − result_11_4 ≤ 0 ∧ − result_11_3 + result_11_3 ≤ 0 ∧ result_11_3 − result_11_3 ≤ 0 ∧ − result_11_2 + result_11_2 ≤ 0 ∧ result_11_2 − result_11_2 ≤ 0 ∧ − result_11_1 + result_11_1 ≤ 0 ∧ result_11_1 − result_11_1 ≤ 0 ∧ − result_11_0 + result_11_0 ≤ 0 ∧ result_11_0 − result_11_0 ≤ 0 ∧ − rcd_72_post + rcd_72_post ≤ 0 ∧ rcd_72_post − rcd_72_post ≤ 0 ∧ − rcd_72_0 + rcd_72_0 ≤ 0 ∧ rcd_72_0 − rcd_72_0 ≤ 0 ∧ − rcd_102_post + rcd_102_post ≤ 0 ∧ rcd_102_post − rcd_102_post ≤ 0 ∧ − rcd_102_0 + rcd_102_0 ≤ 0 ∧ rcd_102_0 − rcd_102_0 ≤ 0 ∧ − r_53_post + r_53_post ≤ 0 ∧ r_53_post − r_53_post ≤ 0 ∧ − r_53_0 + r_53_0 ≤ 0 ∧ r_53_0 − r_53_0 ≤ 0 ∧ − r_161_post + r_161_post ≤ 0 ∧ r_161_post − r_161_post ≤ 0 ∧ − r_161_0 + r_161_0 ≤ 0 ∧ r_161_0 − r_161_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 ≤ 0 ∧ − nondet_12_post + nondet_12_post ≤ 0 ∧ nondet_12_post − nondet_12_post ≤ 0 ∧ − nondet_12_1 + nondet_12_1 ≤ 0 ∧ nondet_12_1 − nondet_12_1 ≤ 0 ∧ − nondet_12_0 + nondet_12_0 ≤ 0 ∧ nondet_12_0 − nondet_12_0 ≤ 0 ∧ − lt_37_post + lt_37_post ≤ 0 ∧ lt_37_post − lt_37_post ≤ 0 ∧ − lt_37_1 + lt_37_1 ≤ 0 ∧ lt_37_1 − lt_37_1 ≤ 0 ∧ − lt_37_0 + lt_37_0 ≤ 0 ∧ lt_37_0 − lt_37_0 ≤ 0 ∧ − lt_36_post + lt_36_post ≤ 0 ∧ lt_36_post − lt_36_post ≤ 0 ∧ − lt_36_0 + lt_36_0 ≤ 0 ∧ lt_36_0 − lt_36_0 ≤ 0 ∧ − lt_237_post + lt_237_post ≤ 0 ∧ lt_237_post − lt_237_post ≤ 0 ∧ − lt_237_0 + lt_237_0 ≤ 0 ∧ lt_237_0 − lt_237_0 ≤ 0 ∧ − length_43_post + length_43_post ≤ 0 ∧ length_43_post − length_43_post ≤ 0 ∧ − length_43_0 + length_43_0 ≤ 0 ∧ length_43_0 − length_43_0 ≤ 0 ∧ − len_246_post + len_246_post ≤ 0 ∧ len_246_post − len_246_post ≤ 0 ∧ − len_246_0 + len_246_0 ≤ 0 ∧ len_246_0 − len_246_0 ≤ 0 ∧ − len_180_post + len_180_post ≤ 0 ∧ len_180_post − len_180_post ≤ 0 ∧ − len_180_0 + len_180_0 ≤ 0 ∧ len_180_0 − len_180_0 ≤ 0 ∧ − i_44_post + i_44_post ≤ 0 ∧ i_44_post − i_44_post ≤ 0 ∧ − i_44_0 + i_44_0 ≤ 0 ∧ i_44_0 − i_44_0 ≤ 0 ∧ − i_125_post + i_125_post ≤ 0 ∧ i_125_post − i_125_post ≤ 0 ∧ − i_125_0 + i_125_0 ≤ 0 ∧ i_125_0 − i_125_0 ≤ 0 ∧ − i_108_post + i_108_post ≤ 0 ∧ i_108_post − i_108_post ≤ 0 ∧ − i_108_0 + i_108_0 ≤ 0 ∧ i_108_0 − i_108_0 ≤ 0 ∧ − head_46_post + head_46_post ≤ 0 ∧ head_46_post − head_46_post ≤ 0 ∧ − head_46_0 + head_46_0 ≤ 0 ∧ head_46_0 − head_46_0 ≤ 0 ∧ − fmt_31_post + fmt_31_post ≤ 0 ∧ fmt_31_post − fmt_31_post ≤ 0 ∧ − fmt_31_4 + fmt_31_4 ≤ 0 ∧ fmt_31_4 − fmt_31_4 ≤ 0 ∧ − fmt_31_3 + fmt_31_3 ≤ 0 ∧ fmt_31_3 − fmt_31_3 ≤ 0 ∧ − fmt_31_2 + fmt_31_2 ≤ 0 ∧ fmt_31_2 − fmt_31_2 ≤ 0 ∧ − fmt_31_1 + fmt_31_1 ≤ 0 ∧ fmt_31_1 − fmt_31_1 ≤ 0 ∧ − fmt_31_0 + fmt_31_0 ≤ 0 ∧ fmt_31_0 − fmt_31_0 ≤ 0 ∧ − ct_17_post + ct_17_post ≤ 0 ∧ ct_17_post − ct_17_post ≤ 0 ∧ − ct_17_2 + ct_17_2 ≤ 0 ∧ ct_17_2 − ct_17_2 ≤ 0 ∧ − ct_17_1 + ct_17_1 ≤ 0 ∧ ct_17_1 − ct_17_1 ≤ 0 ∧ − ct_17_0 + ct_17_0 ≤ 0 ∧ ct_17_0 − ct_17_0 ≤ 0 ∧ − a_328_post + a_328_post ≤ 0 ∧ a_328_post − a_328_post ≤ 0 ∧ − a_328_0 + a_328_0 ≤ 0 ∧ a_328_0 − a_328_0 ≤ 0 ∧ − a_305_post + a_305_post ≤ 0 ∧ a_305_post − a_305_post ≤ 0 ∧ − a_305_0 + a_305_0 ≤ 0 ∧ a_305_0 − a_305_0 ≤ 0 ∧ − a_283_post + a_283_post ≤ 0 ∧ a_283_post − a_283_post ≤ 0 ∧ − a_283_0 + a_283_0 ≤ 0 ∧ a_283_0 − a_283_0 ≤ 0 ∧ − a_26_post + a_26_post ≤ 0 ∧ a_26_post − a_26_post ≤ 0 ∧ − a_26_1 + a_26_1 ≤ 0 ∧ a_26_1 − a_26_1 ≤ 0 ∧ − a_26_0 + a_26_0 ≤ 0 ∧ a_26_0 − a_26_0 ≤ 0 ∧ − a_247_post + a_247_post ≤ 0 ∧ a_247_post − a_247_post ≤ 0 ∧ − a_247_0 + a_247_0 ≤ 0 ∧ a_247_0 − a_247_0 ≤ 0 ∧ − a_197_post + a_197_post ≤ 0 ∧ a_197_post − a_197_post ≤ 0 ∧ − a_197_0 + a_197_0 ≤ 0 ∧ a_197_0 − a_197_0 ≤ 0 ∧ − a_146_0 + a_146_0 ≤ 0 ∧ a_146_0 − a_146_0 ≤ 0 | |
| 53 | 82 | 54: | 1 + x_14_0 ≤ 0 ∧ − y_19_post + y_19_post ≤ 0 ∧ y_19_post − y_19_post ≤ 0 ∧ − y_19_2 + y_19_2 ≤ 0 ∧ y_19_2 − y_19_2 ≤ 0 ∧ − y_19_1 + y_19_1 ≤ 0 ∧ y_19_1 − y_19_1 ≤ 0 ∧ − y_19_0 + y_19_0 ≤ 0 ∧ y_19_0 − y_19_0 ≤ 0 ∧ − x_SLAM_f_18_post + x_SLAM_f_18_post ≤ 0 ∧ x_SLAM_f_18_post − x_SLAM_f_18_post ≤ 0 ∧ − x_SLAM_f_18_2 + x_SLAM_f_18_2 ≤ 0 ∧ x_SLAM_f_18_2 − x_SLAM_f_18_2 ≤ 0 ∧ − x_SLAM_f_18_1 + x_SLAM_f_18_1 ≤ 0 ∧ x_SLAM_f_18_1 − x_SLAM_f_18_1 ≤ 0 ∧ − x_SLAM_f_18_0 + x_SLAM_f_18_0 ≤ 0 ∧ x_SLAM_f_18_0 − x_SLAM_f_18_0 ≤ 0 ∧ − x_34_post + x_34_post ≤ 0 ∧ x_34_post − x_34_post ≤ 0 ∧ − x_34_1 + x_34_1 ≤ 0 ∧ x_34_1 − x_34_1 ≤ 0 ∧ − x_34_0 + x_34_0 ≤ 0 ∧ x_34_0 − x_34_0 ≤ 0 ∧ − x_28_post + x_28_post ≤ 0 ∧ x_28_post − x_28_post ≤ 0 ∧ − x_28_1 + x_28_1 ≤ 0 ∧ x_28_1 − x_28_1 ≤ 0 ∧ − x_28_0 + x_28_0 ≤ 0 ∧ x_28_0 − x_28_0 ≤ 0 ∧ − x_238_post + x_238_post ≤ 0 ∧ x_238_post − x_238_post ≤ 0 ∧ − x_238_0 + x_238_0 ≤ 0 ∧ x_238_0 − x_238_0 ≤ 0 ∧ − x_20_post + x_20_post ≤ 0 ∧ x_20_post − x_20_post ≤ 0 ∧ − x_20_2 + x_20_2 ≤ 0 ∧ x_20_2 − x_20_2 ≤ 0 ∧ − x_20_1 + x_20_1 ≤ 0 ∧ x_20_1 − x_20_1 ≤ 0 ∧ − x_20_0 + x_20_0 ≤ 0 ∧ x_20_0 − x_20_0 ≤ 0 ∧ − x_177_post + x_177_post ≤ 0 ∧ x_177_post − x_177_post ≤ 0 ∧ − x_177_0 + x_177_0 ≤ 0 ∧ x_177_0 − x_177_0 ≤ 0 ∧ − x_16_post + x_16_post ≤ 0 ∧ x_16_post − x_16_post ≤ 0 ∧ − x_16_1 + x_16_1 ≤ 0 ∧ x_16_1 − x_16_1 ≤ 0 ∧ − x_16_0 + x_16_0 ≤ 0 ∧ x_16_0 − x_16_0 ≤ 0 ∧ − x_14_post + x_14_post ≤ 0 ∧ x_14_post − x_14_post ≤ 0 ∧ − x_14_0 + x_14_0 ≤ 0 ∧ x_14_0 − x_14_0 ≤ 0 ∧ − tmp_48_post + tmp_48_post ≤ 0 ∧ tmp_48_post − tmp_48_post ≤ 0 ∧ − tmp_48_0 + tmp_48_0 ≤ 0 ∧ tmp_48_0 − tmp_48_0 ≤ 0 ∧ − temp_49_post + temp_49_post ≤ 0 ∧ temp_49_post − temp_49_post ≤ 0 ∧ − temp_49_0 + temp_49_0 ≤ 0 ∧ temp_49_0 − temp_49_0 ≤ 0 ∧ − temp0_45_post + temp0_45_post ≤ 0 ∧ temp0_45_post − temp0_45_post ≤ 0 ∧ − temp0_45_1 + temp0_45_1 ≤ 0 ∧ temp0_45_1 − temp0_45_1 ≤ 0 ∧ − temp0_45_0 + temp0_45_0 ≤ 0 ∧ temp0_45_0 − temp0_45_0 ≤ 0 ∧ − temp0_32_post + temp0_32_post ≤ 0 ∧ temp0_32_post − temp0_32_post ≤ 0 ∧ − temp0_32_4 + temp0_32_4 ≤ 0 ∧ temp0_32_4 − temp0_32_4 ≤ 0 ∧ − temp0_32_3 + temp0_32_3 ≤ 0 ∧ temp0_32_3 − temp0_32_3 ≤ 0 ∧ − temp0_32_2 + temp0_32_2 ≤ 0 ∧ temp0_32_2 − temp0_32_2 ≤ 0 ∧ − temp0_32_1 + temp0_32_1 ≤ 0 ∧ temp0_32_1 − temp0_32_1 ≤ 0 ∧ − temp0_32_0 + temp0_32_0 ≤ 0 ∧ temp0_32_0 − temp0_32_0 ≤ 0 ∧ − temp0_15_0 + temp0_15_0 ≤ 0 ∧ temp0_15_0 − temp0_15_0 ≤ 0 ∧ − t_23_post + t_23_post ≤ 0 ∧ t_23_post − t_23_post ≤ 0 ∧ − t_23_1 + t_23_1 ≤ 0 ∧ t_23_1 − t_23_1 ≤ 0 ∧ − t_23_0 + t_23_0 ≤ 0 ∧ t_23_0 − t_23_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_post + result_dot_printf_sdv_special_RETURN_VALUE_41_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_post − result_dot_printf_sdv_special_RETURN_VALUE_41_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_1 + result_dot_printf_sdv_special_RETURN_VALUE_41_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_1 − result_dot_printf_sdv_special_RETURN_VALUE_41_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_0 + result_dot_printf_sdv_special_RETURN_VALUE_41_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_0 − result_dot_printf_sdv_special_RETURN_VALUE_41_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_post + result_dot_printf_sdv_special_RETURN_VALUE_38_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_post − result_dot_printf_sdv_special_RETURN_VALUE_38_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_1 + result_dot_printf_sdv_special_RETURN_VALUE_38_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_1 − result_dot_printf_sdv_special_RETURN_VALUE_38_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_0 + result_dot_printf_sdv_special_RETURN_VALUE_38_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_0 − result_dot_printf_sdv_special_RETURN_VALUE_38_0 ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_post + result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_post − result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_1 + result_dot_nondet_sdv_special_RETURN_VALUE_13_1 ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_1 − result_dot_nondet_sdv_special_RETURN_VALUE_13_1 ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_0 + result_dot_nondet_sdv_special_RETURN_VALUE_13_0 ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_0 − result_dot_nondet_sdv_special_RETURN_VALUE_13_0 ≤ 0 ∧ − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post + result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post ≤ 0 ∧ result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post ≤ 0 ∧ − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 + result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 ≤ 0 ∧ result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 ≤ 0 ∧ − result_11_post + result_11_post ≤ 0 ∧ result_11_post − result_11_post ≤ 0 ∧ − result_11_6 + result_11_6 ≤ 0 ∧ result_11_6 − result_11_6 ≤ 0 ∧ − result_11_5 + result_11_5 ≤ 0 ∧ result_11_5 − result_11_5 ≤ 0 ∧ − result_11_4 + result_11_4 ≤ 0 ∧ result_11_4 − result_11_4 ≤ 0 ∧ − result_11_3 + result_11_3 ≤ 0 ∧ result_11_3 − result_11_3 ≤ 0 ∧ − result_11_2 + result_11_2 ≤ 0 ∧ result_11_2 − result_11_2 ≤ 0 ∧ − result_11_1 + result_11_1 ≤ 0 ∧ result_11_1 − result_11_1 ≤ 0 ∧ − result_11_0 + result_11_0 ≤ 0 ∧ result_11_0 − result_11_0 ≤ 0 ∧ − rcd_72_post + rcd_72_post ≤ 0 ∧ rcd_72_post − rcd_72_post ≤ 0 ∧ − rcd_72_0 + rcd_72_0 ≤ 0 ∧ rcd_72_0 − rcd_72_0 ≤ 0 ∧ − rcd_102_post + rcd_102_post ≤ 0 ∧ rcd_102_post − rcd_102_post ≤ 0 ∧ − rcd_102_0 + rcd_102_0 ≤ 0 ∧ rcd_102_0 − rcd_102_0 ≤ 0 ∧ − r_53_post + r_53_post ≤ 0 ∧ r_53_post − r_53_post ≤ 0 ∧ − r_53_0 + r_53_0 ≤ 0 ∧ r_53_0 − r_53_0 ≤ 0 ∧ − r_161_post + r_161_post ≤ 0 ∧ r_161_post − r_161_post ≤ 0 ∧ − r_161_0 + r_161_0 ≤ 0 ∧ r_161_0 − r_161_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 ≤ 0 ∧ − nondet_12_post + nondet_12_post ≤ 0 ∧ nondet_12_post − nondet_12_post ≤ 0 ∧ − nondet_12_1 + nondet_12_1 ≤ 0 ∧ nondet_12_1 − nondet_12_1 ≤ 0 ∧ − nondet_12_0 + nondet_12_0 ≤ 0 ∧ nondet_12_0 − nondet_12_0 ≤ 0 ∧ − lt_37_post + lt_37_post ≤ 0 ∧ lt_37_post − lt_37_post ≤ 0 ∧ − lt_37_1 + lt_37_1 ≤ 0 ∧ lt_37_1 − lt_37_1 ≤ 0 ∧ − lt_37_0 + lt_37_0 ≤ 0 ∧ lt_37_0 − lt_37_0 ≤ 0 ∧ − lt_36_post + lt_36_post ≤ 0 ∧ lt_36_post − lt_36_post ≤ 0 ∧ − lt_36_0 + lt_36_0 ≤ 0 ∧ lt_36_0 − lt_36_0 ≤ 0 ∧ − lt_237_post + lt_237_post ≤ 0 ∧ lt_237_post − lt_237_post ≤ 0 ∧ − lt_237_0 + lt_237_0 ≤ 0 ∧ lt_237_0 − lt_237_0 ≤ 0 ∧ − length_43_post + length_43_post ≤ 0 ∧ length_43_post − length_43_post ≤ 0 ∧ − length_43_0 + length_43_0 ≤ 0 ∧ length_43_0 − length_43_0 ≤ 0 ∧ − len_246_post + len_246_post ≤ 0 ∧ len_246_post − len_246_post ≤ 0 ∧ − len_246_0 + len_246_0 ≤ 0 ∧ len_246_0 − len_246_0 ≤ 0 ∧ − len_180_post + len_180_post ≤ 0 ∧ len_180_post − len_180_post ≤ 0 ∧ − len_180_0 + len_180_0 ≤ 0 ∧ len_180_0 − len_180_0 ≤ 0 ∧ − i_44_post + i_44_post ≤ 0 ∧ i_44_post − i_44_post ≤ 0 ∧ − i_44_0 + i_44_0 ≤ 0 ∧ i_44_0 − i_44_0 ≤ 0 ∧ − i_125_post + i_125_post ≤ 0 ∧ i_125_post − i_125_post ≤ 0 ∧ − i_125_0 + i_125_0 ≤ 0 ∧ i_125_0 − i_125_0 ≤ 0 ∧ − i_108_post + i_108_post ≤ 0 ∧ i_108_post − i_108_post ≤ 0 ∧ − i_108_0 + i_108_0 ≤ 0 ∧ i_108_0 − i_108_0 ≤ 0 ∧ − head_46_post + head_46_post ≤ 0 ∧ head_46_post − head_46_post ≤ 0 ∧ − head_46_0 + head_46_0 ≤ 0 ∧ head_46_0 − head_46_0 ≤ 0 ∧ − fmt_31_post + fmt_31_post ≤ 0 ∧ fmt_31_post − fmt_31_post ≤ 0 ∧ − fmt_31_4 + fmt_31_4 ≤ 0 ∧ fmt_31_4 − fmt_31_4 ≤ 0 ∧ − fmt_31_3 + fmt_31_3 ≤ 0 ∧ fmt_31_3 − fmt_31_3 ≤ 0 ∧ − fmt_31_2 + fmt_31_2 ≤ 0 ∧ fmt_31_2 − fmt_31_2 ≤ 0 ∧ − fmt_31_1 + fmt_31_1 ≤ 0 ∧ fmt_31_1 − fmt_31_1 ≤ 0 ∧ − fmt_31_0 + fmt_31_0 ≤ 0 ∧ fmt_31_0 − fmt_31_0 ≤ 0 ∧ − ct_17_post + ct_17_post ≤ 0 ∧ ct_17_post − ct_17_post ≤ 0 ∧ − ct_17_2 + ct_17_2 ≤ 0 ∧ ct_17_2 − ct_17_2 ≤ 0 ∧ − ct_17_1 + ct_17_1 ≤ 0 ∧ ct_17_1 − ct_17_1 ≤ 0 ∧ − ct_17_0 + ct_17_0 ≤ 0 ∧ ct_17_0 − ct_17_0 ≤ 0 ∧ − a_328_post + a_328_post ≤ 0 ∧ a_328_post − a_328_post ≤ 0 ∧ − a_328_0 + a_328_0 ≤ 0 ∧ a_328_0 − a_328_0 ≤ 0 ∧ − a_305_post + a_305_post ≤ 0 ∧ a_305_post − a_305_post ≤ 0 ∧ − a_305_0 + a_305_0 ≤ 0 ∧ a_305_0 − a_305_0 ≤ 0 ∧ − a_283_post + a_283_post ≤ 0 ∧ a_283_post − a_283_post ≤ 0 ∧ − a_283_0 + a_283_0 ≤ 0 ∧ a_283_0 − a_283_0 ≤ 0 ∧ − a_26_post + a_26_post ≤ 0 ∧ a_26_post − a_26_post ≤ 0 ∧ − a_26_1 + a_26_1 ≤ 0 ∧ a_26_1 − a_26_1 ≤ 0 ∧ − a_26_0 + a_26_0 ≤ 0 ∧ a_26_0 − a_26_0 ≤ 0 ∧ − a_247_post + a_247_post ≤ 0 ∧ a_247_post − a_247_post ≤ 0 ∧ − a_247_0 + a_247_0 ≤ 0 ∧ a_247_0 − a_247_0 ≤ 0 ∧ − a_197_post + a_197_post ≤ 0 ∧ a_197_post − a_197_post ≤ 0 ∧ − a_197_0 + a_197_0 ≤ 0 ∧ a_197_0 − a_197_0 ≤ 0 ∧ − a_146_0 + a_146_0 ≤ 0 ∧ a_146_0 − a_146_0 ≤ 0 | |
| 54 | 83 | 55: | 1 − x_177_0 ≤ 0 ∧ − y_19_post + y_19_post ≤ 0 ∧ y_19_post − y_19_post ≤ 0 ∧ − y_19_2 + y_19_2 ≤ 0 ∧ y_19_2 − y_19_2 ≤ 0 ∧ − y_19_1 + y_19_1 ≤ 0 ∧ y_19_1 − y_19_1 ≤ 0 ∧ − y_19_0 + y_19_0 ≤ 0 ∧ y_19_0 − y_19_0 ≤ 0 ∧ − x_SLAM_f_18_post + x_SLAM_f_18_post ≤ 0 ∧ x_SLAM_f_18_post − x_SLAM_f_18_post ≤ 0 ∧ − x_SLAM_f_18_2 + x_SLAM_f_18_2 ≤ 0 ∧ x_SLAM_f_18_2 − x_SLAM_f_18_2 ≤ 0 ∧ − x_SLAM_f_18_1 + x_SLAM_f_18_1 ≤ 0 ∧ x_SLAM_f_18_1 − x_SLAM_f_18_1 ≤ 0 ∧ − x_SLAM_f_18_0 + x_SLAM_f_18_0 ≤ 0 ∧ x_SLAM_f_18_0 − x_SLAM_f_18_0 ≤ 0 ∧ − x_34_post + x_34_post ≤ 0 ∧ x_34_post − x_34_post ≤ 0 ∧ − x_34_1 + x_34_1 ≤ 0 ∧ x_34_1 − x_34_1 ≤ 0 ∧ − x_34_0 + x_34_0 ≤ 0 ∧ x_34_0 − x_34_0 ≤ 0 ∧ − x_28_post + x_28_post ≤ 0 ∧ x_28_post − x_28_post ≤ 0 ∧ − x_28_1 + x_28_1 ≤ 0 ∧ x_28_1 − x_28_1 ≤ 0 ∧ − x_28_0 + x_28_0 ≤ 0 ∧ x_28_0 − x_28_0 ≤ 0 ∧ − x_238_post + x_238_post ≤ 0 ∧ x_238_post − x_238_post ≤ 0 ∧ − x_238_0 + x_238_0 ≤ 0 ∧ x_238_0 − x_238_0 ≤ 0 ∧ − x_20_post + x_20_post ≤ 0 ∧ x_20_post − x_20_post ≤ 0 ∧ − x_20_2 + x_20_2 ≤ 0 ∧ x_20_2 − x_20_2 ≤ 0 ∧ − x_20_1 + x_20_1 ≤ 0 ∧ x_20_1 − x_20_1 ≤ 0 ∧ − x_20_0 + x_20_0 ≤ 0 ∧ x_20_0 − x_20_0 ≤ 0 ∧ − x_177_post + x_177_post ≤ 0 ∧ x_177_post − x_177_post ≤ 0 ∧ − x_177_0 + x_177_0 ≤ 0 ∧ x_177_0 − x_177_0 ≤ 0 ∧ − x_16_post + x_16_post ≤ 0 ∧ x_16_post − x_16_post ≤ 0 ∧ − x_16_1 + x_16_1 ≤ 0 ∧ x_16_1 − x_16_1 ≤ 0 ∧ − x_16_0 + x_16_0 ≤ 0 ∧ x_16_0 − x_16_0 ≤ 0 ∧ − x_14_post + x_14_post ≤ 0 ∧ x_14_post − x_14_post ≤ 0 ∧ − x_14_0 + x_14_0 ≤ 0 ∧ x_14_0 − x_14_0 ≤ 0 ∧ − tmp_48_post + tmp_48_post ≤ 0 ∧ tmp_48_post − tmp_48_post ≤ 0 ∧ − tmp_48_0 + tmp_48_0 ≤ 0 ∧ tmp_48_0 − tmp_48_0 ≤ 0 ∧ − temp_49_post + temp_49_post ≤ 0 ∧ temp_49_post − temp_49_post ≤ 0 ∧ − temp_49_0 + temp_49_0 ≤ 0 ∧ temp_49_0 − temp_49_0 ≤ 0 ∧ − temp0_45_post + temp0_45_post ≤ 0 ∧ temp0_45_post − temp0_45_post ≤ 0 ∧ − temp0_45_1 + temp0_45_1 ≤ 0 ∧ temp0_45_1 − temp0_45_1 ≤ 0 ∧ − temp0_45_0 + temp0_45_0 ≤ 0 ∧ temp0_45_0 − temp0_45_0 ≤ 0 ∧ − temp0_32_post + temp0_32_post ≤ 0 ∧ temp0_32_post − temp0_32_post ≤ 0 ∧ − temp0_32_4 + temp0_32_4 ≤ 0 ∧ temp0_32_4 − temp0_32_4 ≤ 0 ∧ − temp0_32_3 + temp0_32_3 ≤ 0 ∧ temp0_32_3 − temp0_32_3 ≤ 0 ∧ − temp0_32_2 + temp0_32_2 ≤ 0 ∧ temp0_32_2 − temp0_32_2 ≤ 0 ∧ − temp0_32_1 + temp0_32_1 ≤ 0 ∧ temp0_32_1 − temp0_32_1 ≤ 0 ∧ − temp0_32_0 + temp0_32_0 ≤ 0 ∧ temp0_32_0 − temp0_32_0 ≤ 0 ∧ − temp0_15_0 + temp0_15_0 ≤ 0 ∧ temp0_15_0 − temp0_15_0 ≤ 0 ∧ − t_23_post + t_23_post ≤ 0 ∧ t_23_post − t_23_post ≤ 0 ∧ − t_23_1 + t_23_1 ≤ 0 ∧ t_23_1 − t_23_1 ≤ 0 ∧ − t_23_0 + t_23_0 ≤ 0 ∧ t_23_0 − t_23_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_post + result_dot_printf_sdv_special_RETURN_VALUE_41_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_post − result_dot_printf_sdv_special_RETURN_VALUE_41_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_1 + result_dot_printf_sdv_special_RETURN_VALUE_41_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_1 − result_dot_printf_sdv_special_RETURN_VALUE_41_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_0 + result_dot_printf_sdv_special_RETURN_VALUE_41_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_0 − result_dot_printf_sdv_special_RETURN_VALUE_41_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_post + result_dot_printf_sdv_special_RETURN_VALUE_38_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_post − result_dot_printf_sdv_special_RETURN_VALUE_38_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_1 + result_dot_printf_sdv_special_RETURN_VALUE_38_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_1 − result_dot_printf_sdv_special_RETURN_VALUE_38_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_0 + result_dot_printf_sdv_special_RETURN_VALUE_38_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_0 − result_dot_printf_sdv_special_RETURN_VALUE_38_0 ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_post + result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_post − result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_1 + result_dot_nondet_sdv_special_RETURN_VALUE_13_1 ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_1 − result_dot_nondet_sdv_special_RETURN_VALUE_13_1 ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_0 + result_dot_nondet_sdv_special_RETURN_VALUE_13_0 ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_0 − result_dot_nondet_sdv_special_RETURN_VALUE_13_0 ≤ 0 ∧ − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post + result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post ≤ 0 ∧ result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post ≤ 0 ∧ − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 + result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 ≤ 0 ∧ result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 ≤ 0 ∧ − result_11_post + result_11_post ≤ 0 ∧ result_11_post − result_11_post ≤ 0 ∧ − result_11_6 + result_11_6 ≤ 0 ∧ result_11_6 − result_11_6 ≤ 0 ∧ − result_11_5 + result_11_5 ≤ 0 ∧ result_11_5 − result_11_5 ≤ 0 ∧ − result_11_4 + result_11_4 ≤ 0 ∧ result_11_4 − result_11_4 ≤ 0 ∧ − result_11_3 + result_11_3 ≤ 0 ∧ result_11_3 − result_11_3 ≤ 0 ∧ − result_11_2 + result_11_2 ≤ 0 ∧ result_11_2 − result_11_2 ≤ 0 ∧ − result_11_1 + result_11_1 ≤ 0 ∧ result_11_1 − result_11_1 ≤ 0 ∧ − result_11_0 + result_11_0 ≤ 0 ∧ result_11_0 − result_11_0 ≤ 0 ∧ − rcd_72_post + rcd_72_post ≤ 0 ∧ rcd_72_post − rcd_72_post ≤ 0 ∧ − rcd_72_0 + rcd_72_0 ≤ 0 ∧ rcd_72_0 − rcd_72_0 ≤ 0 ∧ − rcd_102_post + rcd_102_post ≤ 0 ∧ rcd_102_post − rcd_102_post ≤ 0 ∧ − rcd_102_0 + rcd_102_0 ≤ 0 ∧ rcd_102_0 − rcd_102_0 ≤ 0 ∧ − r_53_post + r_53_post ≤ 0 ∧ r_53_post − r_53_post ≤ 0 ∧ − r_53_0 + r_53_0 ≤ 0 ∧ r_53_0 − r_53_0 ≤ 0 ∧ − r_161_post + r_161_post ≤ 0 ∧ r_161_post − r_161_post ≤ 0 ∧ − r_161_0 + r_161_0 ≤ 0 ∧ r_161_0 − r_161_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 ≤ 0 ∧ − nondet_12_post + nondet_12_post ≤ 0 ∧ nondet_12_post − nondet_12_post ≤ 0 ∧ − nondet_12_1 + nondet_12_1 ≤ 0 ∧ nondet_12_1 − nondet_12_1 ≤ 0 ∧ − nondet_12_0 + nondet_12_0 ≤ 0 ∧ nondet_12_0 − nondet_12_0 ≤ 0 ∧ − lt_37_post + lt_37_post ≤ 0 ∧ lt_37_post − lt_37_post ≤ 0 ∧ − lt_37_1 + lt_37_1 ≤ 0 ∧ lt_37_1 − lt_37_1 ≤ 0 ∧ − lt_37_0 + lt_37_0 ≤ 0 ∧ lt_37_0 − lt_37_0 ≤ 0 ∧ − lt_36_post + lt_36_post ≤ 0 ∧ lt_36_post − lt_36_post ≤ 0 ∧ − lt_36_0 + lt_36_0 ≤ 0 ∧ lt_36_0 − lt_36_0 ≤ 0 ∧ − lt_237_post + lt_237_post ≤ 0 ∧ lt_237_post − lt_237_post ≤ 0 ∧ − lt_237_0 + lt_237_0 ≤ 0 ∧ lt_237_0 − lt_237_0 ≤ 0 ∧ − length_43_post + length_43_post ≤ 0 ∧ length_43_post − length_43_post ≤ 0 ∧ − length_43_0 + length_43_0 ≤ 0 ∧ length_43_0 − length_43_0 ≤ 0 ∧ − len_246_post + len_246_post ≤ 0 ∧ len_246_post − len_246_post ≤ 0 ∧ − len_246_0 + len_246_0 ≤ 0 ∧ len_246_0 − len_246_0 ≤ 0 ∧ − len_180_post + len_180_post ≤ 0 ∧ len_180_post − len_180_post ≤ 0 ∧ − len_180_0 + len_180_0 ≤ 0 ∧ len_180_0 − len_180_0 ≤ 0 ∧ − i_44_post + i_44_post ≤ 0 ∧ i_44_post − i_44_post ≤ 0 ∧ − i_44_0 + i_44_0 ≤ 0 ∧ i_44_0 − i_44_0 ≤ 0 ∧ − i_125_post + i_125_post ≤ 0 ∧ i_125_post − i_125_post ≤ 0 ∧ − i_125_0 + i_125_0 ≤ 0 ∧ i_125_0 − i_125_0 ≤ 0 ∧ − i_108_post + i_108_post ≤ 0 ∧ i_108_post − i_108_post ≤ 0 ∧ − i_108_0 + i_108_0 ≤ 0 ∧ i_108_0 − i_108_0 ≤ 0 ∧ − head_46_post + head_46_post ≤ 0 ∧ head_46_post − head_46_post ≤ 0 ∧ − head_46_0 + head_46_0 ≤ 0 ∧ head_46_0 − head_46_0 ≤ 0 ∧ − fmt_31_post + fmt_31_post ≤ 0 ∧ fmt_31_post − fmt_31_post ≤ 0 ∧ − fmt_31_4 + fmt_31_4 ≤ 0 ∧ fmt_31_4 − fmt_31_4 ≤ 0 ∧ − fmt_31_3 + fmt_31_3 ≤ 0 ∧ fmt_31_3 − fmt_31_3 ≤ 0 ∧ − fmt_31_2 + fmt_31_2 ≤ 0 ∧ fmt_31_2 − fmt_31_2 ≤ 0 ∧ − fmt_31_1 + fmt_31_1 ≤ 0 ∧ fmt_31_1 − fmt_31_1 ≤ 0 ∧ − fmt_31_0 + fmt_31_0 ≤ 0 ∧ fmt_31_0 − fmt_31_0 ≤ 0 ∧ − ct_17_post + ct_17_post ≤ 0 ∧ ct_17_post − ct_17_post ≤ 0 ∧ − ct_17_2 + ct_17_2 ≤ 0 ∧ ct_17_2 − ct_17_2 ≤ 0 ∧ − ct_17_1 + ct_17_1 ≤ 0 ∧ ct_17_1 − ct_17_1 ≤ 0 ∧ − ct_17_0 + ct_17_0 ≤ 0 ∧ ct_17_0 − ct_17_0 ≤ 0 ∧ − a_328_post + a_328_post ≤ 0 ∧ a_328_post − a_328_post ≤ 0 ∧ − a_328_0 + a_328_0 ≤ 0 ∧ a_328_0 − a_328_0 ≤ 0 ∧ − a_305_post + a_305_post ≤ 0 ∧ a_305_post − a_305_post ≤ 0 ∧ − a_305_0 + a_305_0 ≤ 0 ∧ a_305_0 − a_305_0 ≤ 0 ∧ − a_283_post + a_283_post ≤ 0 ∧ a_283_post − a_283_post ≤ 0 ∧ − a_283_0 + a_283_0 ≤ 0 ∧ a_283_0 − a_283_0 ≤ 0 ∧ − a_26_post + a_26_post ≤ 0 ∧ a_26_post − a_26_post ≤ 0 ∧ − a_26_1 + a_26_1 ≤ 0 ∧ a_26_1 − a_26_1 ≤ 0 ∧ − a_26_0 + a_26_0 ≤ 0 ∧ a_26_0 − a_26_0 ≤ 0 ∧ − a_247_post + a_247_post ≤ 0 ∧ a_247_post − a_247_post ≤ 0 ∧ − a_247_0 + a_247_0 ≤ 0 ∧ a_247_0 − a_247_0 ≤ 0 ∧ − a_197_post + a_197_post ≤ 0 ∧ a_197_post − a_197_post ≤ 0 ∧ − a_197_0 + a_197_0 ≤ 0 ∧ a_197_0 − a_197_0 ≤ 0 ∧ − a_146_0 + a_146_0 ≤ 0 ∧ a_146_0 − a_146_0 ≤ 0 | |
| 54 | 84 | 55: | 1 + x_177_0 ≤ 0 ∧ − y_19_post + y_19_post ≤ 0 ∧ y_19_post − y_19_post ≤ 0 ∧ − y_19_2 + y_19_2 ≤ 0 ∧ y_19_2 − y_19_2 ≤ 0 ∧ − y_19_1 + y_19_1 ≤ 0 ∧ y_19_1 − y_19_1 ≤ 0 ∧ − y_19_0 + y_19_0 ≤ 0 ∧ y_19_0 − y_19_0 ≤ 0 ∧ − x_SLAM_f_18_post + x_SLAM_f_18_post ≤ 0 ∧ x_SLAM_f_18_post − x_SLAM_f_18_post ≤ 0 ∧ − x_SLAM_f_18_2 + x_SLAM_f_18_2 ≤ 0 ∧ x_SLAM_f_18_2 − x_SLAM_f_18_2 ≤ 0 ∧ − x_SLAM_f_18_1 + x_SLAM_f_18_1 ≤ 0 ∧ x_SLAM_f_18_1 − x_SLAM_f_18_1 ≤ 0 ∧ − x_SLAM_f_18_0 + x_SLAM_f_18_0 ≤ 0 ∧ x_SLAM_f_18_0 − x_SLAM_f_18_0 ≤ 0 ∧ − x_34_post + x_34_post ≤ 0 ∧ x_34_post − x_34_post ≤ 0 ∧ − x_34_1 + x_34_1 ≤ 0 ∧ x_34_1 − x_34_1 ≤ 0 ∧ − x_34_0 + x_34_0 ≤ 0 ∧ x_34_0 − x_34_0 ≤ 0 ∧ − x_28_post + x_28_post ≤ 0 ∧ x_28_post − x_28_post ≤ 0 ∧ − x_28_1 + x_28_1 ≤ 0 ∧ x_28_1 − x_28_1 ≤ 0 ∧ − x_28_0 + x_28_0 ≤ 0 ∧ x_28_0 − x_28_0 ≤ 0 ∧ − x_238_post + x_238_post ≤ 0 ∧ x_238_post − x_238_post ≤ 0 ∧ − x_238_0 + x_238_0 ≤ 0 ∧ x_238_0 − x_238_0 ≤ 0 ∧ − x_20_post + x_20_post ≤ 0 ∧ x_20_post − x_20_post ≤ 0 ∧ − x_20_2 + x_20_2 ≤ 0 ∧ x_20_2 − x_20_2 ≤ 0 ∧ − x_20_1 + x_20_1 ≤ 0 ∧ x_20_1 − x_20_1 ≤ 0 ∧ − x_20_0 + x_20_0 ≤ 0 ∧ x_20_0 − x_20_0 ≤ 0 ∧ − x_177_post + x_177_post ≤ 0 ∧ x_177_post − x_177_post ≤ 0 ∧ − x_177_0 + x_177_0 ≤ 0 ∧ x_177_0 − x_177_0 ≤ 0 ∧ − x_16_post + x_16_post ≤ 0 ∧ x_16_post − x_16_post ≤ 0 ∧ − x_16_1 + x_16_1 ≤ 0 ∧ x_16_1 − x_16_1 ≤ 0 ∧ − x_16_0 + x_16_0 ≤ 0 ∧ x_16_0 − x_16_0 ≤ 0 ∧ − x_14_post + x_14_post ≤ 0 ∧ x_14_post − x_14_post ≤ 0 ∧ − x_14_0 + x_14_0 ≤ 0 ∧ x_14_0 − x_14_0 ≤ 0 ∧ − tmp_48_post + tmp_48_post ≤ 0 ∧ tmp_48_post − tmp_48_post ≤ 0 ∧ − tmp_48_0 + tmp_48_0 ≤ 0 ∧ tmp_48_0 − tmp_48_0 ≤ 0 ∧ − temp_49_post + temp_49_post ≤ 0 ∧ temp_49_post − temp_49_post ≤ 0 ∧ − temp_49_0 + temp_49_0 ≤ 0 ∧ temp_49_0 − temp_49_0 ≤ 0 ∧ − temp0_45_post + temp0_45_post ≤ 0 ∧ temp0_45_post − temp0_45_post ≤ 0 ∧ − temp0_45_1 + temp0_45_1 ≤ 0 ∧ temp0_45_1 − temp0_45_1 ≤ 0 ∧ − temp0_45_0 + temp0_45_0 ≤ 0 ∧ temp0_45_0 − temp0_45_0 ≤ 0 ∧ − temp0_32_post + temp0_32_post ≤ 0 ∧ temp0_32_post − temp0_32_post ≤ 0 ∧ − temp0_32_4 + temp0_32_4 ≤ 0 ∧ temp0_32_4 − temp0_32_4 ≤ 0 ∧ − temp0_32_3 + temp0_32_3 ≤ 0 ∧ temp0_32_3 − temp0_32_3 ≤ 0 ∧ − temp0_32_2 + temp0_32_2 ≤ 0 ∧ temp0_32_2 − temp0_32_2 ≤ 0 ∧ − temp0_32_1 + temp0_32_1 ≤ 0 ∧ temp0_32_1 − temp0_32_1 ≤ 0 ∧ − temp0_32_0 + temp0_32_0 ≤ 0 ∧ temp0_32_0 − temp0_32_0 ≤ 0 ∧ − temp0_15_0 + temp0_15_0 ≤ 0 ∧ temp0_15_0 − temp0_15_0 ≤ 0 ∧ − t_23_post + t_23_post ≤ 0 ∧ t_23_post − t_23_post ≤ 0 ∧ − t_23_1 + t_23_1 ≤ 0 ∧ t_23_1 − t_23_1 ≤ 0 ∧ − t_23_0 + t_23_0 ≤ 0 ∧ t_23_0 − t_23_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_post + result_dot_printf_sdv_special_RETURN_VALUE_41_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_post − result_dot_printf_sdv_special_RETURN_VALUE_41_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_1 + result_dot_printf_sdv_special_RETURN_VALUE_41_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_1 − result_dot_printf_sdv_special_RETURN_VALUE_41_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_0 + result_dot_printf_sdv_special_RETURN_VALUE_41_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_0 − result_dot_printf_sdv_special_RETURN_VALUE_41_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_post + result_dot_printf_sdv_special_RETURN_VALUE_38_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_post − result_dot_printf_sdv_special_RETURN_VALUE_38_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_1 + result_dot_printf_sdv_special_RETURN_VALUE_38_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_1 − result_dot_printf_sdv_special_RETURN_VALUE_38_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_0 + result_dot_printf_sdv_special_RETURN_VALUE_38_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_0 − result_dot_printf_sdv_special_RETURN_VALUE_38_0 ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_post + result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_post − result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_1 + result_dot_nondet_sdv_special_RETURN_VALUE_13_1 ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_1 − result_dot_nondet_sdv_special_RETURN_VALUE_13_1 ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_0 + result_dot_nondet_sdv_special_RETURN_VALUE_13_0 ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_0 − result_dot_nondet_sdv_special_RETURN_VALUE_13_0 ≤ 0 ∧ − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post + result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post ≤ 0 ∧ result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post ≤ 0 ∧ − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 + result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 ≤ 0 ∧ result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 ≤ 0 ∧ − result_11_post + result_11_post ≤ 0 ∧ result_11_post − result_11_post ≤ 0 ∧ − result_11_6 + result_11_6 ≤ 0 ∧ result_11_6 − result_11_6 ≤ 0 ∧ − result_11_5 + result_11_5 ≤ 0 ∧ result_11_5 − result_11_5 ≤ 0 ∧ − result_11_4 + result_11_4 ≤ 0 ∧ result_11_4 − result_11_4 ≤ 0 ∧ − result_11_3 + result_11_3 ≤ 0 ∧ result_11_3 − result_11_3 ≤ 0 ∧ − result_11_2 + result_11_2 ≤ 0 ∧ result_11_2 − result_11_2 ≤ 0 ∧ − result_11_1 + result_11_1 ≤ 0 ∧ result_11_1 − result_11_1 ≤ 0 ∧ − result_11_0 + result_11_0 ≤ 0 ∧ result_11_0 − result_11_0 ≤ 0 ∧ − rcd_72_post + rcd_72_post ≤ 0 ∧ rcd_72_post − rcd_72_post ≤ 0 ∧ − rcd_72_0 + rcd_72_0 ≤ 0 ∧ rcd_72_0 − rcd_72_0 ≤ 0 ∧ − rcd_102_post + rcd_102_post ≤ 0 ∧ rcd_102_post − rcd_102_post ≤ 0 ∧ − rcd_102_0 + rcd_102_0 ≤ 0 ∧ rcd_102_0 − rcd_102_0 ≤ 0 ∧ − r_53_post + r_53_post ≤ 0 ∧ r_53_post − r_53_post ≤ 0 ∧ − r_53_0 + r_53_0 ≤ 0 ∧ r_53_0 − r_53_0 ≤ 0 ∧ − r_161_post + r_161_post ≤ 0 ∧ r_161_post − r_161_post ≤ 0 ∧ − r_161_0 + r_161_0 ≤ 0 ∧ r_161_0 − r_161_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 ≤ 0 ∧ − nondet_12_post + nondet_12_post ≤ 0 ∧ nondet_12_post − nondet_12_post ≤ 0 ∧ − nondet_12_1 + nondet_12_1 ≤ 0 ∧ nondet_12_1 − nondet_12_1 ≤ 0 ∧ − nondet_12_0 + nondet_12_0 ≤ 0 ∧ nondet_12_0 − nondet_12_0 ≤ 0 ∧ − lt_37_post + lt_37_post ≤ 0 ∧ lt_37_post − lt_37_post ≤ 0 ∧ − lt_37_1 + lt_37_1 ≤ 0 ∧ lt_37_1 − lt_37_1 ≤ 0 ∧ − lt_37_0 + lt_37_0 ≤ 0 ∧ lt_37_0 − lt_37_0 ≤ 0 ∧ − lt_36_post + lt_36_post ≤ 0 ∧ lt_36_post − lt_36_post ≤ 0 ∧ − lt_36_0 + lt_36_0 ≤ 0 ∧ lt_36_0 − lt_36_0 ≤ 0 ∧ − lt_237_post + lt_237_post ≤ 0 ∧ lt_237_post − lt_237_post ≤ 0 ∧ − lt_237_0 + lt_237_0 ≤ 0 ∧ lt_237_0 − lt_237_0 ≤ 0 ∧ − length_43_post + length_43_post ≤ 0 ∧ length_43_post − length_43_post ≤ 0 ∧ − length_43_0 + length_43_0 ≤ 0 ∧ length_43_0 − length_43_0 ≤ 0 ∧ − len_246_post + len_246_post ≤ 0 ∧ len_246_post − len_246_post ≤ 0 ∧ − len_246_0 + len_246_0 ≤ 0 ∧ len_246_0 − len_246_0 ≤ 0 ∧ − len_180_post + len_180_post ≤ 0 ∧ len_180_post − len_180_post ≤ 0 ∧ − len_180_0 + len_180_0 ≤ 0 ∧ len_180_0 − len_180_0 ≤ 0 ∧ − i_44_post + i_44_post ≤ 0 ∧ i_44_post − i_44_post ≤ 0 ∧ − i_44_0 + i_44_0 ≤ 0 ∧ i_44_0 − i_44_0 ≤ 0 ∧ − i_125_post + i_125_post ≤ 0 ∧ i_125_post − i_125_post ≤ 0 ∧ − i_125_0 + i_125_0 ≤ 0 ∧ i_125_0 − i_125_0 ≤ 0 ∧ − i_108_post + i_108_post ≤ 0 ∧ i_108_post − i_108_post ≤ 0 ∧ − i_108_0 + i_108_0 ≤ 0 ∧ i_108_0 − i_108_0 ≤ 0 ∧ − head_46_post + head_46_post ≤ 0 ∧ head_46_post − head_46_post ≤ 0 ∧ − head_46_0 + head_46_0 ≤ 0 ∧ head_46_0 − head_46_0 ≤ 0 ∧ − fmt_31_post + fmt_31_post ≤ 0 ∧ fmt_31_post − fmt_31_post ≤ 0 ∧ − fmt_31_4 + fmt_31_4 ≤ 0 ∧ fmt_31_4 − fmt_31_4 ≤ 0 ∧ − fmt_31_3 + fmt_31_3 ≤ 0 ∧ fmt_31_3 − fmt_31_3 ≤ 0 ∧ − fmt_31_2 + fmt_31_2 ≤ 0 ∧ fmt_31_2 − fmt_31_2 ≤ 0 ∧ − fmt_31_1 + fmt_31_1 ≤ 0 ∧ fmt_31_1 − fmt_31_1 ≤ 0 ∧ − fmt_31_0 + fmt_31_0 ≤ 0 ∧ fmt_31_0 − fmt_31_0 ≤ 0 ∧ − ct_17_post + ct_17_post ≤ 0 ∧ ct_17_post − ct_17_post ≤ 0 ∧ − ct_17_2 + ct_17_2 ≤ 0 ∧ ct_17_2 − ct_17_2 ≤ 0 ∧ − ct_17_1 + ct_17_1 ≤ 0 ∧ ct_17_1 − ct_17_1 ≤ 0 ∧ − ct_17_0 + ct_17_0 ≤ 0 ∧ ct_17_0 − ct_17_0 ≤ 0 ∧ − a_328_post + a_328_post ≤ 0 ∧ a_328_post − a_328_post ≤ 0 ∧ − a_328_0 + a_328_0 ≤ 0 ∧ a_328_0 − a_328_0 ≤ 0 ∧ − a_305_post + a_305_post ≤ 0 ∧ a_305_post − a_305_post ≤ 0 ∧ − a_305_0 + a_305_0 ≤ 0 ∧ a_305_0 − a_305_0 ≤ 0 ∧ − a_283_post + a_283_post ≤ 0 ∧ a_283_post − a_283_post ≤ 0 ∧ − a_283_0 + a_283_0 ≤ 0 ∧ a_283_0 − a_283_0 ≤ 0 ∧ − a_26_post + a_26_post ≤ 0 ∧ a_26_post − a_26_post ≤ 0 ∧ − a_26_1 + a_26_1 ≤ 0 ∧ a_26_1 − a_26_1 ≤ 0 ∧ − a_26_0 + a_26_0 ≤ 0 ∧ a_26_0 − a_26_0 ≤ 0 ∧ − a_247_post + a_247_post ≤ 0 ∧ a_247_post − a_247_post ≤ 0 ∧ − a_247_0 + a_247_0 ≤ 0 ∧ a_247_0 − a_247_0 ≤ 0 ∧ − a_197_post + a_197_post ≤ 0 ∧ a_197_post − a_197_post ≤ 0 ∧ − a_197_0 + a_197_0 ≤ 0 ∧ a_197_0 − a_197_0 ≤ 0 ∧ − a_146_0 + a_146_0 ≤ 0 ∧ a_146_0 − a_146_0 ≤ 0 | |
| 55 | 85 | 40: | 1 − result_dot_nondet_sdv_special_RETURN_VALUE_13_0 ≤ 0 ∧ 2 − result_dot_nondet_sdv_special_RETURN_VALUE_13_0 ≤ 0 ∧ − y_19_post + y_19_post ≤ 0 ∧ y_19_post − y_19_post ≤ 0 ∧ − y_19_2 + y_19_2 ≤ 0 ∧ y_19_2 − y_19_2 ≤ 0 ∧ − y_19_1 + y_19_1 ≤ 0 ∧ y_19_1 − y_19_1 ≤ 0 ∧ − y_19_0 + y_19_0 ≤ 0 ∧ y_19_0 − y_19_0 ≤ 0 ∧ − x_SLAM_f_18_post + x_SLAM_f_18_post ≤ 0 ∧ x_SLAM_f_18_post − x_SLAM_f_18_post ≤ 0 ∧ − x_SLAM_f_18_2 + x_SLAM_f_18_2 ≤ 0 ∧ x_SLAM_f_18_2 − x_SLAM_f_18_2 ≤ 0 ∧ − x_SLAM_f_18_1 + x_SLAM_f_18_1 ≤ 0 ∧ x_SLAM_f_18_1 − x_SLAM_f_18_1 ≤ 0 ∧ − x_SLAM_f_18_0 + x_SLAM_f_18_0 ≤ 0 ∧ x_SLAM_f_18_0 − x_SLAM_f_18_0 ≤ 0 ∧ − x_34_post + x_34_post ≤ 0 ∧ x_34_post − x_34_post ≤ 0 ∧ − x_34_1 + x_34_1 ≤ 0 ∧ x_34_1 − x_34_1 ≤ 0 ∧ − x_34_0 + x_34_0 ≤ 0 ∧ x_34_0 − x_34_0 ≤ 0 ∧ − x_28_post + x_28_post ≤ 0 ∧ x_28_post − x_28_post ≤ 0 ∧ − x_28_1 + x_28_1 ≤ 0 ∧ x_28_1 − x_28_1 ≤ 0 ∧ − x_28_0 + x_28_0 ≤ 0 ∧ x_28_0 − x_28_0 ≤ 0 ∧ − x_238_post + x_238_post ≤ 0 ∧ x_238_post − x_238_post ≤ 0 ∧ − x_238_0 + x_238_0 ≤ 0 ∧ x_238_0 − x_238_0 ≤ 0 ∧ − x_20_post + x_20_post ≤ 0 ∧ x_20_post − x_20_post ≤ 0 ∧ − x_20_2 + x_20_2 ≤ 0 ∧ x_20_2 − x_20_2 ≤ 0 ∧ − x_20_1 + x_20_1 ≤ 0 ∧ x_20_1 − x_20_1 ≤ 0 ∧ − x_20_0 + x_20_0 ≤ 0 ∧ x_20_0 − x_20_0 ≤ 0 ∧ − x_177_post + x_177_post ≤ 0 ∧ x_177_post − x_177_post ≤ 0 ∧ − x_177_0 + x_177_0 ≤ 0 ∧ x_177_0 − x_177_0 ≤ 0 ∧ − x_16_post + x_16_post ≤ 0 ∧ x_16_post − x_16_post ≤ 0 ∧ − x_16_1 + x_16_1 ≤ 0 ∧ x_16_1 − x_16_1 ≤ 0 ∧ − x_16_0 + x_16_0 ≤ 0 ∧ x_16_0 − x_16_0 ≤ 0 ∧ − x_14_post + x_14_post ≤ 0 ∧ x_14_post − x_14_post ≤ 0 ∧ − x_14_0 + x_14_0 ≤ 0 ∧ x_14_0 − x_14_0 ≤ 0 ∧ − tmp_48_post + tmp_48_post ≤ 0 ∧ tmp_48_post − tmp_48_post ≤ 0 ∧ − tmp_48_0 + tmp_48_0 ≤ 0 ∧ tmp_48_0 − tmp_48_0 ≤ 0 ∧ − temp_49_post + temp_49_post ≤ 0 ∧ temp_49_post − temp_49_post ≤ 0 ∧ − temp_49_0 + temp_49_0 ≤ 0 ∧ temp_49_0 − temp_49_0 ≤ 0 ∧ − temp0_45_post + temp0_45_post ≤ 0 ∧ temp0_45_post − temp0_45_post ≤ 0 ∧ − temp0_45_1 + temp0_45_1 ≤ 0 ∧ temp0_45_1 − temp0_45_1 ≤ 0 ∧ − temp0_45_0 + temp0_45_0 ≤ 0 ∧ temp0_45_0 − temp0_45_0 ≤ 0 ∧ − temp0_32_post + temp0_32_post ≤ 0 ∧ temp0_32_post − temp0_32_post ≤ 0 ∧ − temp0_32_4 + temp0_32_4 ≤ 0 ∧ temp0_32_4 − temp0_32_4 ≤ 0 ∧ − temp0_32_3 + temp0_32_3 ≤ 0 ∧ temp0_32_3 − temp0_32_3 ≤ 0 ∧ − temp0_32_2 + temp0_32_2 ≤ 0 ∧ temp0_32_2 − temp0_32_2 ≤ 0 ∧ − temp0_32_1 + temp0_32_1 ≤ 0 ∧ temp0_32_1 − temp0_32_1 ≤ 0 ∧ − temp0_32_0 + temp0_32_0 ≤ 0 ∧ temp0_32_0 − temp0_32_0 ≤ 0 ∧ − temp0_15_0 + temp0_15_0 ≤ 0 ∧ temp0_15_0 − temp0_15_0 ≤ 0 ∧ − t_23_post + t_23_post ≤ 0 ∧ t_23_post − t_23_post ≤ 0 ∧ − t_23_1 + t_23_1 ≤ 0 ∧ t_23_1 − t_23_1 ≤ 0 ∧ − t_23_0 + t_23_0 ≤ 0 ∧ t_23_0 − t_23_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_post + result_dot_printf_sdv_special_RETURN_VALUE_41_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_post − result_dot_printf_sdv_special_RETURN_VALUE_41_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_1 + result_dot_printf_sdv_special_RETURN_VALUE_41_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_1 − result_dot_printf_sdv_special_RETURN_VALUE_41_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_0 + result_dot_printf_sdv_special_RETURN_VALUE_41_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_0 − result_dot_printf_sdv_special_RETURN_VALUE_41_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_post + result_dot_printf_sdv_special_RETURN_VALUE_38_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_post − result_dot_printf_sdv_special_RETURN_VALUE_38_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_1 + result_dot_printf_sdv_special_RETURN_VALUE_38_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_1 − result_dot_printf_sdv_special_RETURN_VALUE_38_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_0 + result_dot_printf_sdv_special_RETURN_VALUE_38_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_0 − result_dot_printf_sdv_special_RETURN_VALUE_38_0 ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_post + result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_post − result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_1 + result_dot_nondet_sdv_special_RETURN_VALUE_13_1 ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_1 − result_dot_nondet_sdv_special_RETURN_VALUE_13_1 ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_0 + result_dot_nondet_sdv_special_RETURN_VALUE_13_0 ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_0 − result_dot_nondet_sdv_special_RETURN_VALUE_13_0 ≤ 0 ∧ − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post + result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post ≤ 0 ∧ result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post ≤ 0 ∧ − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 + result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 ≤ 0 ∧ result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 ≤ 0 ∧ − result_11_post + result_11_post ≤ 0 ∧ result_11_post − result_11_post ≤ 0 ∧ − result_11_6 + result_11_6 ≤ 0 ∧ result_11_6 − result_11_6 ≤ 0 ∧ − result_11_5 + result_11_5 ≤ 0 ∧ result_11_5 − result_11_5 ≤ 0 ∧ − result_11_4 + result_11_4 ≤ 0 ∧ result_11_4 − result_11_4 ≤ 0 ∧ − result_11_3 + result_11_3 ≤ 0 ∧ result_11_3 − result_11_3 ≤ 0 ∧ − result_11_2 + result_11_2 ≤ 0 ∧ result_11_2 − result_11_2 ≤ 0 ∧ − result_11_1 + result_11_1 ≤ 0 ∧ result_11_1 − result_11_1 ≤ 0 ∧ − result_11_0 + result_11_0 ≤ 0 ∧ result_11_0 − result_11_0 ≤ 0 ∧ − rcd_72_post + rcd_72_post ≤ 0 ∧ rcd_72_post − rcd_72_post ≤ 0 ∧ − rcd_72_0 + rcd_72_0 ≤ 0 ∧ rcd_72_0 − rcd_72_0 ≤ 0 ∧ − rcd_102_post + rcd_102_post ≤ 0 ∧ rcd_102_post − rcd_102_post ≤ 0 ∧ − rcd_102_0 + rcd_102_0 ≤ 0 ∧ rcd_102_0 − rcd_102_0 ≤ 0 ∧ − r_53_post + r_53_post ≤ 0 ∧ r_53_post − r_53_post ≤ 0 ∧ − r_53_0 + r_53_0 ≤ 0 ∧ r_53_0 − r_53_0 ≤ 0 ∧ − r_161_post + r_161_post ≤ 0 ∧ r_161_post − r_161_post ≤ 0 ∧ − r_161_0 + r_161_0 ≤ 0 ∧ r_161_0 − r_161_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 ≤ 0 ∧ − nondet_12_post + nondet_12_post ≤ 0 ∧ nondet_12_post − nondet_12_post ≤ 0 ∧ − nondet_12_1 + nondet_12_1 ≤ 0 ∧ nondet_12_1 − nondet_12_1 ≤ 0 ∧ − nondet_12_0 + nondet_12_0 ≤ 0 ∧ nondet_12_0 − nondet_12_0 ≤ 0 ∧ − lt_37_post + lt_37_post ≤ 0 ∧ lt_37_post − lt_37_post ≤ 0 ∧ − lt_37_1 + lt_37_1 ≤ 0 ∧ lt_37_1 − lt_37_1 ≤ 0 ∧ − lt_37_0 + lt_37_0 ≤ 0 ∧ lt_37_0 − lt_37_0 ≤ 0 ∧ − lt_36_post + lt_36_post ≤ 0 ∧ lt_36_post − lt_36_post ≤ 0 ∧ − lt_36_0 + lt_36_0 ≤ 0 ∧ lt_36_0 − lt_36_0 ≤ 0 ∧ − lt_237_post + lt_237_post ≤ 0 ∧ lt_237_post − lt_237_post ≤ 0 ∧ − lt_237_0 + lt_237_0 ≤ 0 ∧ lt_237_0 − lt_237_0 ≤ 0 ∧ − length_43_post + length_43_post ≤ 0 ∧ length_43_post − length_43_post ≤ 0 ∧ − length_43_0 + length_43_0 ≤ 0 ∧ length_43_0 − length_43_0 ≤ 0 ∧ − len_246_post + len_246_post ≤ 0 ∧ len_246_post − len_246_post ≤ 0 ∧ − len_246_0 + len_246_0 ≤ 0 ∧ len_246_0 − len_246_0 ≤ 0 ∧ − len_180_post + len_180_post ≤ 0 ∧ len_180_post − len_180_post ≤ 0 ∧ − len_180_0 + len_180_0 ≤ 0 ∧ len_180_0 − len_180_0 ≤ 0 ∧ − i_44_post + i_44_post ≤ 0 ∧ i_44_post − i_44_post ≤ 0 ∧ − i_44_0 + i_44_0 ≤ 0 ∧ i_44_0 − i_44_0 ≤ 0 ∧ − i_125_post + i_125_post ≤ 0 ∧ i_125_post − i_125_post ≤ 0 ∧ − i_125_0 + i_125_0 ≤ 0 ∧ i_125_0 − i_125_0 ≤ 0 ∧ − i_108_post + i_108_post ≤ 0 ∧ i_108_post − i_108_post ≤ 0 ∧ − i_108_0 + i_108_0 ≤ 0 ∧ i_108_0 − i_108_0 ≤ 0 ∧ − head_46_post + head_46_post ≤ 0 ∧ head_46_post − head_46_post ≤ 0 ∧ − head_46_0 + head_46_0 ≤ 0 ∧ head_46_0 − head_46_0 ≤ 0 ∧ − fmt_31_post + fmt_31_post ≤ 0 ∧ fmt_31_post − fmt_31_post ≤ 0 ∧ − fmt_31_4 + fmt_31_4 ≤ 0 ∧ fmt_31_4 − fmt_31_4 ≤ 0 ∧ − fmt_31_3 + fmt_31_3 ≤ 0 ∧ fmt_31_3 − fmt_31_3 ≤ 0 ∧ − fmt_31_2 + fmt_31_2 ≤ 0 ∧ fmt_31_2 − fmt_31_2 ≤ 0 ∧ − fmt_31_1 + fmt_31_1 ≤ 0 ∧ fmt_31_1 − fmt_31_1 ≤ 0 ∧ − fmt_31_0 + fmt_31_0 ≤ 0 ∧ fmt_31_0 − fmt_31_0 ≤ 0 ∧ − ct_17_post + ct_17_post ≤ 0 ∧ ct_17_post − ct_17_post ≤ 0 ∧ − ct_17_2 + ct_17_2 ≤ 0 ∧ ct_17_2 − ct_17_2 ≤ 0 ∧ − ct_17_1 + ct_17_1 ≤ 0 ∧ ct_17_1 − ct_17_1 ≤ 0 ∧ − ct_17_0 + ct_17_0 ≤ 0 ∧ ct_17_0 − ct_17_0 ≤ 0 ∧ − a_328_post + a_328_post ≤ 0 ∧ a_328_post − a_328_post ≤ 0 ∧ − a_328_0 + a_328_0 ≤ 0 ∧ a_328_0 − a_328_0 ≤ 0 ∧ − a_305_post + a_305_post ≤ 0 ∧ a_305_post − a_305_post ≤ 0 ∧ − a_305_0 + a_305_0 ≤ 0 ∧ a_305_0 − a_305_0 ≤ 0 ∧ − a_283_post + a_283_post ≤ 0 ∧ a_283_post − a_283_post ≤ 0 ∧ − a_283_0 + a_283_0 ≤ 0 ∧ a_283_0 − a_283_0 ≤ 0 ∧ − a_26_post + a_26_post ≤ 0 ∧ a_26_post − a_26_post ≤ 0 ∧ − a_26_1 + a_26_1 ≤ 0 ∧ a_26_1 − a_26_1 ≤ 0 ∧ − a_26_0 + a_26_0 ≤ 0 ∧ a_26_0 − a_26_0 ≤ 0 ∧ − a_247_post + a_247_post ≤ 0 ∧ a_247_post − a_247_post ≤ 0 ∧ − a_247_0 + a_247_0 ≤ 0 ∧ a_247_0 − a_247_0 ≤ 0 ∧ − a_197_post + a_197_post ≤ 0 ∧ a_197_post − a_197_post ≤ 0 ∧ − a_197_0 + a_197_0 ≤ 0 ∧ a_197_0 − a_197_0 ≤ 0 ∧ − a_146_0 + a_146_0 ≤ 0 ∧ a_146_0 − a_146_0 ≤ 0 | |
| 10 | 86 | 3: | 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ − a_305_0 ≤ 0 ∧ − x_20_0 + y_19_0 ≤ 0 ∧ x_20_0 − y_19_0 ≤ 0 ∧ result_11_post − temp0_15_0 ≤ 0 ∧ − result_11_post + temp0_15_0 ≤ 0 ∧ 1 − result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ 2 − result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ ct_17_0 − ct_17_post ≤ 0 ∧ − ct_17_0 + ct_17_post ≤ 0 ∧ result_11_0 − result_11_post ≤ 0 ∧ − result_11_0 + result_11_post ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_0 − result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_0 + result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ t_23_0 − t_23_post ≤ 0 ∧ − t_23_0 + t_23_post ≤ 0 ∧ x_16_0 − x_16_post ≤ 0 ∧ − x_16_0 + x_16_post ≤ 0 ∧ x_20_0 − x_20_post ≤ 0 ∧ − x_20_0 + x_20_post ≤ 0 ∧ x_SLAM_f_18_0 − x_SLAM_f_18_post ≤ 0 ∧ − x_SLAM_f_18_0 + x_SLAM_f_18_post ≤ 0 ∧ y_19_0 − y_19_post ≤ 0 ∧ − y_19_0 + y_19_post ≤ 0 ∧ − y_19_2 + y_19_2 ≤ 0 ∧ y_19_2 − y_19_2 ≤ 0 ∧ − x_SLAM_f_18_2 + x_SLAM_f_18_2 ≤ 0 ∧ x_SLAM_f_18_2 − x_SLAM_f_18_2 ≤ 0 ∧ − x_34_post + x_34_post ≤ 0 ∧ x_34_post − x_34_post ≤ 0 ∧ − x_34_1 + x_34_1 ≤ 0 ∧ x_34_1 − x_34_1 ≤ 0 ∧ − x_34_0 + x_34_0 ≤ 0 ∧ x_34_0 − x_34_0 ≤ 0 ∧ − x_28_post + x_28_post ≤ 0 ∧ x_28_post − x_28_post ≤ 0 ∧ − x_28_1 + x_28_1 ≤ 0 ∧ x_28_1 − x_28_1 ≤ 0 ∧ − x_28_0 + x_28_0 ≤ 0 ∧ x_28_0 − x_28_0 ≤ 0 ∧ − x_238_post + x_238_post ≤ 0 ∧ x_238_post − x_238_post ≤ 0 ∧ − x_238_0 + x_238_0 ≤ 0 ∧ x_238_0 − x_238_0 ≤ 0 ∧ − x_20_2 + x_20_2 ≤ 0 ∧ x_20_2 − x_20_2 ≤ 0 ∧ − x_177_post + x_177_post ≤ 0 ∧ x_177_post − x_177_post ≤ 0 ∧ − x_177_0 + x_177_0 ≤ 0 ∧ x_177_0 − x_177_0 ≤ 0 ∧ − x_16_1 + x_16_1 ≤ 0 ∧ x_16_1 − x_16_1 ≤ 0 ∧ − x_14_post + x_14_post ≤ 0 ∧ x_14_post − x_14_post ≤ 0 ∧ − x_14_0 + x_14_0 ≤ 0 ∧ x_14_0 − x_14_0 ≤ 0 ∧ − tmp_48_post + tmp_48_post ≤ 0 ∧ tmp_48_post − tmp_48_post ≤ 0 ∧ − tmp_48_0 + tmp_48_0 ≤ 0 ∧ tmp_48_0 − tmp_48_0 ≤ 0 ∧ − temp_49_post + temp_49_post ≤ 0 ∧ temp_49_post − temp_49_post ≤ 0 ∧ − temp_49_0 + temp_49_0 ≤ 0 ∧ temp_49_0 − temp_49_0 ≤ 0 ∧ − temp0_45_post + temp0_45_post ≤ 0 ∧ temp0_45_post − temp0_45_post ≤ 0 ∧ − temp0_45_1 + temp0_45_1 ≤ 0 ∧ temp0_45_1 − temp0_45_1 ≤ 0 ∧ − temp0_45_0 + temp0_45_0 ≤ 0 ∧ temp0_45_0 − temp0_45_0 ≤ 0 ∧ − temp0_32_post + temp0_32_post ≤ 0 ∧ temp0_32_post − temp0_32_post ≤ 0 ∧ − temp0_32_4 + temp0_32_4 ≤ 0 ∧ temp0_32_4 − temp0_32_4 ≤ 0 ∧ − temp0_32_3 + temp0_32_3 ≤ 0 ∧ temp0_32_3 − temp0_32_3 ≤ 0 ∧ − temp0_32_2 + temp0_32_2 ≤ 0 ∧ temp0_32_2 − temp0_32_2 ≤ 0 ∧ − temp0_32_1 + temp0_32_1 ≤ 0 ∧ temp0_32_1 − temp0_32_1 ≤ 0 ∧ − temp0_32_0 + temp0_32_0 ≤ 0 ∧ temp0_32_0 − temp0_32_0 ≤ 0 ∧ − temp0_15_0 + temp0_15_0 ≤ 0 ∧ temp0_15_0 − temp0_15_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_post + result_dot_printf_sdv_special_RETURN_VALUE_41_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_post − result_dot_printf_sdv_special_RETURN_VALUE_41_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_1 + result_dot_printf_sdv_special_RETURN_VALUE_41_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_1 − result_dot_printf_sdv_special_RETURN_VALUE_41_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_0 + result_dot_printf_sdv_special_RETURN_VALUE_41_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_0 − result_dot_printf_sdv_special_RETURN_VALUE_41_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_post + result_dot_printf_sdv_special_RETURN_VALUE_38_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_post − result_dot_printf_sdv_special_RETURN_VALUE_38_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_1 + result_dot_printf_sdv_special_RETURN_VALUE_38_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_1 − result_dot_printf_sdv_special_RETURN_VALUE_38_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_0 + result_dot_printf_sdv_special_RETURN_VALUE_38_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_0 − result_dot_printf_sdv_special_RETURN_VALUE_38_0 ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_1 + result_dot_nondet_sdv_special_RETURN_VALUE_13_1 ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_1 − result_dot_nondet_sdv_special_RETURN_VALUE_13_1 ≤ 0 ∧ − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post + result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post ≤ 0 ∧ result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post ≤ 0 ∧ − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 + result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 ≤ 0 ∧ result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 ≤ 0 ∧ − result_11_6 + result_11_6 ≤ 0 ∧ result_11_6 − result_11_6 ≤ 0 ∧ − result_11_5 + result_11_5 ≤ 0 ∧ result_11_5 − result_11_5 ≤ 0 ∧ − result_11_4 + result_11_4 ≤ 0 ∧ result_11_4 − result_11_4 ≤ 0 ∧ − result_11_3 + result_11_3 ≤ 0 ∧ result_11_3 − result_11_3 ≤ 0 ∧ − result_11_2 + result_11_2 ≤ 0 ∧ result_11_2 − result_11_2 ≤ 0 ∧ − result_11_1 + result_11_1 ≤ 0 ∧ result_11_1 − result_11_1 ≤ 0 ∧ − rcd_72_post + rcd_72_post ≤ 0 ∧ rcd_72_post − rcd_72_post ≤ 0 ∧ − rcd_72_0 + rcd_72_0 ≤ 0 ∧ rcd_72_0 − rcd_72_0 ≤ 0 ∧ − rcd_102_post + rcd_102_post ≤ 0 ∧ rcd_102_post − rcd_102_post ≤ 0 ∧ − rcd_102_0 + rcd_102_0 ≤ 0 ∧ rcd_102_0 − rcd_102_0 ≤ 0 ∧ − r_53_post + r_53_post ≤ 0 ∧ r_53_post − r_53_post ≤ 0 ∧ − r_53_0 + r_53_0 ≤ 0 ∧ r_53_0 − r_53_0 ≤ 0 ∧ − r_161_post + r_161_post ≤ 0 ∧ r_161_post − r_161_post ≤ 0 ∧ − r_161_0 + r_161_0 ≤ 0 ∧ r_161_0 − r_161_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 ≤ 0 ∧ − nondet_12_post + nondet_12_post ≤ 0 ∧ nondet_12_post − nondet_12_post ≤ 0 ∧ − nondet_12_1 + nondet_12_1 ≤ 0 ∧ nondet_12_1 − nondet_12_1 ≤ 0 ∧ − nondet_12_0 + nondet_12_0 ≤ 0 ∧ nondet_12_0 − nondet_12_0 ≤ 0 ∧ − lt_37_post + lt_37_post ≤ 0 ∧ lt_37_post − lt_37_post ≤ 0 ∧ − lt_37_1 + lt_37_1 ≤ 0 ∧ lt_37_1 − lt_37_1 ≤ 0 ∧ − lt_37_0 + lt_37_0 ≤ 0 ∧ lt_37_0 − lt_37_0 ≤ 0 ∧ − lt_36_post + lt_36_post ≤ 0 ∧ lt_36_post − lt_36_post ≤ 0 ∧ − lt_36_0 + lt_36_0 ≤ 0 ∧ lt_36_0 − lt_36_0 ≤ 0 ∧ − lt_237_post + lt_237_post ≤ 0 ∧ lt_237_post − lt_237_post ≤ 0 ∧ − lt_237_0 + lt_237_0 ≤ 0 ∧ lt_237_0 − lt_237_0 ≤ 0 ∧ − length_43_post + length_43_post ≤ 0 ∧ length_43_post − length_43_post ≤ 0 ∧ − length_43_0 + length_43_0 ≤ 0 ∧ length_43_0 − length_43_0 ≤ 0 ∧ − len_246_post + len_246_post ≤ 0 ∧ len_246_post − len_246_post ≤ 0 ∧ − len_246_0 + len_246_0 ≤ 0 ∧ len_246_0 − len_246_0 ≤ 0 ∧ − len_180_post + len_180_post ≤ 0 ∧ len_180_post − len_180_post ≤ 0 ∧ − len_180_0 + len_180_0 ≤ 0 ∧ len_180_0 − len_180_0 ≤ 0 ∧ − i_44_post + i_44_post ≤ 0 ∧ i_44_post − i_44_post ≤ 0 ∧ − i_44_0 + i_44_0 ≤ 0 ∧ i_44_0 − i_44_0 ≤ 0 ∧ − i_125_post + i_125_post ≤ 0 ∧ i_125_post − i_125_post ≤ 0 ∧ − i_125_0 + i_125_0 ≤ 0 ∧ i_125_0 − i_125_0 ≤ 0 ∧ − i_108_post + i_108_post ≤ 0 ∧ i_108_post − i_108_post ≤ 0 ∧ − i_108_0 + i_108_0 ≤ 0 ∧ i_108_0 − i_108_0 ≤ 0 ∧ − head_46_post + head_46_post ≤ 0 ∧ head_46_post − head_46_post ≤ 0 ∧ − head_46_0 + head_46_0 ≤ 0 ∧ head_46_0 − head_46_0 ≤ 0 ∧ − fmt_31_post + fmt_31_post ≤ 0 ∧ fmt_31_post − fmt_31_post ≤ 0 ∧ − fmt_31_4 + fmt_31_4 ≤ 0 ∧ fmt_31_4 − fmt_31_4 ≤ 0 ∧ − fmt_31_3 + fmt_31_3 ≤ 0 ∧ fmt_31_3 − fmt_31_3 ≤ 0 ∧ − fmt_31_2 + fmt_31_2 ≤ 0 ∧ fmt_31_2 − fmt_31_2 ≤ 0 ∧ − fmt_31_1 + fmt_31_1 ≤ 0 ∧ fmt_31_1 − fmt_31_1 ≤ 0 ∧ − fmt_31_0 + fmt_31_0 ≤ 0 ∧ fmt_31_0 − fmt_31_0 ≤ 0 ∧ − ct_17_2 + ct_17_2 ≤ 0 ∧ ct_17_2 − ct_17_2 ≤ 0 ∧ − a_328_post + a_328_post ≤ 0 ∧ a_328_post − a_328_post ≤ 0 ∧ − a_328_0 + a_328_0 ≤ 0 ∧ a_328_0 − a_328_0 ≤ 0 ∧ − a_305_post + a_305_post ≤ 0 ∧ a_305_post − a_305_post ≤ 0 ∧ − a_305_0 + a_305_0 ≤ 0 ∧ a_305_0 − a_305_0 ≤ 0 ∧ − a_283_post + a_283_post ≤ 0 ∧ a_283_post − a_283_post ≤ 0 ∧ − a_283_0 + a_283_0 ≤ 0 ∧ a_283_0 − a_283_0 ≤ 0 ∧ − a_26_post + a_26_post ≤ 0 ∧ a_26_post − a_26_post ≤ 0 ∧ − a_26_1 + a_26_1 ≤ 0 ∧ a_26_1 − a_26_1 ≤ 0 ∧ − a_26_0 + a_26_0 ≤ 0 ∧ a_26_0 − a_26_0 ≤ 0 ∧ − a_247_post + a_247_post ≤ 0 ∧ a_247_post − a_247_post ≤ 0 ∧ − a_247_0 + a_247_0 ≤ 0 ∧ a_247_0 − a_247_0 ≤ 0 ∧ − a_197_post + a_197_post ≤ 0 ∧ a_197_post − a_197_post ≤ 0 ∧ − a_197_0 + a_197_0 ≤ 0 ∧ a_197_0 − a_197_0 ≤ 0 ∧ − a_146_0 + a_146_0 ≤ 0 ∧ a_146_0 − a_146_0 ≤ 0 | |
| 10 | 87 | 56: | 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ − a_305_0 ≤ 0 ∧ ct_17_0 − ct_17_post ≤ 0 ∧ − ct_17_0 + ct_17_post ≤ 0 ∧ r_53_0 − r_53_post ≤ 0 ∧ − r_53_0 + r_53_post ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_0 − result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_0 + result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ x_14_0 − x_14_post ≤ 0 ∧ − x_14_0 + x_14_post ≤ 0 ∧ x_16_0 − x_16_post ≤ 0 ∧ − x_16_0 + x_16_post ≤ 0 ∧ x_SLAM_f_18_0 − x_SLAM_f_18_post ≤ 0 ∧ − x_SLAM_f_18_0 + x_SLAM_f_18_post ≤ 0 ∧ − y_19_post + y_19_post ≤ 0 ∧ y_19_post − y_19_post ≤ 0 ∧ − y_19_2 + y_19_2 ≤ 0 ∧ y_19_2 − y_19_2 ≤ 0 ∧ − y_19_1 + y_19_1 ≤ 0 ∧ y_19_1 − y_19_1 ≤ 0 ∧ − y_19_0 + y_19_0 ≤ 0 ∧ y_19_0 − y_19_0 ≤ 0 ∧ − x_SLAM_f_18_2 + x_SLAM_f_18_2 ≤ 0 ∧ x_SLAM_f_18_2 − x_SLAM_f_18_2 ≤ 0 ∧ − x_SLAM_f_18_1 + x_SLAM_f_18_1 ≤ 0 ∧ x_SLAM_f_18_1 − x_SLAM_f_18_1 ≤ 0 ∧ − x_34_post + x_34_post ≤ 0 ∧ x_34_post − x_34_post ≤ 0 ∧ − x_34_1 + x_34_1 ≤ 0 ∧ x_34_1 − x_34_1 ≤ 0 ∧ − x_34_0 + x_34_0 ≤ 0 ∧ x_34_0 − x_34_0 ≤ 0 ∧ − x_28_post + x_28_post ≤ 0 ∧ x_28_post − x_28_post ≤ 0 ∧ − x_28_1 + x_28_1 ≤ 0 ∧ x_28_1 − x_28_1 ≤ 0 ∧ − x_28_0 + x_28_0 ≤ 0 ∧ x_28_0 − x_28_0 ≤ 0 ∧ − x_238_post + x_238_post ≤ 0 ∧ x_238_post − x_238_post ≤ 0 ∧ − x_238_0 + x_238_0 ≤ 0 ∧ x_238_0 − x_238_0 ≤ 0 ∧ − x_20_post + x_20_post ≤ 0 ∧ x_20_post − x_20_post ≤ 0 ∧ − x_20_2 + x_20_2 ≤ 0 ∧ x_20_2 − x_20_2 ≤ 0 ∧ − x_20_1 + x_20_1 ≤ 0 ∧ x_20_1 − x_20_1 ≤ 0 ∧ − x_20_0 + x_20_0 ≤ 0 ∧ x_20_0 − x_20_0 ≤ 0 ∧ − x_177_post + x_177_post ≤ 0 ∧ x_177_post − x_177_post ≤ 0 ∧ − x_177_0 + x_177_0 ≤ 0 ∧ x_177_0 − x_177_0 ≤ 0 ∧ − x_16_1 + x_16_1 ≤ 0 ∧ x_16_1 − x_16_1 ≤ 0 ∧ − tmp_48_post + tmp_48_post ≤ 0 ∧ tmp_48_post − tmp_48_post ≤ 0 ∧ − tmp_48_0 + tmp_48_0 ≤ 0 ∧ tmp_48_0 − tmp_48_0 ≤ 0 ∧ − temp_49_post + temp_49_post ≤ 0 ∧ temp_49_post − temp_49_post ≤ 0 ∧ − temp_49_0 + temp_49_0 ≤ 0 ∧ temp_49_0 − temp_49_0 ≤ 0 ∧ − temp0_45_post + temp0_45_post ≤ 0 ∧ temp0_45_post − temp0_45_post ≤ 0 ∧ − temp0_45_1 + temp0_45_1 ≤ 0 ∧ temp0_45_1 − temp0_45_1 ≤ 0 ∧ − temp0_45_0 + temp0_45_0 ≤ 0 ∧ temp0_45_0 − temp0_45_0 ≤ 0 ∧ − temp0_32_post + temp0_32_post ≤ 0 ∧ temp0_32_post − temp0_32_post ≤ 0 ∧ − temp0_32_4 + temp0_32_4 ≤ 0 ∧ temp0_32_4 − temp0_32_4 ≤ 0 ∧ − temp0_32_3 + temp0_32_3 ≤ 0 ∧ temp0_32_3 − temp0_32_3 ≤ 0 ∧ − temp0_32_2 + temp0_32_2 ≤ 0 ∧ temp0_32_2 − temp0_32_2 ≤ 0 ∧ − temp0_32_1 + temp0_32_1 ≤ 0 ∧ temp0_32_1 − temp0_32_1 ≤ 0 ∧ − temp0_32_0 + temp0_32_0 ≤ 0 ∧ temp0_32_0 − temp0_32_0 ≤ 0 ∧ − temp0_15_0 + temp0_15_0 ≤ 0 ∧ temp0_15_0 − temp0_15_0 ≤ 0 ∧ − t_23_post + t_23_post ≤ 0 ∧ t_23_post − t_23_post ≤ 0 ∧ − t_23_1 + t_23_1 ≤ 0 ∧ t_23_1 − t_23_1 ≤ 0 ∧ − t_23_0 + t_23_0 ≤ 0 ∧ t_23_0 − t_23_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_post + result_dot_printf_sdv_special_RETURN_VALUE_41_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_post − result_dot_printf_sdv_special_RETURN_VALUE_41_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_1 + result_dot_printf_sdv_special_RETURN_VALUE_41_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_1 − result_dot_printf_sdv_special_RETURN_VALUE_41_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_0 + result_dot_printf_sdv_special_RETURN_VALUE_41_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_0 − result_dot_printf_sdv_special_RETURN_VALUE_41_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_post + result_dot_printf_sdv_special_RETURN_VALUE_38_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_post − result_dot_printf_sdv_special_RETURN_VALUE_38_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_1 + result_dot_printf_sdv_special_RETURN_VALUE_38_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_1 − result_dot_printf_sdv_special_RETURN_VALUE_38_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_0 + result_dot_printf_sdv_special_RETURN_VALUE_38_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_0 − result_dot_printf_sdv_special_RETURN_VALUE_38_0 ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_1 + result_dot_nondet_sdv_special_RETURN_VALUE_13_1 ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_1 − result_dot_nondet_sdv_special_RETURN_VALUE_13_1 ≤ 0 ∧ − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post + result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post ≤ 0 ∧ result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post ≤ 0 ∧ − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 + result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 ≤ 0 ∧ result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 ≤ 0 ∧ − result_11_post + result_11_post ≤ 0 ∧ result_11_post − result_11_post ≤ 0 ∧ − result_11_6 + result_11_6 ≤ 0 ∧ result_11_6 − result_11_6 ≤ 0 ∧ − result_11_5 + result_11_5 ≤ 0 ∧ result_11_5 − result_11_5 ≤ 0 ∧ − result_11_4 + result_11_4 ≤ 0 ∧ result_11_4 − result_11_4 ≤ 0 ∧ − result_11_3 + result_11_3 ≤ 0 ∧ result_11_3 − result_11_3 ≤ 0 ∧ − result_11_2 + result_11_2 ≤ 0 ∧ result_11_2 − result_11_2 ≤ 0 ∧ − result_11_1 + result_11_1 ≤ 0 ∧ result_11_1 − result_11_1 ≤ 0 ∧ − result_11_0 + result_11_0 ≤ 0 ∧ result_11_0 − result_11_0 ≤ 0 ∧ − rcd_72_post + rcd_72_post ≤ 0 ∧ rcd_72_post − rcd_72_post ≤ 0 ∧ − rcd_72_0 + rcd_72_0 ≤ 0 ∧ rcd_72_0 − rcd_72_0 ≤ 0 ∧ − rcd_102_post + rcd_102_post ≤ 0 ∧ rcd_102_post − rcd_102_post ≤ 0 ∧ − rcd_102_0 + rcd_102_0 ≤ 0 ∧ rcd_102_0 − rcd_102_0 ≤ 0 ∧ − r_161_post + r_161_post ≤ 0 ∧ r_161_post − r_161_post ≤ 0 ∧ − r_161_0 + r_161_0 ≤ 0 ∧ r_161_0 − r_161_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 ≤ 0 ∧ − nondet_12_post + nondet_12_post ≤ 0 ∧ nondet_12_post − nondet_12_post ≤ 0 ∧ − nondet_12_1 + nondet_12_1 ≤ 0 ∧ nondet_12_1 − nondet_12_1 ≤ 0 ∧ − nondet_12_0 + nondet_12_0 ≤ 0 ∧ nondet_12_0 − nondet_12_0 ≤ 0 ∧ − lt_37_post + lt_37_post ≤ 0 ∧ lt_37_post − lt_37_post ≤ 0 ∧ − lt_37_1 + lt_37_1 ≤ 0 ∧ lt_37_1 − lt_37_1 ≤ 0 ∧ − lt_37_0 + lt_37_0 ≤ 0 ∧ lt_37_0 − lt_37_0 ≤ 0 ∧ − lt_36_post + lt_36_post ≤ 0 ∧ lt_36_post − lt_36_post ≤ 0 ∧ − lt_36_0 + lt_36_0 ≤ 0 ∧ lt_36_0 − lt_36_0 ≤ 0 ∧ − lt_237_post + lt_237_post ≤ 0 ∧ lt_237_post − lt_237_post ≤ 0 ∧ − lt_237_0 + lt_237_0 ≤ 0 ∧ lt_237_0 − lt_237_0 ≤ 0 ∧ − length_43_post + length_43_post ≤ 0 ∧ length_43_post − length_43_post ≤ 0 ∧ − length_43_0 + length_43_0 ≤ 0 ∧ length_43_0 − length_43_0 ≤ 0 ∧ − len_246_post + len_246_post ≤ 0 ∧ len_246_post − len_246_post ≤ 0 ∧ − len_246_0 + len_246_0 ≤ 0 ∧ len_246_0 − len_246_0 ≤ 0 ∧ − len_180_post + len_180_post ≤ 0 ∧ len_180_post − len_180_post ≤ 0 ∧ − len_180_0 + len_180_0 ≤ 0 ∧ len_180_0 − len_180_0 ≤ 0 ∧ − i_44_post + i_44_post ≤ 0 ∧ i_44_post − i_44_post ≤ 0 ∧ − i_44_0 + i_44_0 ≤ 0 ∧ i_44_0 − i_44_0 ≤ 0 ∧ − i_125_post + i_125_post ≤ 0 ∧ i_125_post − i_125_post ≤ 0 ∧ − i_125_0 + i_125_0 ≤ 0 ∧ i_125_0 − i_125_0 ≤ 0 ∧ − i_108_post + i_108_post ≤ 0 ∧ i_108_post − i_108_post ≤ 0 ∧ − i_108_0 + i_108_0 ≤ 0 ∧ i_108_0 − i_108_0 ≤ 0 ∧ − head_46_post + head_46_post ≤ 0 ∧ head_46_post − head_46_post ≤ 0 ∧ − head_46_0 + head_46_0 ≤ 0 ∧ head_46_0 − head_46_0 ≤ 0 ∧ − fmt_31_post + fmt_31_post ≤ 0 ∧ fmt_31_post − fmt_31_post ≤ 0 ∧ − fmt_31_4 + fmt_31_4 ≤ 0 ∧ fmt_31_4 − fmt_31_4 ≤ 0 ∧ − fmt_31_3 + fmt_31_3 ≤ 0 ∧ fmt_31_3 − fmt_31_3 ≤ 0 ∧ − fmt_31_2 + fmt_31_2 ≤ 0 ∧ fmt_31_2 − fmt_31_2 ≤ 0 ∧ − fmt_31_1 + fmt_31_1 ≤ 0 ∧ fmt_31_1 − fmt_31_1 ≤ 0 ∧ − fmt_31_0 + fmt_31_0 ≤ 0 ∧ fmt_31_0 − fmt_31_0 ≤ 0 ∧ − ct_17_2 + ct_17_2 ≤ 0 ∧ ct_17_2 − ct_17_2 ≤ 0 ∧ − ct_17_1 + ct_17_1 ≤ 0 ∧ ct_17_1 − ct_17_1 ≤ 0 ∧ − a_328_post + a_328_post ≤ 0 ∧ a_328_post − a_328_post ≤ 0 ∧ − a_328_0 + a_328_0 ≤ 0 ∧ a_328_0 − a_328_0 ≤ 0 ∧ − a_305_post + a_305_post ≤ 0 ∧ a_305_post − a_305_post ≤ 0 ∧ − a_305_0 + a_305_0 ≤ 0 ∧ a_305_0 − a_305_0 ≤ 0 ∧ − a_283_post + a_283_post ≤ 0 ∧ a_283_post − a_283_post ≤ 0 ∧ − a_283_0 + a_283_0 ≤ 0 ∧ a_283_0 − a_283_0 ≤ 0 ∧ − a_26_post + a_26_post ≤ 0 ∧ a_26_post − a_26_post ≤ 0 ∧ − a_26_1 + a_26_1 ≤ 0 ∧ a_26_1 − a_26_1 ≤ 0 ∧ − a_26_0 + a_26_0 ≤ 0 ∧ a_26_0 − a_26_0 ≤ 0 ∧ − a_247_post + a_247_post ≤ 0 ∧ a_247_post − a_247_post ≤ 0 ∧ − a_247_0 + a_247_0 ≤ 0 ∧ a_247_0 − a_247_0 ≤ 0 ∧ − a_197_post + a_197_post ≤ 0 ∧ a_197_post − a_197_post ≤ 0 ∧ − a_197_0 + a_197_0 ≤ 0 ∧ a_197_0 − a_197_0 ≤ 0 ∧ − a_146_0 + a_146_0 ≤ 0 ∧ a_146_0 − a_146_0 ≤ 0 | |
| 56 | 88 | 57: | 1 − x_20_0 + y_19_0 ≤ 0 ∧ − y_19_post + y_19_post ≤ 0 ∧ y_19_post − y_19_post ≤ 0 ∧ − y_19_2 + y_19_2 ≤ 0 ∧ y_19_2 − y_19_2 ≤ 0 ∧ − y_19_1 + y_19_1 ≤ 0 ∧ y_19_1 − y_19_1 ≤ 0 ∧ − y_19_0 + y_19_0 ≤ 0 ∧ y_19_0 − y_19_0 ≤ 0 ∧ − x_SLAM_f_18_post + x_SLAM_f_18_post ≤ 0 ∧ x_SLAM_f_18_post − x_SLAM_f_18_post ≤ 0 ∧ − x_SLAM_f_18_2 + x_SLAM_f_18_2 ≤ 0 ∧ x_SLAM_f_18_2 − x_SLAM_f_18_2 ≤ 0 ∧ − x_SLAM_f_18_1 + x_SLAM_f_18_1 ≤ 0 ∧ x_SLAM_f_18_1 − x_SLAM_f_18_1 ≤ 0 ∧ − x_SLAM_f_18_0 + x_SLAM_f_18_0 ≤ 0 ∧ x_SLAM_f_18_0 − x_SLAM_f_18_0 ≤ 0 ∧ − x_34_post + x_34_post ≤ 0 ∧ x_34_post − x_34_post ≤ 0 ∧ − x_34_1 + x_34_1 ≤ 0 ∧ x_34_1 − x_34_1 ≤ 0 ∧ − x_34_0 + x_34_0 ≤ 0 ∧ x_34_0 − x_34_0 ≤ 0 ∧ − x_28_post + x_28_post ≤ 0 ∧ x_28_post − x_28_post ≤ 0 ∧ − x_28_1 + x_28_1 ≤ 0 ∧ x_28_1 − x_28_1 ≤ 0 ∧ − x_28_0 + x_28_0 ≤ 0 ∧ x_28_0 − x_28_0 ≤ 0 ∧ − x_238_post + x_238_post ≤ 0 ∧ x_238_post − x_238_post ≤ 0 ∧ − x_238_0 + x_238_0 ≤ 0 ∧ x_238_0 − x_238_0 ≤ 0 ∧ − x_20_post + x_20_post ≤ 0 ∧ x_20_post − x_20_post ≤ 0 ∧ − x_20_2 + x_20_2 ≤ 0 ∧ x_20_2 − x_20_2 ≤ 0 ∧ − x_20_1 + x_20_1 ≤ 0 ∧ x_20_1 − x_20_1 ≤ 0 ∧ − x_20_0 + x_20_0 ≤ 0 ∧ x_20_0 − x_20_0 ≤ 0 ∧ − x_177_post + x_177_post ≤ 0 ∧ x_177_post − x_177_post ≤ 0 ∧ − x_177_0 + x_177_0 ≤ 0 ∧ x_177_0 − x_177_0 ≤ 0 ∧ − x_16_post + x_16_post ≤ 0 ∧ x_16_post − x_16_post ≤ 0 ∧ − x_16_1 + x_16_1 ≤ 0 ∧ x_16_1 − x_16_1 ≤ 0 ∧ − x_16_0 + x_16_0 ≤ 0 ∧ x_16_0 − x_16_0 ≤ 0 ∧ − x_14_post + x_14_post ≤ 0 ∧ x_14_post − x_14_post ≤ 0 ∧ − x_14_0 + x_14_0 ≤ 0 ∧ x_14_0 − x_14_0 ≤ 0 ∧ − tmp_48_post + tmp_48_post ≤ 0 ∧ tmp_48_post − tmp_48_post ≤ 0 ∧ − tmp_48_0 + tmp_48_0 ≤ 0 ∧ tmp_48_0 − tmp_48_0 ≤ 0 ∧ − temp_49_post + temp_49_post ≤ 0 ∧ temp_49_post − temp_49_post ≤ 0 ∧ − temp_49_0 + temp_49_0 ≤ 0 ∧ temp_49_0 − temp_49_0 ≤ 0 ∧ − temp0_45_post + temp0_45_post ≤ 0 ∧ temp0_45_post − temp0_45_post ≤ 0 ∧ − temp0_45_1 + temp0_45_1 ≤ 0 ∧ temp0_45_1 − temp0_45_1 ≤ 0 ∧ − temp0_45_0 + temp0_45_0 ≤ 0 ∧ temp0_45_0 − temp0_45_0 ≤ 0 ∧ − temp0_32_post + temp0_32_post ≤ 0 ∧ temp0_32_post − temp0_32_post ≤ 0 ∧ − temp0_32_4 + temp0_32_4 ≤ 0 ∧ temp0_32_4 − temp0_32_4 ≤ 0 ∧ − temp0_32_3 + temp0_32_3 ≤ 0 ∧ temp0_32_3 − temp0_32_3 ≤ 0 ∧ − temp0_32_2 + temp0_32_2 ≤ 0 ∧ temp0_32_2 − temp0_32_2 ≤ 0 ∧ − temp0_32_1 + temp0_32_1 ≤ 0 ∧ temp0_32_1 − temp0_32_1 ≤ 0 ∧ − temp0_32_0 + temp0_32_0 ≤ 0 ∧ temp0_32_0 − temp0_32_0 ≤ 0 ∧ − temp0_15_0 + temp0_15_0 ≤ 0 ∧ temp0_15_0 − temp0_15_0 ≤ 0 ∧ − t_23_post + t_23_post ≤ 0 ∧ t_23_post − t_23_post ≤ 0 ∧ − t_23_1 + t_23_1 ≤ 0 ∧ t_23_1 − t_23_1 ≤ 0 ∧ − t_23_0 + t_23_0 ≤ 0 ∧ t_23_0 − t_23_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_post + result_dot_printf_sdv_special_RETURN_VALUE_41_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_post − result_dot_printf_sdv_special_RETURN_VALUE_41_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_1 + result_dot_printf_sdv_special_RETURN_VALUE_41_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_1 − result_dot_printf_sdv_special_RETURN_VALUE_41_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_0 + result_dot_printf_sdv_special_RETURN_VALUE_41_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_0 − result_dot_printf_sdv_special_RETURN_VALUE_41_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_post + result_dot_printf_sdv_special_RETURN_VALUE_38_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_post − result_dot_printf_sdv_special_RETURN_VALUE_38_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_1 + result_dot_printf_sdv_special_RETURN_VALUE_38_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_1 − result_dot_printf_sdv_special_RETURN_VALUE_38_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_0 + result_dot_printf_sdv_special_RETURN_VALUE_38_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_0 − result_dot_printf_sdv_special_RETURN_VALUE_38_0 ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_post + result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_post − result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_1 + result_dot_nondet_sdv_special_RETURN_VALUE_13_1 ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_1 − result_dot_nondet_sdv_special_RETURN_VALUE_13_1 ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_0 + result_dot_nondet_sdv_special_RETURN_VALUE_13_0 ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_0 − result_dot_nondet_sdv_special_RETURN_VALUE_13_0 ≤ 0 ∧ − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post + result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post ≤ 0 ∧ result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post ≤ 0 ∧ − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 + result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 ≤ 0 ∧ result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 ≤ 0 ∧ − result_11_post + result_11_post ≤ 0 ∧ result_11_post − result_11_post ≤ 0 ∧ − result_11_6 + result_11_6 ≤ 0 ∧ result_11_6 − result_11_6 ≤ 0 ∧ − result_11_5 + result_11_5 ≤ 0 ∧ result_11_5 − result_11_5 ≤ 0 ∧ − result_11_4 + result_11_4 ≤ 0 ∧ result_11_4 − result_11_4 ≤ 0 ∧ − result_11_3 + result_11_3 ≤ 0 ∧ result_11_3 − result_11_3 ≤ 0 ∧ − result_11_2 + result_11_2 ≤ 0 ∧ result_11_2 − result_11_2 ≤ 0 ∧ − result_11_1 + result_11_1 ≤ 0 ∧ result_11_1 − result_11_1 ≤ 0 ∧ − result_11_0 + result_11_0 ≤ 0 ∧ result_11_0 − result_11_0 ≤ 0 ∧ − rcd_72_post + rcd_72_post ≤ 0 ∧ rcd_72_post − rcd_72_post ≤ 0 ∧ − rcd_72_0 + rcd_72_0 ≤ 0 ∧ rcd_72_0 − rcd_72_0 ≤ 0 ∧ − rcd_102_post + rcd_102_post ≤ 0 ∧ rcd_102_post − rcd_102_post ≤ 0 ∧ − rcd_102_0 + rcd_102_0 ≤ 0 ∧ rcd_102_0 − rcd_102_0 ≤ 0 ∧ − r_53_post + r_53_post ≤ 0 ∧ r_53_post − r_53_post ≤ 0 ∧ − r_53_0 + r_53_0 ≤ 0 ∧ r_53_0 − r_53_0 ≤ 0 ∧ − r_161_post + r_161_post ≤ 0 ∧ r_161_post − r_161_post ≤ 0 ∧ − r_161_0 + r_161_0 ≤ 0 ∧ r_161_0 − r_161_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 ≤ 0 ∧ − nondet_12_post + nondet_12_post ≤ 0 ∧ nondet_12_post − nondet_12_post ≤ 0 ∧ − nondet_12_1 + nondet_12_1 ≤ 0 ∧ nondet_12_1 − nondet_12_1 ≤ 0 ∧ − nondet_12_0 + nondet_12_0 ≤ 0 ∧ nondet_12_0 − nondet_12_0 ≤ 0 ∧ − lt_37_post + lt_37_post ≤ 0 ∧ lt_37_post − lt_37_post ≤ 0 ∧ − lt_37_1 + lt_37_1 ≤ 0 ∧ lt_37_1 − lt_37_1 ≤ 0 ∧ − lt_37_0 + lt_37_0 ≤ 0 ∧ lt_37_0 − lt_37_0 ≤ 0 ∧ − lt_36_post + lt_36_post ≤ 0 ∧ lt_36_post − lt_36_post ≤ 0 ∧ − lt_36_0 + lt_36_0 ≤ 0 ∧ lt_36_0 − lt_36_0 ≤ 0 ∧ − lt_237_post + lt_237_post ≤ 0 ∧ lt_237_post − lt_237_post ≤ 0 ∧ − lt_237_0 + lt_237_0 ≤ 0 ∧ lt_237_0 − lt_237_0 ≤ 0 ∧ − length_43_post + length_43_post ≤ 0 ∧ length_43_post − length_43_post ≤ 0 ∧ − length_43_0 + length_43_0 ≤ 0 ∧ length_43_0 − length_43_0 ≤ 0 ∧ − len_246_post + len_246_post ≤ 0 ∧ len_246_post − len_246_post ≤ 0 ∧ − len_246_0 + len_246_0 ≤ 0 ∧ len_246_0 − len_246_0 ≤ 0 ∧ − len_180_post + len_180_post ≤ 0 ∧ len_180_post − len_180_post ≤ 0 ∧ − len_180_0 + len_180_0 ≤ 0 ∧ len_180_0 − len_180_0 ≤ 0 ∧ − i_44_post + i_44_post ≤ 0 ∧ i_44_post − i_44_post ≤ 0 ∧ − i_44_0 + i_44_0 ≤ 0 ∧ i_44_0 − i_44_0 ≤ 0 ∧ − i_125_post + i_125_post ≤ 0 ∧ i_125_post − i_125_post ≤ 0 ∧ − i_125_0 + i_125_0 ≤ 0 ∧ i_125_0 − i_125_0 ≤ 0 ∧ − i_108_post + i_108_post ≤ 0 ∧ i_108_post − i_108_post ≤ 0 ∧ − i_108_0 + i_108_0 ≤ 0 ∧ i_108_0 − i_108_0 ≤ 0 ∧ − head_46_post + head_46_post ≤ 0 ∧ head_46_post − head_46_post ≤ 0 ∧ − head_46_0 + head_46_0 ≤ 0 ∧ head_46_0 − head_46_0 ≤ 0 ∧ − fmt_31_post + fmt_31_post ≤ 0 ∧ fmt_31_post − fmt_31_post ≤ 0 ∧ − fmt_31_4 + fmt_31_4 ≤ 0 ∧ fmt_31_4 − fmt_31_4 ≤ 0 ∧ − fmt_31_3 + fmt_31_3 ≤ 0 ∧ fmt_31_3 − fmt_31_3 ≤ 0 ∧ − fmt_31_2 + fmt_31_2 ≤ 0 ∧ fmt_31_2 − fmt_31_2 ≤ 0 ∧ − fmt_31_1 + fmt_31_1 ≤ 0 ∧ fmt_31_1 − fmt_31_1 ≤ 0 ∧ − fmt_31_0 + fmt_31_0 ≤ 0 ∧ fmt_31_0 − fmt_31_0 ≤ 0 ∧ − ct_17_post + ct_17_post ≤ 0 ∧ ct_17_post − ct_17_post ≤ 0 ∧ − ct_17_2 + ct_17_2 ≤ 0 ∧ ct_17_2 − ct_17_2 ≤ 0 ∧ − ct_17_1 + ct_17_1 ≤ 0 ∧ ct_17_1 − ct_17_1 ≤ 0 ∧ − ct_17_0 + ct_17_0 ≤ 0 ∧ ct_17_0 − ct_17_0 ≤ 0 ∧ − a_328_post + a_328_post ≤ 0 ∧ a_328_post − a_328_post ≤ 0 ∧ − a_328_0 + a_328_0 ≤ 0 ∧ a_328_0 − a_328_0 ≤ 0 ∧ − a_305_post + a_305_post ≤ 0 ∧ a_305_post − a_305_post ≤ 0 ∧ − a_305_0 + a_305_0 ≤ 0 ∧ a_305_0 − a_305_0 ≤ 0 ∧ − a_283_post + a_283_post ≤ 0 ∧ a_283_post − a_283_post ≤ 0 ∧ − a_283_0 + a_283_0 ≤ 0 ∧ a_283_0 − a_283_0 ≤ 0 ∧ − a_26_post + a_26_post ≤ 0 ∧ a_26_post − a_26_post ≤ 0 ∧ − a_26_1 + a_26_1 ≤ 0 ∧ a_26_1 − a_26_1 ≤ 0 ∧ − a_26_0 + a_26_0 ≤ 0 ∧ a_26_0 − a_26_0 ≤ 0 ∧ − a_247_post + a_247_post ≤ 0 ∧ a_247_post − a_247_post ≤ 0 ∧ − a_247_0 + a_247_0 ≤ 0 ∧ a_247_0 − a_247_0 ≤ 0 ∧ − a_197_post + a_197_post ≤ 0 ∧ a_197_post − a_197_post ≤ 0 ∧ − a_197_0 + a_197_0 ≤ 0 ∧ a_197_0 − a_197_0 ≤ 0 ∧ − a_146_0 + a_146_0 ≤ 0 ∧ a_146_0 − a_146_0 ≤ 0 | |
| 56 | 89 | 57: | 1 + x_20_0 − y_19_0 ≤ 0 ∧ − y_19_post + y_19_post ≤ 0 ∧ y_19_post − y_19_post ≤ 0 ∧ − y_19_2 + y_19_2 ≤ 0 ∧ y_19_2 − y_19_2 ≤ 0 ∧ − y_19_1 + y_19_1 ≤ 0 ∧ y_19_1 − y_19_1 ≤ 0 ∧ − y_19_0 + y_19_0 ≤ 0 ∧ y_19_0 − y_19_0 ≤ 0 ∧ − x_SLAM_f_18_post + x_SLAM_f_18_post ≤ 0 ∧ x_SLAM_f_18_post − x_SLAM_f_18_post ≤ 0 ∧ − x_SLAM_f_18_2 + x_SLAM_f_18_2 ≤ 0 ∧ x_SLAM_f_18_2 − x_SLAM_f_18_2 ≤ 0 ∧ − x_SLAM_f_18_1 + x_SLAM_f_18_1 ≤ 0 ∧ x_SLAM_f_18_1 − x_SLAM_f_18_1 ≤ 0 ∧ − x_SLAM_f_18_0 + x_SLAM_f_18_0 ≤ 0 ∧ x_SLAM_f_18_0 − x_SLAM_f_18_0 ≤ 0 ∧ − x_34_post + x_34_post ≤ 0 ∧ x_34_post − x_34_post ≤ 0 ∧ − x_34_1 + x_34_1 ≤ 0 ∧ x_34_1 − x_34_1 ≤ 0 ∧ − x_34_0 + x_34_0 ≤ 0 ∧ x_34_0 − x_34_0 ≤ 0 ∧ − x_28_post + x_28_post ≤ 0 ∧ x_28_post − x_28_post ≤ 0 ∧ − x_28_1 + x_28_1 ≤ 0 ∧ x_28_1 − x_28_1 ≤ 0 ∧ − x_28_0 + x_28_0 ≤ 0 ∧ x_28_0 − x_28_0 ≤ 0 ∧ − x_238_post + x_238_post ≤ 0 ∧ x_238_post − x_238_post ≤ 0 ∧ − x_238_0 + x_238_0 ≤ 0 ∧ x_238_0 − x_238_0 ≤ 0 ∧ − x_20_post + x_20_post ≤ 0 ∧ x_20_post − x_20_post ≤ 0 ∧ − x_20_2 + x_20_2 ≤ 0 ∧ x_20_2 − x_20_2 ≤ 0 ∧ − x_20_1 + x_20_1 ≤ 0 ∧ x_20_1 − x_20_1 ≤ 0 ∧ − x_20_0 + x_20_0 ≤ 0 ∧ x_20_0 − x_20_0 ≤ 0 ∧ − x_177_post + x_177_post ≤ 0 ∧ x_177_post − x_177_post ≤ 0 ∧ − x_177_0 + x_177_0 ≤ 0 ∧ x_177_0 − x_177_0 ≤ 0 ∧ − x_16_post + x_16_post ≤ 0 ∧ x_16_post − x_16_post ≤ 0 ∧ − x_16_1 + x_16_1 ≤ 0 ∧ x_16_1 − x_16_1 ≤ 0 ∧ − x_16_0 + x_16_0 ≤ 0 ∧ x_16_0 − x_16_0 ≤ 0 ∧ − x_14_post + x_14_post ≤ 0 ∧ x_14_post − x_14_post ≤ 0 ∧ − x_14_0 + x_14_0 ≤ 0 ∧ x_14_0 − x_14_0 ≤ 0 ∧ − tmp_48_post + tmp_48_post ≤ 0 ∧ tmp_48_post − tmp_48_post ≤ 0 ∧ − tmp_48_0 + tmp_48_0 ≤ 0 ∧ tmp_48_0 − tmp_48_0 ≤ 0 ∧ − temp_49_post + temp_49_post ≤ 0 ∧ temp_49_post − temp_49_post ≤ 0 ∧ − temp_49_0 + temp_49_0 ≤ 0 ∧ temp_49_0 − temp_49_0 ≤ 0 ∧ − temp0_45_post + temp0_45_post ≤ 0 ∧ temp0_45_post − temp0_45_post ≤ 0 ∧ − temp0_45_1 + temp0_45_1 ≤ 0 ∧ temp0_45_1 − temp0_45_1 ≤ 0 ∧ − temp0_45_0 + temp0_45_0 ≤ 0 ∧ temp0_45_0 − temp0_45_0 ≤ 0 ∧ − temp0_32_post + temp0_32_post ≤ 0 ∧ temp0_32_post − temp0_32_post ≤ 0 ∧ − temp0_32_4 + temp0_32_4 ≤ 0 ∧ temp0_32_4 − temp0_32_4 ≤ 0 ∧ − temp0_32_3 + temp0_32_3 ≤ 0 ∧ temp0_32_3 − temp0_32_3 ≤ 0 ∧ − temp0_32_2 + temp0_32_2 ≤ 0 ∧ temp0_32_2 − temp0_32_2 ≤ 0 ∧ − temp0_32_1 + temp0_32_1 ≤ 0 ∧ temp0_32_1 − temp0_32_1 ≤ 0 ∧ − temp0_32_0 + temp0_32_0 ≤ 0 ∧ temp0_32_0 − temp0_32_0 ≤ 0 ∧ − temp0_15_0 + temp0_15_0 ≤ 0 ∧ temp0_15_0 − temp0_15_0 ≤ 0 ∧ − t_23_post + t_23_post ≤ 0 ∧ t_23_post − t_23_post ≤ 0 ∧ − t_23_1 + t_23_1 ≤ 0 ∧ t_23_1 − t_23_1 ≤ 0 ∧ − t_23_0 + t_23_0 ≤ 0 ∧ t_23_0 − t_23_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_post + result_dot_printf_sdv_special_RETURN_VALUE_41_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_post − result_dot_printf_sdv_special_RETURN_VALUE_41_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_1 + result_dot_printf_sdv_special_RETURN_VALUE_41_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_1 − result_dot_printf_sdv_special_RETURN_VALUE_41_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_0 + result_dot_printf_sdv_special_RETURN_VALUE_41_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_0 − result_dot_printf_sdv_special_RETURN_VALUE_41_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_post + result_dot_printf_sdv_special_RETURN_VALUE_38_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_post − result_dot_printf_sdv_special_RETURN_VALUE_38_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_1 + result_dot_printf_sdv_special_RETURN_VALUE_38_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_1 − result_dot_printf_sdv_special_RETURN_VALUE_38_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_0 + result_dot_printf_sdv_special_RETURN_VALUE_38_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_0 − result_dot_printf_sdv_special_RETURN_VALUE_38_0 ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_post + result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_post − result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_1 + result_dot_nondet_sdv_special_RETURN_VALUE_13_1 ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_1 − result_dot_nondet_sdv_special_RETURN_VALUE_13_1 ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_0 + result_dot_nondet_sdv_special_RETURN_VALUE_13_0 ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_0 − result_dot_nondet_sdv_special_RETURN_VALUE_13_0 ≤ 0 ∧ − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post + result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post ≤ 0 ∧ result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post ≤ 0 ∧ − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 + result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 ≤ 0 ∧ result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 ≤ 0 ∧ − result_11_post + result_11_post ≤ 0 ∧ result_11_post − result_11_post ≤ 0 ∧ − result_11_6 + result_11_6 ≤ 0 ∧ result_11_6 − result_11_6 ≤ 0 ∧ − result_11_5 + result_11_5 ≤ 0 ∧ result_11_5 − result_11_5 ≤ 0 ∧ − result_11_4 + result_11_4 ≤ 0 ∧ result_11_4 − result_11_4 ≤ 0 ∧ − result_11_3 + result_11_3 ≤ 0 ∧ result_11_3 − result_11_3 ≤ 0 ∧ − result_11_2 + result_11_2 ≤ 0 ∧ result_11_2 − result_11_2 ≤ 0 ∧ − result_11_1 + result_11_1 ≤ 0 ∧ result_11_1 − result_11_1 ≤ 0 ∧ − result_11_0 + result_11_0 ≤ 0 ∧ result_11_0 − result_11_0 ≤ 0 ∧ − rcd_72_post + rcd_72_post ≤ 0 ∧ rcd_72_post − rcd_72_post ≤ 0 ∧ − rcd_72_0 + rcd_72_0 ≤ 0 ∧ rcd_72_0 − rcd_72_0 ≤ 0 ∧ − rcd_102_post + rcd_102_post ≤ 0 ∧ rcd_102_post − rcd_102_post ≤ 0 ∧ − rcd_102_0 + rcd_102_0 ≤ 0 ∧ rcd_102_0 − rcd_102_0 ≤ 0 ∧ − r_53_post + r_53_post ≤ 0 ∧ r_53_post − r_53_post ≤ 0 ∧ − r_53_0 + r_53_0 ≤ 0 ∧ r_53_0 − r_53_0 ≤ 0 ∧ − r_161_post + r_161_post ≤ 0 ∧ r_161_post − r_161_post ≤ 0 ∧ − r_161_0 + r_161_0 ≤ 0 ∧ r_161_0 − r_161_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 ≤ 0 ∧ − nondet_12_post + nondet_12_post ≤ 0 ∧ nondet_12_post − nondet_12_post ≤ 0 ∧ − nondet_12_1 + nondet_12_1 ≤ 0 ∧ nondet_12_1 − nondet_12_1 ≤ 0 ∧ − nondet_12_0 + nondet_12_0 ≤ 0 ∧ nondet_12_0 − nondet_12_0 ≤ 0 ∧ − lt_37_post + lt_37_post ≤ 0 ∧ lt_37_post − lt_37_post ≤ 0 ∧ − lt_37_1 + lt_37_1 ≤ 0 ∧ lt_37_1 − lt_37_1 ≤ 0 ∧ − lt_37_0 + lt_37_0 ≤ 0 ∧ lt_37_0 − lt_37_0 ≤ 0 ∧ − lt_36_post + lt_36_post ≤ 0 ∧ lt_36_post − lt_36_post ≤ 0 ∧ − lt_36_0 + lt_36_0 ≤ 0 ∧ lt_36_0 − lt_36_0 ≤ 0 ∧ − lt_237_post + lt_237_post ≤ 0 ∧ lt_237_post − lt_237_post ≤ 0 ∧ − lt_237_0 + lt_237_0 ≤ 0 ∧ lt_237_0 − lt_237_0 ≤ 0 ∧ − length_43_post + length_43_post ≤ 0 ∧ length_43_post − length_43_post ≤ 0 ∧ − length_43_0 + length_43_0 ≤ 0 ∧ length_43_0 − length_43_0 ≤ 0 ∧ − len_246_post + len_246_post ≤ 0 ∧ len_246_post − len_246_post ≤ 0 ∧ − len_246_0 + len_246_0 ≤ 0 ∧ len_246_0 − len_246_0 ≤ 0 ∧ − len_180_post + len_180_post ≤ 0 ∧ len_180_post − len_180_post ≤ 0 ∧ − len_180_0 + len_180_0 ≤ 0 ∧ len_180_0 − len_180_0 ≤ 0 ∧ − i_44_post + i_44_post ≤ 0 ∧ i_44_post − i_44_post ≤ 0 ∧ − i_44_0 + i_44_0 ≤ 0 ∧ i_44_0 − i_44_0 ≤ 0 ∧ − i_125_post + i_125_post ≤ 0 ∧ i_125_post − i_125_post ≤ 0 ∧ − i_125_0 + i_125_0 ≤ 0 ∧ i_125_0 − i_125_0 ≤ 0 ∧ − i_108_post + i_108_post ≤ 0 ∧ i_108_post − i_108_post ≤ 0 ∧ − i_108_0 + i_108_0 ≤ 0 ∧ i_108_0 − i_108_0 ≤ 0 ∧ − head_46_post + head_46_post ≤ 0 ∧ head_46_post − head_46_post ≤ 0 ∧ − head_46_0 + head_46_0 ≤ 0 ∧ head_46_0 − head_46_0 ≤ 0 ∧ − fmt_31_post + fmt_31_post ≤ 0 ∧ fmt_31_post − fmt_31_post ≤ 0 ∧ − fmt_31_4 + fmt_31_4 ≤ 0 ∧ fmt_31_4 − fmt_31_4 ≤ 0 ∧ − fmt_31_3 + fmt_31_3 ≤ 0 ∧ fmt_31_3 − fmt_31_3 ≤ 0 ∧ − fmt_31_2 + fmt_31_2 ≤ 0 ∧ fmt_31_2 − fmt_31_2 ≤ 0 ∧ − fmt_31_1 + fmt_31_1 ≤ 0 ∧ fmt_31_1 − fmt_31_1 ≤ 0 ∧ − fmt_31_0 + fmt_31_0 ≤ 0 ∧ fmt_31_0 − fmt_31_0 ≤ 0 ∧ − ct_17_post + ct_17_post ≤ 0 ∧ ct_17_post − ct_17_post ≤ 0 ∧ − ct_17_2 + ct_17_2 ≤ 0 ∧ ct_17_2 − ct_17_2 ≤ 0 ∧ − ct_17_1 + ct_17_1 ≤ 0 ∧ ct_17_1 − ct_17_1 ≤ 0 ∧ − ct_17_0 + ct_17_0 ≤ 0 ∧ ct_17_0 − ct_17_0 ≤ 0 ∧ − a_328_post + a_328_post ≤ 0 ∧ a_328_post − a_328_post ≤ 0 ∧ − a_328_0 + a_328_0 ≤ 0 ∧ a_328_0 − a_328_0 ≤ 0 ∧ − a_305_post + a_305_post ≤ 0 ∧ a_305_post − a_305_post ≤ 0 ∧ − a_305_0 + a_305_0 ≤ 0 ∧ a_305_0 − a_305_0 ≤ 0 ∧ − a_283_post + a_283_post ≤ 0 ∧ a_283_post − a_283_post ≤ 0 ∧ − a_283_0 + a_283_0 ≤ 0 ∧ a_283_0 − a_283_0 ≤ 0 ∧ − a_26_post + a_26_post ≤ 0 ∧ a_26_post − a_26_post ≤ 0 ∧ − a_26_1 + a_26_1 ≤ 0 ∧ a_26_1 − a_26_1 ≤ 0 ∧ − a_26_0 + a_26_0 ≤ 0 ∧ a_26_0 − a_26_0 ≤ 0 ∧ − a_247_post + a_247_post ≤ 0 ∧ a_247_post − a_247_post ≤ 0 ∧ − a_247_0 + a_247_0 ≤ 0 ∧ a_247_0 − a_247_0 ≤ 0 ∧ − a_197_post + a_197_post ≤ 0 ∧ a_197_post − a_197_post ≤ 0 ∧ − a_197_0 + a_197_0 ≤ 0 ∧ a_197_0 − a_197_0 ≤ 0 ∧ − a_146_0 + a_146_0 ≤ 0 ∧ a_146_0 − a_146_0 ≤ 0 | |
| 57 | 90 | 58: | 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ 0 ≤ 0 ∧ t_23_post − x_20_0 ≤ 0 ∧ − t_23_post + x_20_0 ≤ 0 ∧ − ct_17_0 ≤ 0 ∧ ct_17_0 ≤ 0 ∧ − y_19_0 ≤ 0 ∧ y_19_0 ≤ 0 ∧ x_14_0 − x_16_0 ≤ 0 ∧ − x_14_0 + x_16_0 ≤ 0 ∧ x_14_0 − x_SLAM_f_18_0 ≤ 0 ∧ − x_14_0 + x_SLAM_f_18_0 ≤ 0 ∧ x_16_0 − x_SLAM_f_18_0 ≤ 0 ∧ − x_16_0 + x_SLAM_f_18_0 ≤ 0 ∧ ct_17_0 − y_19_0 ≤ 0 ∧ − ct_17_0 + y_19_0 ≤ 0 ∧ 1 − a_305_0 + a_328_post ≤ 0 ∧ −1 + a_305_0 − a_328_post ≤ 0 ∧ a_328_0 − a_328_post ≤ 0 ∧ − a_328_0 + a_328_post ≤ 0 ∧ t_23_0 − t_23_post ≤ 0 ∧ − t_23_0 + t_23_post ≤ 0 ∧ − y_19_post + y_19_post ≤ 0 ∧ y_19_post − y_19_post ≤ 0 ∧ − y_19_2 + y_19_2 ≤ 0 ∧ y_19_2 − y_19_2 ≤ 0 ∧ − y_19_1 + y_19_1 ≤ 0 ∧ y_19_1 − y_19_1 ≤ 0 ∧ − y_19_0 + y_19_0 ≤ 0 ∧ y_19_0 − y_19_0 ≤ 0 ∧ − x_SLAM_f_18_post + x_SLAM_f_18_post ≤ 0 ∧ x_SLAM_f_18_post − x_SLAM_f_18_post ≤ 0 ∧ − x_SLAM_f_18_2 + x_SLAM_f_18_2 ≤ 0 ∧ x_SLAM_f_18_2 − x_SLAM_f_18_2 ≤ 0 ∧ − x_SLAM_f_18_1 + x_SLAM_f_18_1 ≤ 0 ∧ x_SLAM_f_18_1 − x_SLAM_f_18_1 ≤ 0 ∧ − x_SLAM_f_18_0 + x_SLAM_f_18_0 ≤ 0 ∧ x_SLAM_f_18_0 − x_SLAM_f_18_0 ≤ 0 ∧ − x_34_post + x_34_post ≤ 0 ∧ x_34_post − x_34_post ≤ 0 ∧ − x_34_1 + x_34_1 ≤ 0 ∧ x_34_1 − x_34_1 ≤ 0 ∧ − x_34_0 + x_34_0 ≤ 0 ∧ x_34_0 − x_34_0 ≤ 0 ∧ − x_28_post + x_28_post ≤ 0 ∧ x_28_post − x_28_post ≤ 0 ∧ − x_28_1 + x_28_1 ≤ 0 ∧ x_28_1 − x_28_1 ≤ 0 ∧ − x_28_0 + x_28_0 ≤ 0 ∧ x_28_0 − x_28_0 ≤ 0 ∧ − x_238_post + x_238_post ≤ 0 ∧ x_238_post − x_238_post ≤ 0 ∧ − x_238_0 + x_238_0 ≤ 0 ∧ x_238_0 − x_238_0 ≤ 0 ∧ − x_20_post + x_20_post ≤ 0 ∧ x_20_post − x_20_post ≤ 0 ∧ − x_20_2 + x_20_2 ≤ 0 ∧ x_20_2 − x_20_2 ≤ 0 ∧ − x_20_1 + x_20_1 ≤ 0 ∧ x_20_1 − x_20_1 ≤ 0 ∧ − x_20_0 + x_20_0 ≤ 0 ∧ x_20_0 − x_20_0 ≤ 0 ∧ − x_177_post + x_177_post ≤ 0 ∧ x_177_post − x_177_post ≤ 0 ∧ − x_177_0 + x_177_0 ≤ 0 ∧ x_177_0 − x_177_0 ≤ 0 ∧ − x_16_post + x_16_post ≤ 0 ∧ x_16_post − x_16_post ≤ 0 ∧ − x_16_1 + x_16_1 ≤ 0 ∧ x_16_1 − x_16_1 ≤ 0 ∧ − x_16_0 + x_16_0 ≤ 0 ∧ x_16_0 − x_16_0 ≤ 0 ∧ − x_14_post + x_14_post ≤ 0 ∧ x_14_post − x_14_post ≤ 0 ∧ − x_14_0 + x_14_0 ≤ 0 ∧ x_14_0 − x_14_0 ≤ 0 ∧ − tmp_48_post + tmp_48_post ≤ 0 ∧ tmp_48_post − tmp_48_post ≤ 0 ∧ − tmp_48_0 + tmp_48_0 ≤ 0 ∧ tmp_48_0 − tmp_48_0 ≤ 0 ∧ − temp_49_post + temp_49_post ≤ 0 ∧ temp_49_post − temp_49_post ≤ 0 ∧ − temp_49_0 + temp_49_0 ≤ 0 ∧ temp_49_0 − temp_49_0 ≤ 0 ∧ − temp0_45_post + temp0_45_post ≤ 0 ∧ temp0_45_post − temp0_45_post ≤ 0 ∧ − temp0_45_1 + temp0_45_1 ≤ 0 ∧ temp0_45_1 − temp0_45_1 ≤ 0 ∧ − temp0_45_0 + temp0_45_0 ≤ 0 ∧ temp0_45_0 − temp0_45_0 ≤ 0 ∧ − temp0_32_post + temp0_32_post ≤ 0 ∧ temp0_32_post − temp0_32_post ≤ 0 ∧ − temp0_32_4 + temp0_32_4 ≤ 0 ∧ temp0_32_4 − temp0_32_4 ≤ 0 ∧ − temp0_32_3 + temp0_32_3 ≤ 0 ∧ temp0_32_3 − temp0_32_3 ≤ 0 ∧ − temp0_32_2 + temp0_32_2 ≤ 0 ∧ temp0_32_2 − temp0_32_2 ≤ 0 ∧ − temp0_32_1 + temp0_32_1 ≤ 0 ∧ temp0_32_1 − temp0_32_1 ≤ 0 ∧ − temp0_32_0 + temp0_32_0 ≤ 0 ∧ temp0_32_0 − temp0_32_0 ≤ 0 ∧ − temp0_15_0 + temp0_15_0 ≤ 0 ∧ temp0_15_0 − temp0_15_0 ≤ 0 ∧ − t_23_1 + t_23_1 ≤ 0 ∧ t_23_1 − t_23_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_post + result_dot_printf_sdv_special_RETURN_VALUE_41_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_post − result_dot_printf_sdv_special_RETURN_VALUE_41_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_1 + result_dot_printf_sdv_special_RETURN_VALUE_41_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_1 − result_dot_printf_sdv_special_RETURN_VALUE_41_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_0 + result_dot_printf_sdv_special_RETURN_VALUE_41_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_0 − result_dot_printf_sdv_special_RETURN_VALUE_41_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_post + result_dot_printf_sdv_special_RETURN_VALUE_38_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_post − result_dot_printf_sdv_special_RETURN_VALUE_38_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_1 + result_dot_printf_sdv_special_RETURN_VALUE_38_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_1 − result_dot_printf_sdv_special_RETURN_VALUE_38_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_0 + result_dot_printf_sdv_special_RETURN_VALUE_38_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_0 − result_dot_printf_sdv_special_RETURN_VALUE_38_0 ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_post + result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_post − result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_1 + result_dot_nondet_sdv_special_RETURN_VALUE_13_1 ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_1 − result_dot_nondet_sdv_special_RETURN_VALUE_13_1 ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_0 + result_dot_nondet_sdv_special_RETURN_VALUE_13_0 ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_0 − result_dot_nondet_sdv_special_RETURN_VALUE_13_0 ≤ 0 ∧ − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post + result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post ≤ 0 ∧ result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post ≤ 0 ∧ − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 + result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 ≤ 0 ∧ result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 ≤ 0 ∧ − result_11_post + result_11_post ≤ 0 ∧ result_11_post − result_11_post ≤ 0 ∧ − result_11_6 + result_11_6 ≤ 0 ∧ result_11_6 − result_11_6 ≤ 0 ∧ − result_11_5 + result_11_5 ≤ 0 ∧ result_11_5 − result_11_5 ≤ 0 ∧ − result_11_4 + result_11_4 ≤ 0 ∧ result_11_4 − result_11_4 ≤ 0 ∧ − result_11_3 + result_11_3 ≤ 0 ∧ result_11_3 − result_11_3 ≤ 0 ∧ − result_11_2 + result_11_2 ≤ 0 ∧ result_11_2 − result_11_2 ≤ 0 ∧ − result_11_1 + result_11_1 ≤ 0 ∧ result_11_1 − result_11_1 ≤ 0 ∧ − result_11_0 + result_11_0 ≤ 0 ∧ result_11_0 − result_11_0 ≤ 0 ∧ − rcd_72_post + rcd_72_post ≤ 0 ∧ rcd_72_post − rcd_72_post ≤ 0 ∧ − rcd_72_0 + rcd_72_0 ≤ 0 ∧ rcd_72_0 − rcd_72_0 ≤ 0 ∧ − rcd_102_post + rcd_102_post ≤ 0 ∧ rcd_102_post − rcd_102_post ≤ 0 ∧ − rcd_102_0 + rcd_102_0 ≤ 0 ∧ rcd_102_0 − rcd_102_0 ≤ 0 ∧ − r_53_post + r_53_post ≤ 0 ∧ r_53_post − r_53_post ≤ 0 ∧ − r_53_0 + r_53_0 ≤ 0 ∧ r_53_0 − r_53_0 ≤ 0 ∧ − r_161_post + r_161_post ≤ 0 ∧ r_161_post − r_161_post ≤ 0 ∧ − r_161_0 + r_161_0 ≤ 0 ∧ r_161_0 − r_161_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 ≤ 0 ∧ − nondet_12_post + nondet_12_post ≤ 0 ∧ nondet_12_post − nondet_12_post ≤ 0 ∧ − nondet_12_1 + nondet_12_1 ≤ 0 ∧ nondet_12_1 − nondet_12_1 ≤ 0 ∧ − nondet_12_0 + nondet_12_0 ≤ 0 ∧ nondet_12_0 − nondet_12_0 ≤ 0 ∧ − lt_37_post + lt_37_post ≤ 0 ∧ lt_37_post − lt_37_post ≤ 0 ∧ − lt_37_1 + lt_37_1 ≤ 0 ∧ lt_37_1 − lt_37_1 ≤ 0 ∧ − lt_37_0 + lt_37_0 ≤ 0 ∧ lt_37_0 − lt_37_0 ≤ 0 ∧ − lt_36_post + lt_36_post ≤ 0 ∧ lt_36_post − lt_36_post ≤ 0 ∧ − lt_36_0 + lt_36_0 ≤ 0 ∧ lt_36_0 − lt_36_0 ≤ 0 ∧ − lt_237_post + lt_237_post ≤ 0 ∧ lt_237_post − lt_237_post ≤ 0 ∧ − lt_237_0 + lt_237_0 ≤ 0 ∧ lt_237_0 − lt_237_0 ≤ 0 ∧ − length_43_post + length_43_post ≤ 0 ∧ length_43_post − length_43_post ≤ 0 ∧ − length_43_0 + length_43_0 ≤ 0 ∧ length_43_0 − length_43_0 ≤ 0 ∧ − len_246_post + len_246_post ≤ 0 ∧ len_246_post − len_246_post ≤ 0 ∧ − len_246_0 + len_246_0 ≤ 0 ∧ len_246_0 − len_246_0 ≤ 0 ∧ − len_180_post + len_180_post ≤ 0 ∧ len_180_post − len_180_post ≤ 0 ∧ − len_180_0 + len_180_0 ≤ 0 ∧ len_180_0 − len_180_0 ≤ 0 ∧ − i_44_post + i_44_post ≤ 0 ∧ i_44_post − i_44_post ≤ 0 ∧ − i_44_0 + i_44_0 ≤ 0 ∧ i_44_0 − i_44_0 ≤ 0 ∧ − i_125_post + i_125_post ≤ 0 ∧ i_125_post − i_125_post ≤ 0 ∧ − i_125_0 + i_125_0 ≤ 0 ∧ i_125_0 − i_125_0 ≤ 0 ∧ − i_108_post + i_108_post ≤ 0 ∧ i_108_post − i_108_post ≤ 0 ∧ − i_108_0 + i_108_0 ≤ 0 ∧ i_108_0 − i_108_0 ≤ 0 ∧ − head_46_post + head_46_post ≤ 0 ∧ head_46_post − head_46_post ≤ 0 ∧ − head_46_0 + head_46_0 ≤ 0 ∧ head_46_0 − head_46_0 ≤ 0 ∧ − fmt_31_post + fmt_31_post ≤ 0 ∧ fmt_31_post − fmt_31_post ≤ 0 ∧ − fmt_31_4 + fmt_31_4 ≤ 0 ∧ fmt_31_4 − fmt_31_4 ≤ 0 ∧ − fmt_31_3 + fmt_31_3 ≤ 0 ∧ fmt_31_3 − fmt_31_3 ≤ 0 ∧ − fmt_31_2 + fmt_31_2 ≤ 0 ∧ fmt_31_2 − fmt_31_2 ≤ 0 ∧ − fmt_31_1 + fmt_31_1 ≤ 0 ∧ fmt_31_1 − fmt_31_1 ≤ 0 ∧ − fmt_31_0 + fmt_31_0 ≤ 0 ∧ fmt_31_0 − fmt_31_0 ≤ 0 ∧ − ct_17_post + ct_17_post ≤ 0 ∧ ct_17_post − ct_17_post ≤ 0 ∧ − ct_17_2 + ct_17_2 ≤ 0 ∧ ct_17_2 − ct_17_2 ≤ 0 ∧ − ct_17_1 + ct_17_1 ≤ 0 ∧ ct_17_1 − ct_17_1 ≤ 0 ∧ − ct_17_0 + ct_17_0 ≤ 0 ∧ ct_17_0 − ct_17_0 ≤ 0 ∧ − a_305_post + a_305_post ≤ 0 ∧ a_305_post − a_305_post ≤ 0 ∧ − a_305_0 + a_305_0 ≤ 0 ∧ a_305_0 − a_305_0 ≤ 0 ∧ − a_283_post + a_283_post ≤ 0 ∧ a_283_post − a_283_post ≤ 0 ∧ − a_283_0 + a_283_0 ≤ 0 ∧ a_283_0 − a_283_0 ≤ 0 ∧ − a_26_post + a_26_post ≤ 0 ∧ a_26_post − a_26_post ≤ 0 ∧ − a_26_1 + a_26_1 ≤ 0 ∧ a_26_1 − a_26_1 ≤ 0 ∧ − a_26_0 + a_26_0 ≤ 0 ∧ a_26_0 − a_26_0 ≤ 0 ∧ − a_247_post + a_247_post ≤ 0 ∧ a_247_post − a_247_post ≤ 0 ∧ − a_247_0 + a_247_0 ≤ 0 ∧ a_247_0 − a_247_0 ≤ 0 ∧ − a_197_post + a_197_post ≤ 0 ∧ a_197_post − a_197_post ≤ 0 ∧ − a_197_0 + a_197_0 ≤ 0 ∧ a_197_0 − a_197_0 ≤ 0 ∧ − a_146_0 + a_146_0 ≤ 0 ∧ a_146_0 − a_146_0 ≤ 0 | |
| 58 | 91 | 59: | 1 − x_14_0 ≤ 0 ∧ − y_19_post + y_19_post ≤ 0 ∧ y_19_post − y_19_post ≤ 0 ∧ − y_19_2 + y_19_2 ≤ 0 ∧ y_19_2 − y_19_2 ≤ 0 ∧ − y_19_1 + y_19_1 ≤ 0 ∧ y_19_1 − y_19_1 ≤ 0 ∧ − y_19_0 + y_19_0 ≤ 0 ∧ y_19_0 − y_19_0 ≤ 0 ∧ − x_SLAM_f_18_post + x_SLAM_f_18_post ≤ 0 ∧ x_SLAM_f_18_post − x_SLAM_f_18_post ≤ 0 ∧ − x_SLAM_f_18_2 + x_SLAM_f_18_2 ≤ 0 ∧ x_SLAM_f_18_2 − x_SLAM_f_18_2 ≤ 0 ∧ − x_SLAM_f_18_1 + x_SLAM_f_18_1 ≤ 0 ∧ x_SLAM_f_18_1 − x_SLAM_f_18_1 ≤ 0 ∧ − x_SLAM_f_18_0 + x_SLAM_f_18_0 ≤ 0 ∧ x_SLAM_f_18_0 − x_SLAM_f_18_0 ≤ 0 ∧ − x_34_post + x_34_post ≤ 0 ∧ x_34_post − x_34_post ≤ 0 ∧ − x_34_1 + x_34_1 ≤ 0 ∧ x_34_1 − x_34_1 ≤ 0 ∧ − x_34_0 + x_34_0 ≤ 0 ∧ x_34_0 − x_34_0 ≤ 0 ∧ − x_28_post + x_28_post ≤ 0 ∧ x_28_post − x_28_post ≤ 0 ∧ − x_28_1 + x_28_1 ≤ 0 ∧ x_28_1 − x_28_1 ≤ 0 ∧ − x_28_0 + x_28_0 ≤ 0 ∧ x_28_0 − x_28_0 ≤ 0 ∧ − x_238_post + x_238_post ≤ 0 ∧ x_238_post − x_238_post ≤ 0 ∧ − x_238_0 + x_238_0 ≤ 0 ∧ x_238_0 − x_238_0 ≤ 0 ∧ − x_20_post + x_20_post ≤ 0 ∧ x_20_post − x_20_post ≤ 0 ∧ − x_20_2 + x_20_2 ≤ 0 ∧ x_20_2 − x_20_2 ≤ 0 ∧ − x_20_1 + x_20_1 ≤ 0 ∧ x_20_1 − x_20_1 ≤ 0 ∧ − x_20_0 + x_20_0 ≤ 0 ∧ x_20_0 − x_20_0 ≤ 0 ∧ − x_177_post + x_177_post ≤ 0 ∧ x_177_post − x_177_post ≤ 0 ∧ − x_177_0 + x_177_0 ≤ 0 ∧ x_177_0 − x_177_0 ≤ 0 ∧ − x_16_post + x_16_post ≤ 0 ∧ x_16_post − x_16_post ≤ 0 ∧ − x_16_1 + x_16_1 ≤ 0 ∧ x_16_1 − x_16_1 ≤ 0 ∧ − x_16_0 + x_16_0 ≤ 0 ∧ x_16_0 − x_16_0 ≤ 0 ∧ − x_14_post + x_14_post ≤ 0 ∧ x_14_post − x_14_post ≤ 0 ∧ − x_14_0 + x_14_0 ≤ 0 ∧ x_14_0 − x_14_0 ≤ 0 ∧ − tmp_48_post + tmp_48_post ≤ 0 ∧ tmp_48_post − tmp_48_post ≤ 0 ∧ − tmp_48_0 + tmp_48_0 ≤ 0 ∧ tmp_48_0 − tmp_48_0 ≤ 0 ∧ − temp_49_post + temp_49_post ≤ 0 ∧ temp_49_post − temp_49_post ≤ 0 ∧ − temp_49_0 + temp_49_0 ≤ 0 ∧ temp_49_0 − temp_49_0 ≤ 0 ∧ − temp0_45_post + temp0_45_post ≤ 0 ∧ temp0_45_post − temp0_45_post ≤ 0 ∧ − temp0_45_1 + temp0_45_1 ≤ 0 ∧ temp0_45_1 − temp0_45_1 ≤ 0 ∧ − temp0_45_0 + temp0_45_0 ≤ 0 ∧ temp0_45_0 − temp0_45_0 ≤ 0 ∧ − temp0_32_post + temp0_32_post ≤ 0 ∧ temp0_32_post − temp0_32_post ≤ 0 ∧ − temp0_32_4 + temp0_32_4 ≤ 0 ∧ temp0_32_4 − temp0_32_4 ≤ 0 ∧ − temp0_32_3 + temp0_32_3 ≤ 0 ∧ temp0_32_3 − temp0_32_3 ≤ 0 ∧ − temp0_32_2 + temp0_32_2 ≤ 0 ∧ temp0_32_2 − temp0_32_2 ≤ 0 ∧ − temp0_32_1 + temp0_32_1 ≤ 0 ∧ temp0_32_1 − temp0_32_1 ≤ 0 ∧ − temp0_32_0 + temp0_32_0 ≤ 0 ∧ temp0_32_0 − temp0_32_0 ≤ 0 ∧ − temp0_15_0 + temp0_15_0 ≤ 0 ∧ temp0_15_0 − temp0_15_0 ≤ 0 ∧ − t_23_post + t_23_post ≤ 0 ∧ t_23_post − t_23_post ≤ 0 ∧ − t_23_1 + t_23_1 ≤ 0 ∧ t_23_1 − t_23_1 ≤ 0 ∧ − t_23_0 + t_23_0 ≤ 0 ∧ t_23_0 − t_23_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_post + result_dot_printf_sdv_special_RETURN_VALUE_41_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_post − result_dot_printf_sdv_special_RETURN_VALUE_41_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_1 + result_dot_printf_sdv_special_RETURN_VALUE_41_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_1 − result_dot_printf_sdv_special_RETURN_VALUE_41_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_0 + result_dot_printf_sdv_special_RETURN_VALUE_41_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_0 − result_dot_printf_sdv_special_RETURN_VALUE_41_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_post + result_dot_printf_sdv_special_RETURN_VALUE_38_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_post − result_dot_printf_sdv_special_RETURN_VALUE_38_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_1 + result_dot_printf_sdv_special_RETURN_VALUE_38_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_1 − result_dot_printf_sdv_special_RETURN_VALUE_38_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_0 + result_dot_printf_sdv_special_RETURN_VALUE_38_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_0 − result_dot_printf_sdv_special_RETURN_VALUE_38_0 ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_post + result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_post − result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_1 + result_dot_nondet_sdv_special_RETURN_VALUE_13_1 ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_1 − result_dot_nondet_sdv_special_RETURN_VALUE_13_1 ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_0 + result_dot_nondet_sdv_special_RETURN_VALUE_13_0 ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_0 − result_dot_nondet_sdv_special_RETURN_VALUE_13_0 ≤ 0 ∧ − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post + result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post ≤ 0 ∧ result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post ≤ 0 ∧ − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 + result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 ≤ 0 ∧ result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 ≤ 0 ∧ − result_11_post + result_11_post ≤ 0 ∧ result_11_post − result_11_post ≤ 0 ∧ − result_11_6 + result_11_6 ≤ 0 ∧ result_11_6 − result_11_6 ≤ 0 ∧ − result_11_5 + result_11_5 ≤ 0 ∧ result_11_5 − result_11_5 ≤ 0 ∧ − result_11_4 + result_11_4 ≤ 0 ∧ result_11_4 − result_11_4 ≤ 0 ∧ − result_11_3 + result_11_3 ≤ 0 ∧ result_11_3 − result_11_3 ≤ 0 ∧ − result_11_2 + result_11_2 ≤ 0 ∧ result_11_2 − result_11_2 ≤ 0 ∧ − result_11_1 + result_11_1 ≤ 0 ∧ result_11_1 − result_11_1 ≤ 0 ∧ − result_11_0 + result_11_0 ≤ 0 ∧ result_11_0 − result_11_0 ≤ 0 ∧ − rcd_72_post + rcd_72_post ≤ 0 ∧ rcd_72_post − rcd_72_post ≤ 0 ∧ − rcd_72_0 + rcd_72_0 ≤ 0 ∧ rcd_72_0 − rcd_72_0 ≤ 0 ∧ − rcd_102_post + rcd_102_post ≤ 0 ∧ rcd_102_post − rcd_102_post ≤ 0 ∧ − rcd_102_0 + rcd_102_0 ≤ 0 ∧ rcd_102_0 − rcd_102_0 ≤ 0 ∧ − r_53_post + r_53_post ≤ 0 ∧ r_53_post − r_53_post ≤ 0 ∧ − r_53_0 + r_53_0 ≤ 0 ∧ r_53_0 − r_53_0 ≤ 0 ∧ − r_161_post + r_161_post ≤ 0 ∧ r_161_post − r_161_post ≤ 0 ∧ − r_161_0 + r_161_0 ≤ 0 ∧ r_161_0 − r_161_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 ≤ 0 ∧ − nondet_12_post + nondet_12_post ≤ 0 ∧ nondet_12_post − nondet_12_post ≤ 0 ∧ − nondet_12_1 + nondet_12_1 ≤ 0 ∧ nondet_12_1 − nondet_12_1 ≤ 0 ∧ − nondet_12_0 + nondet_12_0 ≤ 0 ∧ nondet_12_0 − nondet_12_0 ≤ 0 ∧ − lt_37_post + lt_37_post ≤ 0 ∧ lt_37_post − lt_37_post ≤ 0 ∧ − lt_37_1 + lt_37_1 ≤ 0 ∧ lt_37_1 − lt_37_1 ≤ 0 ∧ − lt_37_0 + lt_37_0 ≤ 0 ∧ lt_37_0 − lt_37_0 ≤ 0 ∧ − lt_36_post + lt_36_post ≤ 0 ∧ lt_36_post − lt_36_post ≤ 0 ∧ − lt_36_0 + lt_36_0 ≤ 0 ∧ lt_36_0 − lt_36_0 ≤ 0 ∧ − lt_237_post + lt_237_post ≤ 0 ∧ lt_237_post − lt_237_post ≤ 0 ∧ − lt_237_0 + lt_237_0 ≤ 0 ∧ lt_237_0 − lt_237_0 ≤ 0 ∧ − length_43_post + length_43_post ≤ 0 ∧ length_43_post − length_43_post ≤ 0 ∧ − length_43_0 + length_43_0 ≤ 0 ∧ length_43_0 − length_43_0 ≤ 0 ∧ − len_246_post + len_246_post ≤ 0 ∧ len_246_post − len_246_post ≤ 0 ∧ − len_246_0 + len_246_0 ≤ 0 ∧ len_246_0 − len_246_0 ≤ 0 ∧ − len_180_post + len_180_post ≤ 0 ∧ len_180_post − len_180_post ≤ 0 ∧ − len_180_0 + len_180_0 ≤ 0 ∧ len_180_0 − len_180_0 ≤ 0 ∧ − i_44_post + i_44_post ≤ 0 ∧ i_44_post − i_44_post ≤ 0 ∧ − i_44_0 + i_44_0 ≤ 0 ∧ i_44_0 − i_44_0 ≤ 0 ∧ − i_125_post + i_125_post ≤ 0 ∧ i_125_post − i_125_post ≤ 0 ∧ − i_125_0 + i_125_0 ≤ 0 ∧ i_125_0 − i_125_0 ≤ 0 ∧ − i_108_post + i_108_post ≤ 0 ∧ i_108_post − i_108_post ≤ 0 ∧ − i_108_0 + i_108_0 ≤ 0 ∧ i_108_0 − i_108_0 ≤ 0 ∧ − head_46_post + head_46_post ≤ 0 ∧ head_46_post − head_46_post ≤ 0 ∧ − head_46_0 + head_46_0 ≤ 0 ∧ head_46_0 − head_46_0 ≤ 0 ∧ − fmt_31_post + fmt_31_post ≤ 0 ∧ fmt_31_post − fmt_31_post ≤ 0 ∧ − fmt_31_4 + fmt_31_4 ≤ 0 ∧ fmt_31_4 − fmt_31_4 ≤ 0 ∧ − fmt_31_3 + fmt_31_3 ≤ 0 ∧ fmt_31_3 − fmt_31_3 ≤ 0 ∧ − fmt_31_2 + fmt_31_2 ≤ 0 ∧ fmt_31_2 − fmt_31_2 ≤ 0 ∧ − fmt_31_1 + fmt_31_1 ≤ 0 ∧ fmt_31_1 − fmt_31_1 ≤ 0 ∧ − fmt_31_0 + fmt_31_0 ≤ 0 ∧ fmt_31_0 − fmt_31_0 ≤ 0 ∧ − ct_17_post + ct_17_post ≤ 0 ∧ ct_17_post − ct_17_post ≤ 0 ∧ − ct_17_2 + ct_17_2 ≤ 0 ∧ ct_17_2 − ct_17_2 ≤ 0 ∧ − ct_17_1 + ct_17_1 ≤ 0 ∧ ct_17_1 − ct_17_1 ≤ 0 ∧ − ct_17_0 + ct_17_0 ≤ 0 ∧ ct_17_0 − ct_17_0 ≤ 0 ∧ − a_328_post + a_328_post ≤ 0 ∧ a_328_post − a_328_post ≤ 0 ∧ − a_328_0 + a_328_0 ≤ 0 ∧ a_328_0 − a_328_0 ≤ 0 ∧ − a_305_post + a_305_post ≤ 0 ∧ a_305_post − a_305_post ≤ 0 ∧ − a_305_0 + a_305_0 ≤ 0 ∧ a_305_0 − a_305_0 ≤ 0 ∧ − a_283_post + a_283_post ≤ 0 ∧ a_283_post − a_283_post ≤ 0 ∧ − a_283_0 + a_283_0 ≤ 0 ∧ a_283_0 − a_283_0 ≤ 0 ∧ − a_26_post + a_26_post ≤ 0 ∧ a_26_post − a_26_post ≤ 0 ∧ − a_26_1 + a_26_1 ≤ 0 ∧ a_26_1 − a_26_1 ≤ 0 ∧ − a_26_0 + a_26_0 ≤ 0 ∧ a_26_0 − a_26_0 ≤ 0 ∧ − a_247_post + a_247_post ≤ 0 ∧ a_247_post − a_247_post ≤ 0 ∧ − a_247_0 + a_247_0 ≤ 0 ∧ a_247_0 − a_247_0 ≤ 0 ∧ − a_197_post + a_197_post ≤ 0 ∧ a_197_post − a_197_post ≤ 0 ∧ − a_197_0 + a_197_0 ≤ 0 ∧ a_197_0 − a_197_0 ≤ 0 ∧ − a_146_0 + a_146_0 ≤ 0 ∧ a_146_0 − a_146_0 ≤ 0 | |
| 58 | 92 | 59: | 1 + x_14_0 ≤ 0 ∧ − y_19_post + y_19_post ≤ 0 ∧ y_19_post − y_19_post ≤ 0 ∧ − y_19_2 + y_19_2 ≤ 0 ∧ y_19_2 − y_19_2 ≤ 0 ∧ − y_19_1 + y_19_1 ≤ 0 ∧ y_19_1 − y_19_1 ≤ 0 ∧ − y_19_0 + y_19_0 ≤ 0 ∧ y_19_0 − y_19_0 ≤ 0 ∧ − x_SLAM_f_18_post + x_SLAM_f_18_post ≤ 0 ∧ x_SLAM_f_18_post − x_SLAM_f_18_post ≤ 0 ∧ − x_SLAM_f_18_2 + x_SLAM_f_18_2 ≤ 0 ∧ x_SLAM_f_18_2 − x_SLAM_f_18_2 ≤ 0 ∧ − x_SLAM_f_18_1 + x_SLAM_f_18_1 ≤ 0 ∧ x_SLAM_f_18_1 − x_SLAM_f_18_1 ≤ 0 ∧ − x_SLAM_f_18_0 + x_SLAM_f_18_0 ≤ 0 ∧ x_SLAM_f_18_0 − x_SLAM_f_18_0 ≤ 0 ∧ − x_34_post + x_34_post ≤ 0 ∧ x_34_post − x_34_post ≤ 0 ∧ − x_34_1 + x_34_1 ≤ 0 ∧ x_34_1 − x_34_1 ≤ 0 ∧ − x_34_0 + x_34_0 ≤ 0 ∧ x_34_0 − x_34_0 ≤ 0 ∧ − x_28_post + x_28_post ≤ 0 ∧ x_28_post − x_28_post ≤ 0 ∧ − x_28_1 + x_28_1 ≤ 0 ∧ x_28_1 − x_28_1 ≤ 0 ∧ − x_28_0 + x_28_0 ≤ 0 ∧ x_28_0 − x_28_0 ≤ 0 ∧ − x_238_post + x_238_post ≤ 0 ∧ x_238_post − x_238_post ≤ 0 ∧ − x_238_0 + x_238_0 ≤ 0 ∧ x_238_0 − x_238_0 ≤ 0 ∧ − x_20_post + x_20_post ≤ 0 ∧ x_20_post − x_20_post ≤ 0 ∧ − x_20_2 + x_20_2 ≤ 0 ∧ x_20_2 − x_20_2 ≤ 0 ∧ − x_20_1 + x_20_1 ≤ 0 ∧ x_20_1 − x_20_1 ≤ 0 ∧ − x_20_0 + x_20_0 ≤ 0 ∧ x_20_0 − x_20_0 ≤ 0 ∧ − x_177_post + x_177_post ≤ 0 ∧ x_177_post − x_177_post ≤ 0 ∧ − x_177_0 + x_177_0 ≤ 0 ∧ x_177_0 − x_177_0 ≤ 0 ∧ − x_16_post + x_16_post ≤ 0 ∧ x_16_post − x_16_post ≤ 0 ∧ − x_16_1 + x_16_1 ≤ 0 ∧ x_16_1 − x_16_1 ≤ 0 ∧ − x_16_0 + x_16_0 ≤ 0 ∧ x_16_0 − x_16_0 ≤ 0 ∧ − x_14_post + x_14_post ≤ 0 ∧ x_14_post − x_14_post ≤ 0 ∧ − x_14_0 + x_14_0 ≤ 0 ∧ x_14_0 − x_14_0 ≤ 0 ∧ − tmp_48_post + tmp_48_post ≤ 0 ∧ tmp_48_post − tmp_48_post ≤ 0 ∧ − tmp_48_0 + tmp_48_0 ≤ 0 ∧ tmp_48_0 − tmp_48_0 ≤ 0 ∧ − temp_49_post + temp_49_post ≤ 0 ∧ temp_49_post − temp_49_post ≤ 0 ∧ − temp_49_0 + temp_49_0 ≤ 0 ∧ temp_49_0 − temp_49_0 ≤ 0 ∧ − temp0_45_post + temp0_45_post ≤ 0 ∧ temp0_45_post − temp0_45_post ≤ 0 ∧ − temp0_45_1 + temp0_45_1 ≤ 0 ∧ temp0_45_1 − temp0_45_1 ≤ 0 ∧ − temp0_45_0 + temp0_45_0 ≤ 0 ∧ temp0_45_0 − temp0_45_0 ≤ 0 ∧ − temp0_32_post + temp0_32_post ≤ 0 ∧ temp0_32_post − temp0_32_post ≤ 0 ∧ − temp0_32_4 + temp0_32_4 ≤ 0 ∧ temp0_32_4 − temp0_32_4 ≤ 0 ∧ − temp0_32_3 + temp0_32_3 ≤ 0 ∧ temp0_32_3 − temp0_32_3 ≤ 0 ∧ − temp0_32_2 + temp0_32_2 ≤ 0 ∧ temp0_32_2 − temp0_32_2 ≤ 0 ∧ − temp0_32_1 + temp0_32_1 ≤ 0 ∧ temp0_32_1 − temp0_32_1 ≤ 0 ∧ − temp0_32_0 + temp0_32_0 ≤ 0 ∧ temp0_32_0 − temp0_32_0 ≤ 0 ∧ − temp0_15_0 + temp0_15_0 ≤ 0 ∧ temp0_15_0 − temp0_15_0 ≤ 0 ∧ − t_23_post + t_23_post ≤ 0 ∧ t_23_post − t_23_post ≤ 0 ∧ − t_23_1 + t_23_1 ≤ 0 ∧ t_23_1 − t_23_1 ≤ 0 ∧ − t_23_0 + t_23_0 ≤ 0 ∧ t_23_0 − t_23_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_post + result_dot_printf_sdv_special_RETURN_VALUE_41_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_post − result_dot_printf_sdv_special_RETURN_VALUE_41_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_1 + result_dot_printf_sdv_special_RETURN_VALUE_41_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_1 − result_dot_printf_sdv_special_RETURN_VALUE_41_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_0 + result_dot_printf_sdv_special_RETURN_VALUE_41_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_0 − result_dot_printf_sdv_special_RETURN_VALUE_41_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_post + result_dot_printf_sdv_special_RETURN_VALUE_38_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_post − result_dot_printf_sdv_special_RETURN_VALUE_38_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_1 + result_dot_printf_sdv_special_RETURN_VALUE_38_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_1 − result_dot_printf_sdv_special_RETURN_VALUE_38_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_0 + result_dot_printf_sdv_special_RETURN_VALUE_38_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_0 − result_dot_printf_sdv_special_RETURN_VALUE_38_0 ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_post + result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_post − result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_1 + result_dot_nondet_sdv_special_RETURN_VALUE_13_1 ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_1 − result_dot_nondet_sdv_special_RETURN_VALUE_13_1 ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_0 + result_dot_nondet_sdv_special_RETURN_VALUE_13_0 ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_0 − result_dot_nondet_sdv_special_RETURN_VALUE_13_0 ≤ 0 ∧ − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post + result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post ≤ 0 ∧ result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post ≤ 0 ∧ − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 + result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 ≤ 0 ∧ result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 ≤ 0 ∧ − result_11_post + result_11_post ≤ 0 ∧ result_11_post − result_11_post ≤ 0 ∧ − result_11_6 + result_11_6 ≤ 0 ∧ result_11_6 − result_11_6 ≤ 0 ∧ − result_11_5 + result_11_5 ≤ 0 ∧ result_11_5 − result_11_5 ≤ 0 ∧ − result_11_4 + result_11_4 ≤ 0 ∧ result_11_4 − result_11_4 ≤ 0 ∧ − result_11_3 + result_11_3 ≤ 0 ∧ result_11_3 − result_11_3 ≤ 0 ∧ − result_11_2 + result_11_2 ≤ 0 ∧ result_11_2 − result_11_2 ≤ 0 ∧ − result_11_1 + result_11_1 ≤ 0 ∧ result_11_1 − result_11_1 ≤ 0 ∧ − result_11_0 + result_11_0 ≤ 0 ∧ result_11_0 − result_11_0 ≤ 0 ∧ − rcd_72_post + rcd_72_post ≤ 0 ∧ rcd_72_post − rcd_72_post ≤ 0 ∧ − rcd_72_0 + rcd_72_0 ≤ 0 ∧ rcd_72_0 − rcd_72_0 ≤ 0 ∧ − rcd_102_post + rcd_102_post ≤ 0 ∧ rcd_102_post − rcd_102_post ≤ 0 ∧ − rcd_102_0 + rcd_102_0 ≤ 0 ∧ rcd_102_0 − rcd_102_0 ≤ 0 ∧ − r_53_post + r_53_post ≤ 0 ∧ r_53_post − r_53_post ≤ 0 ∧ − r_53_0 + r_53_0 ≤ 0 ∧ r_53_0 − r_53_0 ≤ 0 ∧ − r_161_post + r_161_post ≤ 0 ∧ r_161_post − r_161_post ≤ 0 ∧ − r_161_0 + r_161_0 ≤ 0 ∧ r_161_0 − r_161_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 ≤ 0 ∧ − nondet_12_post + nondet_12_post ≤ 0 ∧ nondet_12_post − nondet_12_post ≤ 0 ∧ − nondet_12_1 + nondet_12_1 ≤ 0 ∧ nondet_12_1 − nondet_12_1 ≤ 0 ∧ − nondet_12_0 + nondet_12_0 ≤ 0 ∧ nondet_12_0 − nondet_12_0 ≤ 0 ∧ − lt_37_post + lt_37_post ≤ 0 ∧ lt_37_post − lt_37_post ≤ 0 ∧ − lt_37_1 + lt_37_1 ≤ 0 ∧ lt_37_1 − lt_37_1 ≤ 0 ∧ − lt_37_0 + lt_37_0 ≤ 0 ∧ lt_37_0 − lt_37_0 ≤ 0 ∧ − lt_36_post + lt_36_post ≤ 0 ∧ lt_36_post − lt_36_post ≤ 0 ∧ − lt_36_0 + lt_36_0 ≤ 0 ∧ lt_36_0 − lt_36_0 ≤ 0 ∧ − lt_237_post + lt_237_post ≤ 0 ∧ lt_237_post − lt_237_post ≤ 0 ∧ − lt_237_0 + lt_237_0 ≤ 0 ∧ lt_237_0 − lt_237_0 ≤ 0 ∧ − length_43_post + length_43_post ≤ 0 ∧ length_43_post − length_43_post ≤ 0 ∧ − length_43_0 + length_43_0 ≤ 0 ∧ length_43_0 − length_43_0 ≤ 0 ∧ − len_246_post + len_246_post ≤ 0 ∧ len_246_post − len_246_post ≤ 0 ∧ − len_246_0 + len_246_0 ≤ 0 ∧ len_246_0 − len_246_0 ≤ 0 ∧ − len_180_post + len_180_post ≤ 0 ∧ len_180_post − len_180_post ≤ 0 ∧ − len_180_0 + len_180_0 ≤ 0 ∧ len_180_0 − len_180_0 ≤ 0 ∧ − i_44_post + i_44_post ≤ 0 ∧ i_44_post − i_44_post ≤ 0 ∧ − i_44_0 + i_44_0 ≤ 0 ∧ i_44_0 − i_44_0 ≤ 0 ∧ − i_125_post + i_125_post ≤ 0 ∧ i_125_post − i_125_post ≤ 0 ∧ − i_125_0 + i_125_0 ≤ 0 ∧ i_125_0 − i_125_0 ≤ 0 ∧ − i_108_post + i_108_post ≤ 0 ∧ i_108_post − i_108_post ≤ 0 ∧ − i_108_0 + i_108_0 ≤ 0 ∧ i_108_0 − i_108_0 ≤ 0 ∧ − head_46_post + head_46_post ≤ 0 ∧ head_46_post − head_46_post ≤ 0 ∧ − head_46_0 + head_46_0 ≤ 0 ∧ head_46_0 − head_46_0 ≤ 0 ∧ − fmt_31_post + fmt_31_post ≤ 0 ∧ fmt_31_post − fmt_31_post ≤ 0 ∧ − fmt_31_4 + fmt_31_4 ≤ 0 ∧ fmt_31_4 − fmt_31_4 ≤ 0 ∧ − fmt_31_3 + fmt_31_3 ≤ 0 ∧ fmt_31_3 − fmt_31_3 ≤ 0 ∧ − fmt_31_2 + fmt_31_2 ≤ 0 ∧ fmt_31_2 − fmt_31_2 ≤ 0 ∧ − fmt_31_1 + fmt_31_1 ≤ 0 ∧ fmt_31_1 − fmt_31_1 ≤ 0 ∧ − fmt_31_0 + fmt_31_0 ≤ 0 ∧ fmt_31_0 − fmt_31_0 ≤ 0 ∧ − ct_17_post + ct_17_post ≤ 0 ∧ ct_17_post − ct_17_post ≤ 0 ∧ − ct_17_2 + ct_17_2 ≤ 0 ∧ ct_17_2 − ct_17_2 ≤ 0 ∧ − ct_17_1 + ct_17_1 ≤ 0 ∧ ct_17_1 − ct_17_1 ≤ 0 ∧ − ct_17_0 + ct_17_0 ≤ 0 ∧ ct_17_0 − ct_17_0 ≤ 0 ∧ − a_328_post + a_328_post ≤ 0 ∧ a_328_post − a_328_post ≤ 0 ∧ − a_328_0 + a_328_0 ≤ 0 ∧ a_328_0 − a_328_0 ≤ 0 ∧ − a_305_post + a_305_post ≤ 0 ∧ a_305_post − a_305_post ≤ 0 ∧ − a_305_0 + a_305_0 ≤ 0 ∧ a_305_0 − a_305_0 ≤ 0 ∧ − a_283_post + a_283_post ≤ 0 ∧ a_283_post − a_283_post ≤ 0 ∧ − a_283_0 + a_283_0 ≤ 0 ∧ a_283_0 − a_283_0 ≤ 0 ∧ − a_26_post + a_26_post ≤ 0 ∧ a_26_post − a_26_post ≤ 0 ∧ − a_26_1 + a_26_1 ≤ 0 ∧ a_26_1 − a_26_1 ≤ 0 ∧ − a_26_0 + a_26_0 ≤ 0 ∧ a_26_0 − a_26_0 ≤ 0 ∧ − a_247_post + a_247_post ≤ 0 ∧ a_247_post − a_247_post ≤ 0 ∧ − a_247_0 + a_247_0 ≤ 0 ∧ a_247_0 − a_247_0 ≤ 0 ∧ − a_197_post + a_197_post ≤ 0 ∧ a_197_post − a_197_post ≤ 0 ∧ − a_197_0 + a_197_0 ≤ 0 ∧ a_197_0 − a_197_0 ≤ 0 ∧ − a_146_0 + a_146_0 ≤ 0 ∧ a_146_0 − a_146_0 ≤ 0 | |
| 59 | 93 | 60: | 1 + x_14_0 − y_19_0 ≤ 0 ∧ − y_19_post + y_19_post ≤ 0 ∧ y_19_post − y_19_post ≤ 0 ∧ − y_19_2 + y_19_2 ≤ 0 ∧ y_19_2 − y_19_2 ≤ 0 ∧ − y_19_1 + y_19_1 ≤ 0 ∧ y_19_1 − y_19_1 ≤ 0 ∧ − y_19_0 + y_19_0 ≤ 0 ∧ y_19_0 − y_19_0 ≤ 0 ∧ − x_SLAM_f_18_post + x_SLAM_f_18_post ≤ 0 ∧ x_SLAM_f_18_post − x_SLAM_f_18_post ≤ 0 ∧ − x_SLAM_f_18_2 + x_SLAM_f_18_2 ≤ 0 ∧ x_SLAM_f_18_2 − x_SLAM_f_18_2 ≤ 0 ∧ − x_SLAM_f_18_1 + x_SLAM_f_18_1 ≤ 0 ∧ x_SLAM_f_18_1 − x_SLAM_f_18_1 ≤ 0 ∧ − x_SLAM_f_18_0 + x_SLAM_f_18_0 ≤ 0 ∧ x_SLAM_f_18_0 − x_SLAM_f_18_0 ≤ 0 ∧ − x_34_post + x_34_post ≤ 0 ∧ x_34_post − x_34_post ≤ 0 ∧ − x_34_1 + x_34_1 ≤ 0 ∧ x_34_1 − x_34_1 ≤ 0 ∧ − x_34_0 + x_34_0 ≤ 0 ∧ x_34_0 − x_34_0 ≤ 0 ∧ − x_28_post + x_28_post ≤ 0 ∧ x_28_post − x_28_post ≤ 0 ∧ − x_28_1 + x_28_1 ≤ 0 ∧ x_28_1 − x_28_1 ≤ 0 ∧ − x_28_0 + x_28_0 ≤ 0 ∧ x_28_0 − x_28_0 ≤ 0 ∧ − x_238_post + x_238_post ≤ 0 ∧ x_238_post − x_238_post ≤ 0 ∧ − x_238_0 + x_238_0 ≤ 0 ∧ x_238_0 − x_238_0 ≤ 0 ∧ − x_20_post + x_20_post ≤ 0 ∧ x_20_post − x_20_post ≤ 0 ∧ − x_20_2 + x_20_2 ≤ 0 ∧ x_20_2 − x_20_2 ≤ 0 ∧ − x_20_1 + x_20_1 ≤ 0 ∧ x_20_1 − x_20_1 ≤ 0 ∧ − x_20_0 + x_20_0 ≤ 0 ∧ x_20_0 − x_20_0 ≤ 0 ∧ − x_177_post + x_177_post ≤ 0 ∧ x_177_post − x_177_post ≤ 0 ∧ − x_177_0 + x_177_0 ≤ 0 ∧ x_177_0 − x_177_0 ≤ 0 ∧ − x_16_post + x_16_post ≤ 0 ∧ x_16_post − x_16_post ≤ 0 ∧ − x_16_1 + x_16_1 ≤ 0 ∧ x_16_1 − x_16_1 ≤ 0 ∧ − x_16_0 + x_16_0 ≤ 0 ∧ x_16_0 − x_16_0 ≤ 0 ∧ − x_14_post + x_14_post ≤ 0 ∧ x_14_post − x_14_post ≤ 0 ∧ − x_14_0 + x_14_0 ≤ 0 ∧ x_14_0 − x_14_0 ≤ 0 ∧ − tmp_48_post + tmp_48_post ≤ 0 ∧ tmp_48_post − tmp_48_post ≤ 0 ∧ − tmp_48_0 + tmp_48_0 ≤ 0 ∧ tmp_48_0 − tmp_48_0 ≤ 0 ∧ − temp_49_post + temp_49_post ≤ 0 ∧ temp_49_post − temp_49_post ≤ 0 ∧ − temp_49_0 + temp_49_0 ≤ 0 ∧ temp_49_0 − temp_49_0 ≤ 0 ∧ − temp0_45_post + temp0_45_post ≤ 0 ∧ temp0_45_post − temp0_45_post ≤ 0 ∧ − temp0_45_1 + temp0_45_1 ≤ 0 ∧ temp0_45_1 − temp0_45_1 ≤ 0 ∧ − temp0_45_0 + temp0_45_0 ≤ 0 ∧ temp0_45_0 − temp0_45_0 ≤ 0 ∧ − temp0_32_post + temp0_32_post ≤ 0 ∧ temp0_32_post − temp0_32_post ≤ 0 ∧ − temp0_32_4 + temp0_32_4 ≤ 0 ∧ temp0_32_4 − temp0_32_4 ≤ 0 ∧ − temp0_32_3 + temp0_32_3 ≤ 0 ∧ temp0_32_3 − temp0_32_3 ≤ 0 ∧ − temp0_32_2 + temp0_32_2 ≤ 0 ∧ temp0_32_2 − temp0_32_2 ≤ 0 ∧ − temp0_32_1 + temp0_32_1 ≤ 0 ∧ temp0_32_1 − temp0_32_1 ≤ 0 ∧ − temp0_32_0 + temp0_32_0 ≤ 0 ∧ temp0_32_0 − temp0_32_0 ≤ 0 ∧ − temp0_15_0 + temp0_15_0 ≤ 0 ∧ temp0_15_0 − temp0_15_0 ≤ 0 ∧ − t_23_post + t_23_post ≤ 0 ∧ t_23_post − t_23_post ≤ 0 ∧ − t_23_1 + t_23_1 ≤ 0 ∧ t_23_1 − t_23_1 ≤ 0 ∧ − t_23_0 + t_23_0 ≤ 0 ∧ t_23_0 − t_23_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_post + result_dot_printf_sdv_special_RETURN_VALUE_41_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_post − result_dot_printf_sdv_special_RETURN_VALUE_41_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_1 + result_dot_printf_sdv_special_RETURN_VALUE_41_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_1 − result_dot_printf_sdv_special_RETURN_VALUE_41_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_0 + result_dot_printf_sdv_special_RETURN_VALUE_41_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_0 − result_dot_printf_sdv_special_RETURN_VALUE_41_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_post + result_dot_printf_sdv_special_RETURN_VALUE_38_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_post − result_dot_printf_sdv_special_RETURN_VALUE_38_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_1 + result_dot_printf_sdv_special_RETURN_VALUE_38_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_1 − result_dot_printf_sdv_special_RETURN_VALUE_38_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_0 + result_dot_printf_sdv_special_RETURN_VALUE_38_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_0 − result_dot_printf_sdv_special_RETURN_VALUE_38_0 ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_post + result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_post − result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_1 + result_dot_nondet_sdv_special_RETURN_VALUE_13_1 ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_1 − result_dot_nondet_sdv_special_RETURN_VALUE_13_1 ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_0 + result_dot_nondet_sdv_special_RETURN_VALUE_13_0 ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_0 − result_dot_nondet_sdv_special_RETURN_VALUE_13_0 ≤ 0 ∧ − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post + result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post ≤ 0 ∧ result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post ≤ 0 ∧ − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 + result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 ≤ 0 ∧ result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 ≤ 0 ∧ − result_11_post + result_11_post ≤ 0 ∧ result_11_post − result_11_post ≤ 0 ∧ − result_11_6 + result_11_6 ≤ 0 ∧ result_11_6 − result_11_6 ≤ 0 ∧ − result_11_5 + result_11_5 ≤ 0 ∧ result_11_5 − result_11_5 ≤ 0 ∧ − result_11_4 + result_11_4 ≤ 0 ∧ result_11_4 − result_11_4 ≤ 0 ∧ − result_11_3 + result_11_3 ≤ 0 ∧ result_11_3 − result_11_3 ≤ 0 ∧ − result_11_2 + result_11_2 ≤ 0 ∧ result_11_2 − result_11_2 ≤ 0 ∧ − result_11_1 + result_11_1 ≤ 0 ∧ result_11_1 − result_11_1 ≤ 0 ∧ − result_11_0 + result_11_0 ≤ 0 ∧ result_11_0 − result_11_0 ≤ 0 ∧ − rcd_72_post + rcd_72_post ≤ 0 ∧ rcd_72_post − rcd_72_post ≤ 0 ∧ − rcd_72_0 + rcd_72_0 ≤ 0 ∧ rcd_72_0 − rcd_72_0 ≤ 0 ∧ − rcd_102_post + rcd_102_post ≤ 0 ∧ rcd_102_post − rcd_102_post ≤ 0 ∧ − rcd_102_0 + rcd_102_0 ≤ 0 ∧ rcd_102_0 − rcd_102_0 ≤ 0 ∧ − r_53_post + r_53_post ≤ 0 ∧ r_53_post − r_53_post ≤ 0 ∧ − r_53_0 + r_53_0 ≤ 0 ∧ r_53_0 − r_53_0 ≤ 0 ∧ − r_161_post + r_161_post ≤ 0 ∧ r_161_post − r_161_post ≤ 0 ∧ − r_161_0 + r_161_0 ≤ 0 ∧ r_161_0 − r_161_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 ≤ 0 ∧ − nondet_12_post + nondet_12_post ≤ 0 ∧ nondet_12_post − nondet_12_post ≤ 0 ∧ − nondet_12_1 + nondet_12_1 ≤ 0 ∧ nondet_12_1 − nondet_12_1 ≤ 0 ∧ − nondet_12_0 + nondet_12_0 ≤ 0 ∧ nondet_12_0 − nondet_12_0 ≤ 0 ∧ − lt_37_post + lt_37_post ≤ 0 ∧ lt_37_post − lt_37_post ≤ 0 ∧ − lt_37_1 + lt_37_1 ≤ 0 ∧ lt_37_1 − lt_37_1 ≤ 0 ∧ − lt_37_0 + lt_37_0 ≤ 0 ∧ lt_37_0 − lt_37_0 ≤ 0 ∧ − lt_36_post + lt_36_post ≤ 0 ∧ lt_36_post − lt_36_post ≤ 0 ∧ − lt_36_0 + lt_36_0 ≤ 0 ∧ lt_36_0 − lt_36_0 ≤ 0 ∧ − lt_237_post + lt_237_post ≤ 0 ∧ lt_237_post − lt_237_post ≤ 0 ∧ − lt_237_0 + lt_237_0 ≤ 0 ∧ lt_237_0 − lt_237_0 ≤ 0 ∧ − length_43_post + length_43_post ≤ 0 ∧ length_43_post − length_43_post ≤ 0 ∧ − length_43_0 + length_43_0 ≤ 0 ∧ length_43_0 − length_43_0 ≤ 0 ∧ − len_246_post + len_246_post ≤ 0 ∧ len_246_post − len_246_post ≤ 0 ∧ − len_246_0 + len_246_0 ≤ 0 ∧ len_246_0 − len_246_0 ≤ 0 ∧ − len_180_post + len_180_post ≤ 0 ∧ len_180_post − len_180_post ≤ 0 ∧ − len_180_0 + len_180_0 ≤ 0 ∧ len_180_0 − len_180_0 ≤ 0 ∧ − i_44_post + i_44_post ≤ 0 ∧ i_44_post − i_44_post ≤ 0 ∧ − i_44_0 + i_44_0 ≤ 0 ∧ i_44_0 − i_44_0 ≤ 0 ∧ − i_125_post + i_125_post ≤ 0 ∧ i_125_post − i_125_post ≤ 0 ∧ − i_125_0 + i_125_0 ≤ 0 ∧ i_125_0 − i_125_0 ≤ 0 ∧ − i_108_post + i_108_post ≤ 0 ∧ i_108_post − i_108_post ≤ 0 ∧ − i_108_0 + i_108_0 ≤ 0 ∧ i_108_0 − i_108_0 ≤ 0 ∧ − head_46_post + head_46_post ≤ 0 ∧ head_46_post − head_46_post ≤ 0 ∧ − head_46_0 + head_46_0 ≤ 0 ∧ head_46_0 − head_46_0 ≤ 0 ∧ − fmt_31_post + fmt_31_post ≤ 0 ∧ fmt_31_post − fmt_31_post ≤ 0 ∧ − fmt_31_4 + fmt_31_4 ≤ 0 ∧ fmt_31_4 − fmt_31_4 ≤ 0 ∧ − fmt_31_3 + fmt_31_3 ≤ 0 ∧ fmt_31_3 − fmt_31_3 ≤ 0 ∧ − fmt_31_2 + fmt_31_2 ≤ 0 ∧ fmt_31_2 − fmt_31_2 ≤ 0 ∧ − fmt_31_1 + fmt_31_1 ≤ 0 ∧ fmt_31_1 − fmt_31_1 ≤ 0 ∧ − fmt_31_0 + fmt_31_0 ≤ 0 ∧ fmt_31_0 − fmt_31_0 ≤ 0 ∧ − ct_17_post + ct_17_post ≤ 0 ∧ ct_17_post − ct_17_post ≤ 0 ∧ − ct_17_2 + ct_17_2 ≤ 0 ∧ ct_17_2 − ct_17_2 ≤ 0 ∧ − ct_17_1 + ct_17_1 ≤ 0 ∧ ct_17_1 − ct_17_1 ≤ 0 ∧ − ct_17_0 + ct_17_0 ≤ 0 ∧ ct_17_0 − ct_17_0 ≤ 0 ∧ − a_328_post + a_328_post ≤ 0 ∧ a_328_post − a_328_post ≤ 0 ∧ − a_328_0 + a_328_0 ≤ 0 ∧ a_328_0 − a_328_0 ≤ 0 ∧ − a_305_post + a_305_post ≤ 0 ∧ a_305_post − a_305_post ≤ 0 ∧ − a_305_0 + a_305_0 ≤ 0 ∧ a_305_0 − a_305_0 ≤ 0 ∧ − a_283_post + a_283_post ≤ 0 ∧ a_283_post − a_283_post ≤ 0 ∧ − a_283_0 + a_283_0 ≤ 0 ∧ a_283_0 − a_283_0 ≤ 0 ∧ − a_26_post + a_26_post ≤ 0 ∧ a_26_post − a_26_post ≤ 0 ∧ − a_26_1 + a_26_1 ≤ 0 ∧ a_26_1 − a_26_1 ≤ 0 ∧ − a_26_0 + a_26_0 ≤ 0 ∧ a_26_0 − a_26_0 ≤ 0 ∧ − a_247_post + a_247_post ≤ 0 ∧ a_247_post − a_247_post ≤ 0 ∧ − a_247_0 + a_247_0 ≤ 0 ∧ a_247_0 − a_247_0 ≤ 0 ∧ − a_197_post + a_197_post ≤ 0 ∧ a_197_post − a_197_post ≤ 0 ∧ − a_197_0 + a_197_0 ≤ 0 ∧ a_197_0 − a_197_0 ≤ 0 ∧ − a_146_0 + a_146_0 ≤ 0 ∧ a_146_0 − a_146_0 ≤ 0 | |
| 59 | 94 | 60: | 1 − x_14_0 + y_19_0 ≤ 0 ∧ − y_19_post + y_19_post ≤ 0 ∧ y_19_post − y_19_post ≤ 0 ∧ − y_19_2 + y_19_2 ≤ 0 ∧ y_19_2 − y_19_2 ≤ 0 ∧ − y_19_1 + y_19_1 ≤ 0 ∧ y_19_1 − y_19_1 ≤ 0 ∧ − y_19_0 + y_19_0 ≤ 0 ∧ y_19_0 − y_19_0 ≤ 0 ∧ − x_SLAM_f_18_post + x_SLAM_f_18_post ≤ 0 ∧ x_SLAM_f_18_post − x_SLAM_f_18_post ≤ 0 ∧ − x_SLAM_f_18_2 + x_SLAM_f_18_2 ≤ 0 ∧ x_SLAM_f_18_2 − x_SLAM_f_18_2 ≤ 0 ∧ − x_SLAM_f_18_1 + x_SLAM_f_18_1 ≤ 0 ∧ x_SLAM_f_18_1 − x_SLAM_f_18_1 ≤ 0 ∧ − x_SLAM_f_18_0 + x_SLAM_f_18_0 ≤ 0 ∧ x_SLAM_f_18_0 − x_SLAM_f_18_0 ≤ 0 ∧ − x_34_post + x_34_post ≤ 0 ∧ x_34_post − x_34_post ≤ 0 ∧ − x_34_1 + x_34_1 ≤ 0 ∧ x_34_1 − x_34_1 ≤ 0 ∧ − x_34_0 + x_34_0 ≤ 0 ∧ x_34_0 − x_34_0 ≤ 0 ∧ − x_28_post + x_28_post ≤ 0 ∧ x_28_post − x_28_post ≤ 0 ∧ − x_28_1 + x_28_1 ≤ 0 ∧ x_28_1 − x_28_1 ≤ 0 ∧ − x_28_0 + x_28_0 ≤ 0 ∧ x_28_0 − x_28_0 ≤ 0 ∧ − x_238_post + x_238_post ≤ 0 ∧ x_238_post − x_238_post ≤ 0 ∧ − x_238_0 + x_238_0 ≤ 0 ∧ x_238_0 − x_238_0 ≤ 0 ∧ − x_20_post + x_20_post ≤ 0 ∧ x_20_post − x_20_post ≤ 0 ∧ − x_20_2 + x_20_2 ≤ 0 ∧ x_20_2 − x_20_2 ≤ 0 ∧ − x_20_1 + x_20_1 ≤ 0 ∧ x_20_1 − x_20_1 ≤ 0 ∧ − x_20_0 + x_20_0 ≤ 0 ∧ x_20_0 − x_20_0 ≤ 0 ∧ − x_177_post + x_177_post ≤ 0 ∧ x_177_post − x_177_post ≤ 0 ∧ − x_177_0 + x_177_0 ≤ 0 ∧ x_177_0 − x_177_0 ≤ 0 ∧ − x_16_post + x_16_post ≤ 0 ∧ x_16_post − x_16_post ≤ 0 ∧ − x_16_1 + x_16_1 ≤ 0 ∧ x_16_1 − x_16_1 ≤ 0 ∧ − x_16_0 + x_16_0 ≤ 0 ∧ x_16_0 − x_16_0 ≤ 0 ∧ − x_14_post + x_14_post ≤ 0 ∧ x_14_post − x_14_post ≤ 0 ∧ − x_14_0 + x_14_0 ≤ 0 ∧ x_14_0 − x_14_0 ≤ 0 ∧ − tmp_48_post + tmp_48_post ≤ 0 ∧ tmp_48_post − tmp_48_post ≤ 0 ∧ − tmp_48_0 + tmp_48_0 ≤ 0 ∧ tmp_48_0 − tmp_48_0 ≤ 0 ∧ − temp_49_post + temp_49_post ≤ 0 ∧ temp_49_post − temp_49_post ≤ 0 ∧ − temp_49_0 + temp_49_0 ≤ 0 ∧ temp_49_0 − temp_49_0 ≤ 0 ∧ − temp0_45_post + temp0_45_post ≤ 0 ∧ temp0_45_post − temp0_45_post ≤ 0 ∧ − temp0_45_1 + temp0_45_1 ≤ 0 ∧ temp0_45_1 − temp0_45_1 ≤ 0 ∧ − temp0_45_0 + temp0_45_0 ≤ 0 ∧ temp0_45_0 − temp0_45_0 ≤ 0 ∧ − temp0_32_post + temp0_32_post ≤ 0 ∧ temp0_32_post − temp0_32_post ≤ 0 ∧ − temp0_32_4 + temp0_32_4 ≤ 0 ∧ temp0_32_4 − temp0_32_4 ≤ 0 ∧ − temp0_32_3 + temp0_32_3 ≤ 0 ∧ temp0_32_3 − temp0_32_3 ≤ 0 ∧ − temp0_32_2 + temp0_32_2 ≤ 0 ∧ temp0_32_2 − temp0_32_2 ≤ 0 ∧ − temp0_32_1 + temp0_32_1 ≤ 0 ∧ temp0_32_1 − temp0_32_1 ≤ 0 ∧ − temp0_32_0 + temp0_32_0 ≤ 0 ∧ temp0_32_0 − temp0_32_0 ≤ 0 ∧ − temp0_15_0 + temp0_15_0 ≤ 0 ∧ temp0_15_0 − temp0_15_0 ≤ 0 ∧ − t_23_post + t_23_post ≤ 0 ∧ t_23_post − t_23_post ≤ 0 ∧ − t_23_1 + t_23_1 ≤ 0 ∧ t_23_1 − t_23_1 ≤ 0 ∧ − t_23_0 + t_23_0 ≤ 0 ∧ t_23_0 − t_23_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_post + result_dot_printf_sdv_special_RETURN_VALUE_41_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_post − result_dot_printf_sdv_special_RETURN_VALUE_41_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_1 + result_dot_printf_sdv_special_RETURN_VALUE_41_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_1 − result_dot_printf_sdv_special_RETURN_VALUE_41_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_0 + result_dot_printf_sdv_special_RETURN_VALUE_41_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_0 − result_dot_printf_sdv_special_RETURN_VALUE_41_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_post + result_dot_printf_sdv_special_RETURN_VALUE_38_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_post − result_dot_printf_sdv_special_RETURN_VALUE_38_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_1 + result_dot_printf_sdv_special_RETURN_VALUE_38_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_1 − result_dot_printf_sdv_special_RETURN_VALUE_38_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_0 + result_dot_printf_sdv_special_RETURN_VALUE_38_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_0 − result_dot_printf_sdv_special_RETURN_VALUE_38_0 ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_post + result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_post − result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_1 + result_dot_nondet_sdv_special_RETURN_VALUE_13_1 ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_1 − result_dot_nondet_sdv_special_RETURN_VALUE_13_1 ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_0 + result_dot_nondet_sdv_special_RETURN_VALUE_13_0 ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_0 − result_dot_nondet_sdv_special_RETURN_VALUE_13_0 ≤ 0 ∧ − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post + result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post ≤ 0 ∧ result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post ≤ 0 ∧ − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 + result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 ≤ 0 ∧ result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 ≤ 0 ∧ − result_11_post + result_11_post ≤ 0 ∧ result_11_post − result_11_post ≤ 0 ∧ − result_11_6 + result_11_6 ≤ 0 ∧ result_11_6 − result_11_6 ≤ 0 ∧ − result_11_5 + result_11_5 ≤ 0 ∧ result_11_5 − result_11_5 ≤ 0 ∧ − result_11_4 + result_11_4 ≤ 0 ∧ result_11_4 − result_11_4 ≤ 0 ∧ − result_11_3 + result_11_3 ≤ 0 ∧ result_11_3 − result_11_3 ≤ 0 ∧ − result_11_2 + result_11_2 ≤ 0 ∧ result_11_2 − result_11_2 ≤ 0 ∧ − result_11_1 + result_11_1 ≤ 0 ∧ result_11_1 − result_11_1 ≤ 0 ∧ − result_11_0 + result_11_0 ≤ 0 ∧ result_11_0 − result_11_0 ≤ 0 ∧ − rcd_72_post + rcd_72_post ≤ 0 ∧ rcd_72_post − rcd_72_post ≤ 0 ∧ − rcd_72_0 + rcd_72_0 ≤ 0 ∧ rcd_72_0 − rcd_72_0 ≤ 0 ∧ − rcd_102_post + rcd_102_post ≤ 0 ∧ rcd_102_post − rcd_102_post ≤ 0 ∧ − rcd_102_0 + rcd_102_0 ≤ 0 ∧ rcd_102_0 − rcd_102_0 ≤ 0 ∧ − r_53_post + r_53_post ≤ 0 ∧ r_53_post − r_53_post ≤ 0 ∧ − r_53_0 + r_53_0 ≤ 0 ∧ r_53_0 − r_53_0 ≤ 0 ∧ − r_161_post + r_161_post ≤ 0 ∧ r_161_post − r_161_post ≤ 0 ∧ − r_161_0 + r_161_0 ≤ 0 ∧ r_161_0 − r_161_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 ≤ 0 ∧ − nondet_12_post + nondet_12_post ≤ 0 ∧ nondet_12_post − nondet_12_post ≤ 0 ∧ − nondet_12_1 + nondet_12_1 ≤ 0 ∧ nondet_12_1 − nondet_12_1 ≤ 0 ∧ − nondet_12_0 + nondet_12_0 ≤ 0 ∧ nondet_12_0 − nondet_12_0 ≤ 0 ∧ − lt_37_post + lt_37_post ≤ 0 ∧ lt_37_post − lt_37_post ≤ 0 ∧ − lt_37_1 + lt_37_1 ≤ 0 ∧ lt_37_1 − lt_37_1 ≤ 0 ∧ − lt_37_0 + lt_37_0 ≤ 0 ∧ lt_37_0 − lt_37_0 ≤ 0 ∧ − lt_36_post + lt_36_post ≤ 0 ∧ lt_36_post − lt_36_post ≤ 0 ∧ − lt_36_0 + lt_36_0 ≤ 0 ∧ lt_36_0 − lt_36_0 ≤ 0 ∧ − lt_237_post + lt_237_post ≤ 0 ∧ lt_237_post − lt_237_post ≤ 0 ∧ − lt_237_0 + lt_237_0 ≤ 0 ∧ lt_237_0 − lt_237_0 ≤ 0 ∧ − length_43_post + length_43_post ≤ 0 ∧ length_43_post − length_43_post ≤ 0 ∧ − length_43_0 + length_43_0 ≤ 0 ∧ length_43_0 − length_43_0 ≤ 0 ∧ − len_246_post + len_246_post ≤ 0 ∧ len_246_post − len_246_post ≤ 0 ∧ − len_246_0 + len_246_0 ≤ 0 ∧ len_246_0 − len_246_0 ≤ 0 ∧ − len_180_post + len_180_post ≤ 0 ∧ len_180_post − len_180_post ≤ 0 ∧ − len_180_0 + len_180_0 ≤ 0 ∧ len_180_0 − len_180_0 ≤ 0 ∧ − i_44_post + i_44_post ≤ 0 ∧ i_44_post − i_44_post ≤ 0 ∧ − i_44_0 + i_44_0 ≤ 0 ∧ i_44_0 − i_44_0 ≤ 0 ∧ − i_125_post + i_125_post ≤ 0 ∧ i_125_post − i_125_post ≤ 0 ∧ − i_125_0 + i_125_0 ≤ 0 ∧ i_125_0 − i_125_0 ≤ 0 ∧ − i_108_post + i_108_post ≤ 0 ∧ i_108_post − i_108_post ≤ 0 ∧ − i_108_0 + i_108_0 ≤ 0 ∧ i_108_0 − i_108_0 ≤ 0 ∧ − head_46_post + head_46_post ≤ 0 ∧ head_46_post − head_46_post ≤ 0 ∧ − head_46_0 + head_46_0 ≤ 0 ∧ head_46_0 − head_46_0 ≤ 0 ∧ − fmt_31_post + fmt_31_post ≤ 0 ∧ fmt_31_post − fmt_31_post ≤ 0 ∧ − fmt_31_4 + fmt_31_4 ≤ 0 ∧ fmt_31_4 − fmt_31_4 ≤ 0 ∧ − fmt_31_3 + fmt_31_3 ≤ 0 ∧ fmt_31_3 − fmt_31_3 ≤ 0 ∧ − fmt_31_2 + fmt_31_2 ≤ 0 ∧ fmt_31_2 − fmt_31_2 ≤ 0 ∧ − fmt_31_1 + fmt_31_1 ≤ 0 ∧ fmt_31_1 − fmt_31_1 ≤ 0 ∧ − fmt_31_0 + fmt_31_0 ≤ 0 ∧ fmt_31_0 − fmt_31_0 ≤ 0 ∧ − ct_17_post + ct_17_post ≤ 0 ∧ ct_17_post − ct_17_post ≤ 0 ∧ − ct_17_2 + ct_17_2 ≤ 0 ∧ ct_17_2 − ct_17_2 ≤ 0 ∧ − ct_17_1 + ct_17_1 ≤ 0 ∧ ct_17_1 − ct_17_1 ≤ 0 ∧ − ct_17_0 + ct_17_0 ≤ 0 ∧ ct_17_0 − ct_17_0 ≤ 0 ∧ − a_328_post + a_328_post ≤ 0 ∧ a_328_post − a_328_post ≤ 0 ∧ − a_328_0 + a_328_0 ≤ 0 ∧ a_328_0 − a_328_0 ≤ 0 ∧ − a_305_post + a_305_post ≤ 0 ∧ a_305_post − a_305_post ≤ 0 ∧ − a_305_0 + a_305_0 ≤ 0 ∧ a_305_0 − a_305_0 ≤ 0 ∧ − a_283_post + a_283_post ≤ 0 ∧ a_283_post − a_283_post ≤ 0 ∧ − a_283_0 + a_283_0 ≤ 0 ∧ a_283_0 − a_283_0 ≤ 0 ∧ − a_26_post + a_26_post ≤ 0 ∧ a_26_post − a_26_post ≤ 0 ∧ − a_26_1 + a_26_1 ≤ 0 ∧ a_26_1 − a_26_1 ≤ 0 ∧ − a_26_0 + a_26_0 ≤ 0 ∧ a_26_0 − a_26_0 ≤ 0 ∧ − a_247_post + a_247_post ≤ 0 ∧ a_247_post − a_247_post ≤ 0 ∧ − a_247_0 + a_247_0 ≤ 0 ∧ a_247_0 − a_247_0 ≤ 0 ∧ − a_197_post + a_197_post ≤ 0 ∧ a_197_post − a_197_post ≤ 0 ∧ − a_197_0 + a_197_0 ≤ 0 ∧ a_197_0 − a_197_0 ≤ 0 ∧ − a_146_0 + a_146_0 ≤ 0 ∧ a_146_0 − a_146_0 ≤ 0 | |
| 60 | 95 | 61: | 1 − t_23_0 + y_19_0 ≤ 0 ∧ − y_19_post + y_19_post ≤ 0 ∧ y_19_post − y_19_post ≤ 0 ∧ − y_19_2 + y_19_2 ≤ 0 ∧ y_19_2 − y_19_2 ≤ 0 ∧ − y_19_1 + y_19_1 ≤ 0 ∧ y_19_1 − y_19_1 ≤ 0 ∧ − y_19_0 + y_19_0 ≤ 0 ∧ y_19_0 − y_19_0 ≤ 0 ∧ − x_SLAM_f_18_post + x_SLAM_f_18_post ≤ 0 ∧ x_SLAM_f_18_post − x_SLAM_f_18_post ≤ 0 ∧ − x_SLAM_f_18_2 + x_SLAM_f_18_2 ≤ 0 ∧ x_SLAM_f_18_2 − x_SLAM_f_18_2 ≤ 0 ∧ − x_SLAM_f_18_1 + x_SLAM_f_18_1 ≤ 0 ∧ x_SLAM_f_18_1 − x_SLAM_f_18_1 ≤ 0 ∧ − x_SLAM_f_18_0 + x_SLAM_f_18_0 ≤ 0 ∧ x_SLAM_f_18_0 − x_SLAM_f_18_0 ≤ 0 ∧ − x_34_post + x_34_post ≤ 0 ∧ x_34_post − x_34_post ≤ 0 ∧ − x_34_1 + x_34_1 ≤ 0 ∧ x_34_1 − x_34_1 ≤ 0 ∧ − x_34_0 + x_34_0 ≤ 0 ∧ x_34_0 − x_34_0 ≤ 0 ∧ − x_28_post + x_28_post ≤ 0 ∧ x_28_post − x_28_post ≤ 0 ∧ − x_28_1 + x_28_1 ≤ 0 ∧ x_28_1 − x_28_1 ≤ 0 ∧ − x_28_0 + x_28_0 ≤ 0 ∧ x_28_0 − x_28_0 ≤ 0 ∧ − x_238_post + x_238_post ≤ 0 ∧ x_238_post − x_238_post ≤ 0 ∧ − x_238_0 + x_238_0 ≤ 0 ∧ x_238_0 − x_238_0 ≤ 0 ∧ − x_20_post + x_20_post ≤ 0 ∧ x_20_post − x_20_post ≤ 0 ∧ − x_20_2 + x_20_2 ≤ 0 ∧ x_20_2 − x_20_2 ≤ 0 ∧ − x_20_1 + x_20_1 ≤ 0 ∧ x_20_1 − x_20_1 ≤ 0 ∧ − x_20_0 + x_20_0 ≤ 0 ∧ x_20_0 − x_20_0 ≤ 0 ∧ − x_177_post + x_177_post ≤ 0 ∧ x_177_post − x_177_post ≤ 0 ∧ − x_177_0 + x_177_0 ≤ 0 ∧ x_177_0 − x_177_0 ≤ 0 ∧ − x_16_post + x_16_post ≤ 0 ∧ x_16_post − x_16_post ≤ 0 ∧ − x_16_1 + x_16_1 ≤ 0 ∧ x_16_1 − x_16_1 ≤ 0 ∧ − x_16_0 + x_16_0 ≤ 0 ∧ x_16_0 − x_16_0 ≤ 0 ∧ − x_14_post + x_14_post ≤ 0 ∧ x_14_post − x_14_post ≤ 0 ∧ − x_14_0 + x_14_0 ≤ 0 ∧ x_14_0 − x_14_0 ≤ 0 ∧ − tmp_48_post + tmp_48_post ≤ 0 ∧ tmp_48_post − tmp_48_post ≤ 0 ∧ − tmp_48_0 + tmp_48_0 ≤ 0 ∧ tmp_48_0 − tmp_48_0 ≤ 0 ∧ − temp_49_post + temp_49_post ≤ 0 ∧ temp_49_post − temp_49_post ≤ 0 ∧ − temp_49_0 + temp_49_0 ≤ 0 ∧ temp_49_0 − temp_49_0 ≤ 0 ∧ − temp0_45_post + temp0_45_post ≤ 0 ∧ temp0_45_post − temp0_45_post ≤ 0 ∧ − temp0_45_1 + temp0_45_1 ≤ 0 ∧ temp0_45_1 − temp0_45_1 ≤ 0 ∧ − temp0_45_0 + temp0_45_0 ≤ 0 ∧ temp0_45_0 − temp0_45_0 ≤ 0 ∧ − temp0_32_post + temp0_32_post ≤ 0 ∧ temp0_32_post − temp0_32_post ≤ 0 ∧ − temp0_32_4 + temp0_32_4 ≤ 0 ∧ temp0_32_4 − temp0_32_4 ≤ 0 ∧ − temp0_32_3 + temp0_32_3 ≤ 0 ∧ temp0_32_3 − temp0_32_3 ≤ 0 ∧ − temp0_32_2 + temp0_32_2 ≤ 0 ∧ temp0_32_2 − temp0_32_2 ≤ 0 ∧ − temp0_32_1 + temp0_32_1 ≤ 0 ∧ temp0_32_1 − temp0_32_1 ≤ 0 ∧ − temp0_32_0 + temp0_32_0 ≤ 0 ∧ temp0_32_0 − temp0_32_0 ≤ 0 ∧ − temp0_15_0 + temp0_15_0 ≤ 0 ∧ temp0_15_0 − temp0_15_0 ≤ 0 ∧ − t_23_post + t_23_post ≤ 0 ∧ t_23_post − t_23_post ≤ 0 ∧ − t_23_1 + t_23_1 ≤ 0 ∧ t_23_1 − t_23_1 ≤ 0 ∧ − t_23_0 + t_23_0 ≤ 0 ∧ t_23_0 − t_23_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_post + result_dot_printf_sdv_special_RETURN_VALUE_41_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_post − result_dot_printf_sdv_special_RETURN_VALUE_41_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_1 + result_dot_printf_sdv_special_RETURN_VALUE_41_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_1 − result_dot_printf_sdv_special_RETURN_VALUE_41_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_0 + result_dot_printf_sdv_special_RETURN_VALUE_41_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_0 − result_dot_printf_sdv_special_RETURN_VALUE_41_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_post + result_dot_printf_sdv_special_RETURN_VALUE_38_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_post − result_dot_printf_sdv_special_RETURN_VALUE_38_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_1 + result_dot_printf_sdv_special_RETURN_VALUE_38_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_1 − result_dot_printf_sdv_special_RETURN_VALUE_38_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_0 + result_dot_printf_sdv_special_RETURN_VALUE_38_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_0 − result_dot_printf_sdv_special_RETURN_VALUE_38_0 ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_post + result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_post − result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_1 + result_dot_nondet_sdv_special_RETURN_VALUE_13_1 ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_1 − result_dot_nondet_sdv_special_RETURN_VALUE_13_1 ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_0 + result_dot_nondet_sdv_special_RETURN_VALUE_13_0 ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_0 − result_dot_nondet_sdv_special_RETURN_VALUE_13_0 ≤ 0 ∧ − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post + result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post ≤ 0 ∧ result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post ≤ 0 ∧ − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 + result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 ≤ 0 ∧ result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 ≤ 0 ∧ − result_11_post + result_11_post ≤ 0 ∧ result_11_post − result_11_post ≤ 0 ∧ − result_11_6 + result_11_6 ≤ 0 ∧ result_11_6 − result_11_6 ≤ 0 ∧ − result_11_5 + result_11_5 ≤ 0 ∧ result_11_5 − result_11_5 ≤ 0 ∧ − result_11_4 + result_11_4 ≤ 0 ∧ result_11_4 − result_11_4 ≤ 0 ∧ − result_11_3 + result_11_3 ≤ 0 ∧ result_11_3 − result_11_3 ≤ 0 ∧ − result_11_2 + result_11_2 ≤ 0 ∧ result_11_2 − result_11_2 ≤ 0 ∧ − result_11_1 + result_11_1 ≤ 0 ∧ result_11_1 − result_11_1 ≤ 0 ∧ − result_11_0 + result_11_0 ≤ 0 ∧ result_11_0 − result_11_0 ≤ 0 ∧ − rcd_72_post + rcd_72_post ≤ 0 ∧ rcd_72_post − rcd_72_post ≤ 0 ∧ − rcd_72_0 + rcd_72_0 ≤ 0 ∧ rcd_72_0 − rcd_72_0 ≤ 0 ∧ − rcd_102_post + rcd_102_post ≤ 0 ∧ rcd_102_post − rcd_102_post ≤ 0 ∧ − rcd_102_0 + rcd_102_0 ≤ 0 ∧ rcd_102_0 − rcd_102_0 ≤ 0 ∧ − r_53_post + r_53_post ≤ 0 ∧ r_53_post − r_53_post ≤ 0 ∧ − r_53_0 + r_53_0 ≤ 0 ∧ r_53_0 − r_53_0 ≤ 0 ∧ − r_161_post + r_161_post ≤ 0 ∧ r_161_post − r_161_post ≤ 0 ∧ − r_161_0 + r_161_0 ≤ 0 ∧ r_161_0 − r_161_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 ≤ 0 ∧ − nondet_12_post + nondet_12_post ≤ 0 ∧ nondet_12_post − nondet_12_post ≤ 0 ∧ − nondet_12_1 + nondet_12_1 ≤ 0 ∧ nondet_12_1 − nondet_12_1 ≤ 0 ∧ − nondet_12_0 + nondet_12_0 ≤ 0 ∧ nondet_12_0 − nondet_12_0 ≤ 0 ∧ − lt_37_post + lt_37_post ≤ 0 ∧ lt_37_post − lt_37_post ≤ 0 ∧ − lt_37_1 + lt_37_1 ≤ 0 ∧ lt_37_1 − lt_37_1 ≤ 0 ∧ − lt_37_0 + lt_37_0 ≤ 0 ∧ lt_37_0 − lt_37_0 ≤ 0 ∧ − lt_36_post + lt_36_post ≤ 0 ∧ lt_36_post − lt_36_post ≤ 0 ∧ − lt_36_0 + lt_36_0 ≤ 0 ∧ lt_36_0 − lt_36_0 ≤ 0 ∧ − lt_237_post + lt_237_post ≤ 0 ∧ lt_237_post − lt_237_post ≤ 0 ∧ − lt_237_0 + lt_237_0 ≤ 0 ∧ lt_237_0 − lt_237_0 ≤ 0 ∧ − length_43_post + length_43_post ≤ 0 ∧ length_43_post − length_43_post ≤ 0 ∧ − length_43_0 + length_43_0 ≤ 0 ∧ length_43_0 − length_43_0 ≤ 0 ∧ − len_246_post + len_246_post ≤ 0 ∧ len_246_post − len_246_post ≤ 0 ∧ − len_246_0 + len_246_0 ≤ 0 ∧ len_246_0 − len_246_0 ≤ 0 ∧ − len_180_post + len_180_post ≤ 0 ∧ len_180_post − len_180_post ≤ 0 ∧ − len_180_0 + len_180_0 ≤ 0 ∧ len_180_0 − len_180_0 ≤ 0 ∧ − i_44_post + i_44_post ≤ 0 ∧ i_44_post − i_44_post ≤ 0 ∧ − i_44_0 + i_44_0 ≤ 0 ∧ i_44_0 − i_44_0 ≤ 0 ∧ − i_125_post + i_125_post ≤ 0 ∧ i_125_post − i_125_post ≤ 0 ∧ − i_125_0 + i_125_0 ≤ 0 ∧ i_125_0 − i_125_0 ≤ 0 ∧ − i_108_post + i_108_post ≤ 0 ∧ i_108_post − i_108_post ≤ 0 ∧ − i_108_0 + i_108_0 ≤ 0 ∧ i_108_0 − i_108_0 ≤ 0 ∧ − head_46_post + head_46_post ≤ 0 ∧ head_46_post − head_46_post ≤ 0 ∧ − head_46_0 + head_46_0 ≤ 0 ∧ head_46_0 − head_46_0 ≤ 0 ∧ − fmt_31_post + fmt_31_post ≤ 0 ∧ fmt_31_post − fmt_31_post ≤ 0 ∧ − fmt_31_4 + fmt_31_4 ≤ 0 ∧ fmt_31_4 − fmt_31_4 ≤ 0 ∧ − fmt_31_3 + fmt_31_3 ≤ 0 ∧ fmt_31_3 − fmt_31_3 ≤ 0 ∧ − fmt_31_2 + fmt_31_2 ≤ 0 ∧ fmt_31_2 − fmt_31_2 ≤ 0 ∧ − fmt_31_1 + fmt_31_1 ≤ 0 ∧ fmt_31_1 − fmt_31_1 ≤ 0 ∧ − fmt_31_0 + fmt_31_0 ≤ 0 ∧ fmt_31_0 − fmt_31_0 ≤ 0 ∧ − ct_17_post + ct_17_post ≤ 0 ∧ ct_17_post − ct_17_post ≤ 0 ∧ − ct_17_2 + ct_17_2 ≤ 0 ∧ ct_17_2 − ct_17_2 ≤ 0 ∧ − ct_17_1 + ct_17_1 ≤ 0 ∧ ct_17_1 − ct_17_1 ≤ 0 ∧ − ct_17_0 + ct_17_0 ≤ 0 ∧ ct_17_0 − ct_17_0 ≤ 0 ∧ − a_328_post + a_328_post ≤ 0 ∧ a_328_post − a_328_post ≤ 0 ∧ − a_328_0 + a_328_0 ≤ 0 ∧ a_328_0 − a_328_0 ≤ 0 ∧ − a_305_post + a_305_post ≤ 0 ∧ a_305_post − a_305_post ≤ 0 ∧ − a_305_0 + a_305_0 ≤ 0 ∧ a_305_0 − a_305_0 ≤ 0 ∧ − a_283_post + a_283_post ≤ 0 ∧ a_283_post − a_283_post ≤ 0 ∧ − a_283_0 + a_283_0 ≤ 0 ∧ a_283_0 − a_283_0 ≤ 0 ∧ − a_26_post + a_26_post ≤ 0 ∧ a_26_post − a_26_post ≤ 0 ∧ − a_26_1 + a_26_1 ≤ 0 ∧ a_26_1 − a_26_1 ≤ 0 ∧ − a_26_0 + a_26_0 ≤ 0 ∧ a_26_0 − a_26_0 ≤ 0 ∧ − a_247_post + a_247_post ≤ 0 ∧ a_247_post − a_247_post ≤ 0 ∧ − a_247_0 + a_247_0 ≤ 0 ∧ a_247_0 − a_247_0 ≤ 0 ∧ − a_197_post + a_197_post ≤ 0 ∧ a_197_post − a_197_post ≤ 0 ∧ − a_197_0 + a_197_0 ≤ 0 ∧ a_197_0 − a_197_0 ≤ 0 ∧ − a_146_0 + a_146_0 ≤ 0 ∧ a_146_0 − a_146_0 ≤ 0 | |
| 60 | 96 | 61: | 1 + t_23_0 − y_19_0 ≤ 0 ∧ − y_19_post + y_19_post ≤ 0 ∧ y_19_post − y_19_post ≤ 0 ∧ − y_19_2 + y_19_2 ≤ 0 ∧ y_19_2 − y_19_2 ≤ 0 ∧ − y_19_1 + y_19_1 ≤ 0 ∧ y_19_1 − y_19_1 ≤ 0 ∧ − y_19_0 + y_19_0 ≤ 0 ∧ y_19_0 − y_19_0 ≤ 0 ∧ − x_SLAM_f_18_post + x_SLAM_f_18_post ≤ 0 ∧ x_SLAM_f_18_post − x_SLAM_f_18_post ≤ 0 ∧ − x_SLAM_f_18_2 + x_SLAM_f_18_2 ≤ 0 ∧ x_SLAM_f_18_2 − x_SLAM_f_18_2 ≤ 0 ∧ − x_SLAM_f_18_1 + x_SLAM_f_18_1 ≤ 0 ∧ x_SLAM_f_18_1 − x_SLAM_f_18_1 ≤ 0 ∧ − x_SLAM_f_18_0 + x_SLAM_f_18_0 ≤ 0 ∧ x_SLAM_f_18_0 − x_SLAM_f_18_0 ≤ 0 ∧ − x_34_post + x_34_post ≤ 0 ∧ x_34_post − x_34_post ≤ 0 ∧ − x_34_1 + x_34_1 ≤ 0 ∧ x_34_1 − x_34_1 ≤ 0 ∧ − x_34_0 + x_34_0 ≤ 0 ∧ x_34_0 − x_34_0 ≤ 0 ∧ − x_28_post + x_28_post ≤ 0 ∧ x_28_post − x_28_post ≤ 0 ∧ − x_28_1 + x_28_1 ≤ 0 ∧ x_28_1 − x_28_1 ≤ 0 ∧ − x_28_0 + x_28_0 ≤ 0 ∧ x_28_0 − x_28_0 ≤ 0 ∧ − x_238_post + x_238_post ≤ 0 ∧ x_238_post − x_238_post ≤ 0 ∧ − x_238_0 + x_238_0 ≤ 0 ∧ x_238_0 − x_238_0 ≤ 0 ∧ − x_20_post + x_20_post ≤ 0 ∧ x_20_post − x_20_post ≤ 0 ∧ − x_20_2 + x_20_2 ≤ 0 ∧ x_20_2 − x_20_2 ≤ 0 ∧ − x_20_1 + x_20_1 ≤ 0 ∧ x_20_1 − x_20_1 ≤ 0 ∧ − x_20_0 + x_20_0 ≤ 0 ∧ x_20_0 − x_20_0 ≤ 0 ∧ − x_177_post + x_177_post ≤ 0 ∧ x_177_post − x_177_post ≤ 0 ∧ − x_177_0 + x_177_0 ≤ 0 ∧ x_177_0 − x_177_0 ≤ 0 ∧ − x_16_post + x_16_post ≤ 0 ∧ x_16_post − x_16_post ≤ 0 ∧ − x_16_1 + x_16_1 ≤ 0 ∧ x_16_1 − x_16_1 ≤ 0 ∧ − x_16_0 + x_16_0 ≤ 0 ∧ x_16_0 − x_16_0 ≤ 0 ∧ − x_14_post + x_14_post ≤ 0 ∧ x_14_post − x_14_post ≤ 0 ∧ − x_14_0 + x_14_0 ≤ 0 ∧ x_14_0 − x_14_0 ≤ 0 ∧ − tmp_48_post + tmp_48_post ≤ 0 ∧ tmp_48_post − tmp_48_post ≤ 0 ∧ − tmp_48_0 + tmp_48_0 ≤ 0 ∧ tmp_48_0 − tmp_48_0 ≤ 0 ∧ − temp_49_post + temp_49_post ≤ 0 ∧ temp_49_post − temp_49_post ≤ 0 ∧ − temp_49_0 + temp_49_0 ≤ 0 ∧ temp_49_0 − temp_49_0 ≤ 0 ∧ − temp0_45_post + temp0_45_post ≤ 0 ∧ temp0_45_post − temp0_45_post ≤ 0 ∧ − temp0_45_1 + temp0_45_1 ≤ 0 ∧ temp0_45_1 − temp0_45_1 ≤ 0 ∧ − temp0_45_0 + temp0_45_0 ≤ 0 ∧ temp0_45_0 − temp0_45_0 ≤ 0 ∧ − temp0_32_post + temp0_32_post ≤ 0 ∧ temp0_32_post − temp0_32_post ≤ 0 ∧ − temp0_32_4 + temp0_32_4 ≤ 0 ∧ temp0_32_4 − temp0_32_4 ≤ 0 ∧ − temp0_32_3 + temp0_32_3 ≤ 0 ∧ temp0_32_3 − temp0_32_3 ≤ 0 ∧ − temp0_32_2 + temp0_32_2 ≤ 0 ∧ temp0_32_2 − temp0_32_2 ≤ 0 ∧ − temp0_32_1 + temp0_32_1 ≤ 0 ∧ temp0_32_1 − temp0_32_1 ≤ 0 ∧ − temp0_32_0 + temp0_32_0 ≤ 0 ∧ temp0_32_0 − temp0_32_0 ≤ 0 ∧ − temp0_15_0 + temp0_15_0 ≤ 0 ∧ temp0_15_0 − temp0_15_0 ≤ 0 ∧ − t_23_post + t_23_post ≤ 0 ∧ t_23_post − t_23_post ≤ 0 ∧ − t_23_1 + t_23_1 ≤ 0 ∧ t_23_1 − t_23_1 ≤ 0 ∧ − t_23_0 + t_23_0 ≤ 0 ∧ t_23_0 − t_23_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_post + result_dot_printf_sdv_special_RETURN_VALUE_41_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_post − result_dot_printf_sdv_special_RETURN_VALUE_41_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_1 + result_dot_printf_sdv_special_RETURN_VALUE_41_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_1 − result_dot_printf_sdv_special_RETURN_VALUE_41_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_0 + result_dot_printf_sdv_special_RETURN_VALUE_41_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_0 − result_dot_printf_sdv_special_RETURN_VALUE_41_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_post + result_dot_printf_sdv_special_RETURN_VALUE_38_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_post − result_dot_printf_sdv_special_RETURN_VALUE_38_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_1 + result_dot_printf_sdv_special_RETURN_VALUE_38_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_1 − result_dot_printf_sdv_special_RETURN_VALUE_38_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_0 + result_dot_printf_sdv_special_RETURN_VALUE_38_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_0 − result_dot_printf_sdv_special_RETURN_VALUE_38_0 ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_post + result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_post − result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_1 + result_dot_nondet_sdv_special_RETURN_VALUE_13_1 ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_1 − result_dot_nondet_sdv_special_RETURN_VALUE_13_1 ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_0 + result_dot_nondet_sdv_special_RETURN_VALUE_13_0 ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_0 − result_dot_nondet_sdv_special_RETURN_VALUE_13_0 ≤ 0 ∧ − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post + result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post ≤ 0 ∧ result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post ≤ 0 ∧ − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 + result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 ≤ 0 ∧ result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 ≤ 0 ∧ − result_11_post + result_11_post ≤ 0 ∧ result_11_post − result_11_post ≤ 0 ∧ − result_11_6 + result_11_6 ≤ 0 ∧ result_11_6 − result_11_6 ≤ 0 ∧ − result_11_5 + result_11_5 ≤ 0 ∧ result_11_5 − result_11_5 ≤ 0 ∧ − result_11_4 + result_11_4 ≤ 0 ∧ result_11_4 − result_11_4 ≤ 0 ∧ − result_11_3 + result_11_3 ≤ 0 ∧ result_11_3 − result_11_3 ≤ 0 ∧ − result_11_2 + result_11_2 ≤ 0 ∧ result_11_2 − result_11_2 ≤ 0 ∧ − result_11_1 + result_11_1 ≤ 0 ∧ result_11_1 − result_11_1 ≤ 0 ∧ − result_11_0 + result_11_0 ≤ 0 ∧ result_11_0 − result_11_0 ≤ 0 ∧ − rcd_72_post + rcd_72_post ≤ 0 ∧ rcd_72_post − rcd_72_post ≤ 0 ∧ − rcd_72_0 + rcd_72_0 ≤ 0 ∧ rcd_72_0 − rcd_72_0 ≤ 0 ∧ − rcd_102_post + rcd_102_post ≤ 0 ∧ rcd_102_post − rcd_102_post ≤ 0 ∧ − rcd_102_0 + rcd_102_0 ≤ 0 ∧ rcd_102_0 − rcd_102_0 ≤ 0 ∧ − r_53_post + r_53_post ≤ 0 ∧ r_53_post − r_53_post ≤ 0 ∧ − r_53_0 + r_53_0 ≤ 0 ∧ r_53_0 − r_53_0 ≤ 0 ∧ − r_161_post + r_161_post ≤ 0 ∧ r_161_post − r_161_post ≤ 0 ∧ − r_161_0 + r_161_0 ≤ 0 ∧ r_161_0 − r_161_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 ≤ 0 ∧ − nondet_12_post + nondet_12_post ≤ 0 ∧ nondet_12_post − nondet_12_post ≤ 0 ∧ − nondet_12_1 + nondet_12_1 ≤ 0 ∧ nondet_12_1 − nondet_12_1 ≤ 0 ∧ − nondet_12_0 + nondet_12_0 ≤ 0 ∧ nondet_12_0 − nondet_12_0 ≤ 0 ∧ − lt_37_post + lt_37_post ≤ 0 ∧ lt_37_post − lt_37_post ≤ 0 ∧ − lt_37_1 + lt_37_1 ≤ 0 ∧ lt_37_1 − lt_37_1 ≤ 0 ∧ − lt_37_0 + lt_37_0 ≤ 0 ∧ lt_37_0 − lt_37_0 ≤ 0 ∧ − lt_36_post + lt_36_post ≤ 0 ∧ lt_36_post − lt_36_post ≤ 0 ∧ − lt_36_0 + lt_36_0 ≤ 0 ∧ lt_36_0 − lt_36_0 ≤ 0 ∧ − lt_237_post + lt_237_post ≤ 0 ∧ lt_237_post − lt_237_post ≤ 0 ∧ − lt_237_0 + lt_237_0 ≤ 0 ∧ lt_237_0 − lt_237_0 ≤ 0 ∧ − length_43_post + length_43_post ≤ 0 ∧ length_43_post − length_43_post ≤ 0 ∧ − length_43_0 + length_43_0 ≤ 0 ∧ length_43_0 − length_43_0 ≤ 0 ∧ − len_246_post + len_246_post ≤ 0 ∧ len_246_post − len_246_post ≤ 0 ∧ − len_246_0 + len_246_0 ≤ 0 ∧ len_246_0 − len_246_0 ≤ 0 ∧ − len_180_post + len_180_post ≤ 0 ∧ len_180_post − len_180_post ≤ 0 ∧ − len_180_0 + len_180_0 ≤ 0 ∧ len_180_0 − len_180_0 ≤ 0 ∧ − i_44_post + i_44_post ≤ 0 ∧ i_44_post − i_44_post ≤ 0 ∧ − i_44_0 + i_44_0 ≤ 0 ∧ i_44_0 − i_44_0 ≤ 0 ∧ − i_125_post + i_125_post ≤ 0 ∧ i_125_post − i_125_post ≤ 0 ∧ − i_125_0 + i_125_0 ≤ 0 ∧ i_125_0 − i_125_0 ≤ 0 ∧ − i_108_post + i_108_post ≤ 0 ∧ i_108_post − i_108_post ≤ 0 ∧ − i_108_0 + i_108_0 ≤ 0 ∧ i_108_0 − i_108_0 ≤ 0 ∧ − head_46_post + head_46_post ≤ 0 ∧ head_46_post − head_46_post ≤ 0 ∧ − head_46_0 + head_46_0 ≤ 0 ∧ head_46_0 − head_46_0 ≤ 0 ∧ − fmt_31_post + fmt_31_post ≤ 0 ∧ fmt_31_post − fmt_31_post ≤ 0 ∧ − fmt_31_4 + fmt_31_4 ≤ 0 ∧ fmt_31_4 − fmt_31_4 ≤ 0 ∧ − fmt_31_3 + fmt_31_3 ≤ 0 ∧ fmt_31_3 − fmt_31_3 ≤ 0 ∧ − fmt_31_2 + fmt_31_2 ≤ 0 ∧ fmt_31_2 − fmt_31_2 ≤ 0 ∧ − fmt_31_1 + fmt_31_1 ≤ 0 ∧ fmt_31_1 − fmt_31_1 ≤ 0 ∧ − fmt_31_0 + fmt_31_0 ≤ 0 ∧ fmt_31_0 − fmt_31_0 ≤ 0 ∧ − ct_17_post + ct_17_post ≤ 0 ∧ ct_17_post − ct_17_post ≤ 0 ∧ − ct_17_2 + ct_17_2 ≤ 0 ∧ ct_17_2 − ct_17_2 ≤ 0 ∧ − ct_17_1 + ct_17_1 ≤ 0 ∧ ct_17_1 − ct_17_1 ≤ 0 ∧ − ct_17_0 + ct_17_0 ≤ 0 ∧ ct_17_0 − ct_17_0 ≤ 0 ∧ − a_328_post + a_328_post ≤ 0 ∧ a_328_post − a_328_post ≤ 0 ∧ − a_328_0 + a_328_0 ≤ 0 ∧ a_328_0 − a_328_0 ≤ 0 ∧ − a_305_post + a_305_post ≤ 0 ∧ a_305_post − a_305_post ≤ 0 ∧ − a_305_0 + a_305_0 ≤ 0 ∧ a_305_0 − a_305_0 ≤ 0 ∧ − a_283_post + a_283_post ≤ 0 ∧ a_283_post − a_283_post ≤ 0 ∧ − a_283_0 + a_283_0 ≤ 0 ∧ a_283_0 − a_283_0 ≤ 0 ∧ − a_26_post + a_26_post ≤ 0 ∧ a_26_post − a_26_post ≤ 0 ∧ − a_26_1 + a_26_1 ≤ 0 ∧ a_26_1 − a_26_1 ≤ 0 ∧ − a_26_0 + a_26_0 ≤ 0 ∧ a_26_0 − a_26_0 ≤ 0 ∧ − a_247_post + a_247_post ≤ 0 ∧ a_247_post − a_247_post ≤ 0 ∧ − a_247_0 + a_247_0 ≤ 0 ∧ a_247_0 − a_247_0 ≤ 0 ∧ − a_197_post + a_197_post ≤ 0 ∧ a_197_post − a_197_post ≤ 0 ∧ − a_197_0 + a_197_0 ≤ 0 ∧ a_197_0 − a_197_0 ≤ 0 ∧ − a_146_0 + a_146_0 ≤ 0 ∧ a_146_0 − a_146_0 ≤ 0 | |
| 61 | 97 | 62: | 0 ≤ 0 ∧ 0 ≤ 0 ∧ 1 − result_dot_nondet_sdv_special_RETURN_VALUE_13_0 ≤ 0 ∧ 2 − result_dot_nondet_sdv_special_RETURN_VALUE_13_0 ≤ 0 ∧ a_305_post − a_328_0 ≤ 0 ∧ − a_305_post + a_328_0 ≤ 0 ∧ a_305_0 − a_305_post ≤ 0 ∧ − a_305_0 + a_305_post ≤ 0 ∧ − y_19_post + y_19_post ≤ 0 ∧ y_19_post − y_19_post ≤ 0 ∧ − y_19_2 + y_19_2 ≤ 0 ∧ y_19_2 − y_19_2 ≤ 0 ∧ − y_19_1 + y_19_1 ≤ 0 ∧ y_19_1 − y_19_1 ≤ 0 ∧ − y_19_0 + y_19_0 ≤ 0 ∧ y_19_0 − y_19_0 ≤ 0 ∧ − x_SLAM_f_18_post + x_SLAM_f_18_post ≤ 0 ∧ x_SLAM_f_18_post − x_SLAM_f_18_post ≤ 0 ∧ − x_SLAM_f_18_2 + x_SLAM_f_18_2 ≤ 0 ∧ x_SLAM_f_18_2 − x_SLAM_f_18_2 ≤ 0 ∧ − x_SLAM_f_18_1 + x_SLAM_f_18_1 ≤ 0 ∧ x_SLAM_f_18_1 − x_SLAM_f_18_1 ≤ 0 ∧ − x_SLAM_f_18_0 + x_SLAM_f_18_0 ≤ 0 ∧ x_SLAM_f_18_0 − x_SLAM_f_18_0 ≤ 0 ∧ − x_34_post + x_34_post ≤ 0 ∧ x_34_post − x_34_post ≤ 0 ∧ − x_34_1 + x_34_1 ≤ 0 ∧ x_34_1 − x_34_1 ≤ 0 ∧ − x_34_0 + x_34_0 ≤ 0 ∧ x_34_0 − x_34_0 ≤ 0 ∧ − x_28_post + x_28_post ≤ 0 ∧ x_28_post − x_28_post ≤ 0 ∧ − x_28_1 + x_28_1 ≤ 0 ∧ x_28_1 − x_28_1 ≤ 0 ∧ − x_28_0 + x_28_0 ≤ 0 ∧ x_28_0 − x_28_0 ≤ 0 ∧ − x_238_post + x_238_post ≤ 0 ∧ x_238_post − x_238_post ≤ 0 ∧ − x_238_0 + x_238_0 ≤ 0 ∧ x_238_0 − x_238_0 ≤ 0 ∧ − x_20_post + x_20_post ≤ 0 ∧ x_20_post − x_20_post ≤ 0 ∧ − x_20_2 + x_20_2 ≤ 0 ∧ x_20_2 − x_20_2 ≤ 0 ∧ − x_20_1 + x_20_1 ≤ 0 ∧ x_20_1 − x_20_1 ≤ 0 ∧ − x_20_0 + x_20_0 ≤ 0 ∧ x_20_0 − x_20_0 ≤ 0 ∧ − x_177_post + x_177_post ≤ 0 ∧ x_177_post − x_177_post ≤ 0 ∧ − x_177_0 + x_177_0 ≤ 0 ∧ x_177_0 − x_177_0 ≤ 0 ∧ − x_16_post + x_16_post ≤ 0 ∧ x_16_post − x_16_post ≤ 0 ∧ − x_16_1 + x_16_1 ≤ 0 ∧ x_16_1 − x_16_1 ≤ 0 ∧ − x_16_0 + x_16_0 ≤ 0 ∧ x_16_0 − x_16_0 ≤ 0 ∧ − x_14_post + x_14_post ≤ 0 ∧ x_14_post − x_14_post ≤ 0 ∧ − x_14_0 + x_14_0 ≤ 0 ∧ x_14_0 − x_14_0 ≤ 0 ∧ − tmp_48_post + tmp_48_post ≤ 0 ∧ tmp_48_post − tmp_48_post ≤ 0 ∧ − tmp_48_0 + tmp_48_0 ≤ 0 ∧ tmp_48_0 − tmp_48_0 ≤ 0 ∧ − temp_49_post + temp_49_post ≤ 0 ∧ temp_49_post − temp_49_post ≤ 0 ∧ − temp_49_0 + temp_49_0 ≤ 0 ∧ temp_49_0 − temp_49_0 ≤ 0 ∧ − temp0_45_post + temp0_45_post ≤ 0 ∧ temp0_45_post − temp0_45_post ≤ 0 ∧ − temp0_45_1 + temp0_45_1 ≤ 0 ∧ temp0_45_1 − temp0_45_1 ≤ 0 ∧ − temp0_45_0 + temp0_45_0 ≤ 0 ∧ temp0_45_0 − temp0_45_0 ≤ 0 ∧ − temp0_32_post + temp0_32_post ≤ 0 ∧ temp0_32_post − temp0_32_post ≤ 0 ∧ − temp0_32_4 + temp0_32_4 ≤ 0 ∧ temp0_32_4 − temp0_32_4 ≤ 0 ∧ − temp0_32_3 + temp0_32_3 ≤ 0 ∧ temp0_32_3 − temp0_32_3 ≤ 0 ∧ − temp0_32_2 + temp0_32_2 ≤ 0 ∧ temp0_32_2 − temp0_32_2 ≤ 0 ∧ − temp0_32_1 + temp0_32_1 ≤ 0 ∧ temp0_32_1 − temp0_32_1 ≤ 0 ∧ − temp0_32_0 + temp0_32_0 ≤ 0 ∧ temp0_32_0 − temp0_32_0 ≤ 0 ∧ − temp0_15_0 + temp0_15_0 ≤ 0 ∧ temp0_15_0 − temp0_15_0 ≤ 0 ∧ − t_23_post + t_23_post ≤ 0 ∧ t_23_post − t_23_post ≤ 0 ∧ − t_23_1 + t_23_1 ≤ 0 ∧ t_23_1 − t_23_1 ≤ 0 ∧ − t_23_0 + t_23_0 ≤ 0 ∧ t_23_0 − t_23_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_post + result_dot_printf_sdv_special_RETURN_VALUE_41_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_post − result_dot_printf_sdv_special_RETURN_VALUE_41_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_1 + result_dot_printf_sdv_special_RETURN_VALUE_41_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_1 − result_dot_printf_sdv_special_RETURN_VALUE_41_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_0 + result_dot_printf_sdv_special_RETURN_VALUE_41_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_0 − result_dot_printf_sdv_special_RETURN_VALUE_41_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_post + result_dot_printf_sdv_special_RETURN_VALUE_38_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_post − result_dot_printf_sdv_special_RETURN_VALUE_38_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_1 + result_dot_printf_sdv_special_RETURN_VALUE_38_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_1 − result_dot_printf_sdv_special_RETURN_VALUE_38_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_0 + result_dot_printf_sdv_special_RETURN_VALUE_38_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_0 − result_dot_printf_sdv_special_RETURN_VALUE_38_0 ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_post + result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_post − result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_1 + result_dot_nondet_sdv_special_RETURN_VALUE_13_1 ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_1 − result_dot_nondet_sdv_special_RETURN_VALUE_13_1 ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_0 + result_dot_nondet_sdv_special_RETURN_VALUE_13_0 ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_0 − result_dot_nondet_sdv_special_RETURN_VALUE_13_0 ≤ 0 ∧ − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post + result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post ≤ 0 ∧ result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post ≤ 0 ∧ − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 + result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 ≤ 0 ∧ result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 ≤ 0 ∧ − result_11_post + result_11_post ≤ 0 ∧ result_11_post − result_11_post ≤ 0 ∧ − result_11_6 + result_11_6 ≤ 0 ∧ result_11_6 − result_11_6 ≤ 0 ∧ − result_11_5 + result_11_5 ≤ 0 ∧ result_11_5 − result_11_5 ≤ 0 ∧ − result_11_4 + result_11_4 ≤ 0 ∧ result_11_4 − result_11_4 ≤ 0 ∧ − result_11_3 + result_11_3 ≤ 0 ∧ result_11_3 − result_11_3 ≤ 0 ∧ − result_11_2 + result_11_2 ≤ 0 ∧ result_11_2 − result_11_2 ≤ 0 ∧ − result_11_1 + result_11_1 ≤ 0 ∧ result_11_1 − result_11_1 ≤ 0 ∧ − result_11_0 + result_11_0 ≤ 0 ∧ result_11_0 − result_11_0 ≤ 0 ∧ − rcd_72_post + rcd_72_post ≤ 0 ∧ rcd_72_post − rcd_72_post ≤ 0 ∧ − rcd_72_0 + rcd_72_0 ≤ 0 ∧ rcd_72_0 − rcd_72_0 ≤ 0 ∧ − rcd_102_post + rcd_102_post ≤ 0 ∧ rcd_102_post − rcd_102_post ≤ 0 ∧ − rcd_102_0 + rcd_102_0 ≤ 0 ∧ rcd_102_0 − rcd_102_0 ≤ 0 ∧ − r_53_post + r_53_post ≤ 0 ∧ r_53_post − r_53_post ≤ 0 ∧ − r_53_0 + r_53_0 ≤ 0 ∧ r_53_0 − r_53_0 ≤ 0 ∧ − r_161_post + r_161_post ≤ 0 ∧ r_161_post − r_161_post ≤ 0 ∧ − r_161_0 + r_161_0 ≤ 0 ∧ r_161_0 − r_161_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 ≤ 0 ∧ − nondet_12_post + nondet_12_post ≤ 0 ∧ nondet_12_post − nondet_12_post ≤ 0 ∧ − nondet_12_1 + nondet_12_1 ≤ 0 ∧ nondet_12_1 − nondet_12_1 ≤ 0 ∧ − nondet_12_0 + nondet_12_0 ≤ 0 ∧ nondet_12_0 − nondet_12_0 ≤ 0 ∧ − lt_37_post + lt_37_post ≤ 0 ∧ lt_37_post − lt_37_post ≤ 0 ∧ − lt_37_1 + lt_37_1 ≤ 0 ∧ lt_37_1 − lt_37_1 ≤ 0 ∧ − lt_37_0 + lt_37_0 ≤ 0 ∧ lt_37_0 − lt_37_0 ≤ 0 ∧ − lt_36_post + lt_36_post ≤ 0 ∧ lt_36_post − lt_36_post ≤ 0 ∧ − lt_36_0 + lt_36_0 ≤ 0 ∧ lt_36_0 − lt_36_0 ≤ 0 ∧ − lt_237_post + lt_237_post ≤ 0 ∧ lt_237_post − lt_237_post ≤ 0 ∧ − lt_237_0 + lt_237_0 ≤ 0 ∧ lt_237_0 − lt_237_0 ≤ 0 ∧ − length_43_post + length_43_post ≤ 0 ∧ length_43_post − length_43_post ≤ 0 ∧ − length_43_0 + length_43_0 ≤ 0 ∧ length_43_0 − length_43_0 ≤ 0 ∧ − len_246_post + len_246_post ≤ 0 ∧ len_246_post − len_246_post ≤ 0 ∧ − len_246_0 + len_246_0 ≤ 0 ∧ len_246_0 − len_246_0 ≤ 0 ∧ − len_180_post + len_180_post ≤ 0 ∧ len_180_post − len_180_post ≤ 0 ∧ − len_180_0 + len_180_0 ≤ 0 ∧ len_180_0 − len_180_0 ≤ 0 ∧ − i_44_post + i_44_post ≤ 0 ∧ i_44_post − i_44_post ≤ 0 ∧ − i_44_0 + i_44_0 ≤ 0 ∧ i_44_0 − i_44_0 ≤ 0 ∧ − i_125_post + i_125_post ≤ 0 ∧ i_125_post − i_125_post ≤ 0 ∧ − i_125_0 + i_125_0 ≤ 0 ∧ i_125_0 − i_125_0 ≤ 0 ∧ − i_108_post + i_108_post ≤ 0 ∧ i_108_post − i_108_post ≤ 0 ∧ − i_108_0 + i_108_0 ≤ 0 ∧ i_108_0 − i_108_0 ≤ 0 ∧ − head_46_post + head_46_post ≤ 0 ∧ head_46_post − head_46_post ≤ 0 ∧ − head_46_0 + head_46_0 ≤ 0 ∧ head_46_0 − head_46_0 ≤ 0 ∧ − fmt_31_post + fmt_31_post ≤ 0 ∧ fmt_31_post − fmt_31_post ≤ 0 ∧ − fmt_31_4 + fmt_31_4 ≤ 0 ∧ fmt_31_4 − fmt_31_4 ≤ 0 ∧ − fmt_31_3 + fmt_31_3 ≤ 0 ∧ fmt_31_3 − fmt_31_3 ≤ 0 ∧ − fmt_31_2 + fmt_31_2 ≤ 0 ∧ fmt_31_2 − fmt_31_2 ≤ 0 ∧ − fmt_31_1 + fmt_31_1 ≤ 0 ∧ fmt_31_1 − fmt_31_1 ≤ 0 ∧ − fmt_31_0 + fmt_31_0 ≤ 0 ∧ fmt_31_0 − fmt_31_0 ≤ 0 ∧ − ct_17_post + ct_17_post ≤ 0 ∧ ct_17_post − ct_17_post ≤ 0 ∧ − ct_17_2 + ct_17_2 ≤ 0 ∧ ct_17_2 − ct_17_2 ≤ 0 ∧ − ct_17_1 + ct_17_1 ≤ 0 ∧ ct_17_1 − ct_17_1 ≤ 0 ∧ − ct_17_0 + ct_17_0 ≤ 0 ∧ ct_17_0 − ct_17_0 ≤ 0 ∧ − a_328_post + a_328_post ≤ 0 ∧ a_328_post − a_328_post ≤ 0 ∧ − a_328_0 + a_328_0 ≤ 0 ∧ a_328_0 − a_328_0 ≤ 0 ∧ − a_283_post + a_283_post ≤ 0 ∧ a_283_post − a_283_post ≤ 0 ∧ − a_283_0 + a_283_0 ≤ 0 ∧ a_283_0 − a_283_0 ≤ 0 ∧ − a_26_post + a_26_post ≤ 0 ∧ a_26_post − a_26_post ≤ 0 ∧ − a_26_1 + a_26_1 ≤ 0 ∧ a_26_1 − a_26_1 ≤ 0 ∧ − a_26_0 + a_26_0 ≤ 0 ∧ a_26_0 − a_26_0 ≤ 0 ∧ − a_247_post + a_247_post ≤ 0 ∧ a_247_post − a_247_post ≤ 0 ∧ − a_247_0 + a_247_0 ≤ 0 ∧ a_247_0 − a_247_0 ≤ 0 ∧ − a_197_post + a_197_post ≤ 0 ∧ a_197_post − a_197_post ≤ 0 ∧ − a_197_0 + a_197_0 ≤ 0 ∧ a_197_0 − a_197_0 ≤ 0 ∧ − a_146_0 + a_146_0 ≤ 0 ∧ a_146_0 − a_146_0 ≤ 0 | |
| 62 | 98 | 10: | − y_19_post + y_19_post ≤ 0 ∧ y_19_post − y_19_post ≤ 0 ∧ − y_19_2 + y_19_2 ≤ 0 ∧ y_19_2 − y_19_2 ≤ 0 ∧ − y_19_1 + y_19_1 ≤ 0 ∧ y_19_1 − y_19_1 ≤ 0 ∧ − y_19_0 + y_19_0 ≤ 0 ∧ y_19_0 − y_19_0 ≤ 0 ∧ − x_SLAM_f_18_post + x_SLAM_f_18_post ≤ 0 ∧ x_SLAM_f_18_post − x_SLAM_f_18_post ≤ 0 ∧ − x_SLAM_f_18_2 + x_SLAM_f_18_2 ≤ 0 ∧ x_SLAM_f_18_2 − x_SLAM_f_18_2 ≤ 0 ∧ − x_SLAM_f_18_1 + x_SLAM_f_18_1 ≤ 0 ∧ x_SLAM_f_18_1 − x_SLAM_f_18_1 ≤ 0 ∧ − x_SLAM_f_18_0 + x_SLAM_f_18_0 ≤ 0 ∧ x_SLAM_f_18_0 − x_SLAM_f_18_0 ≤ 0 ∧ − x_34_post + x_34_post ≤ 0 ∧ x_34_post − x_34_post ≤ 0 ∧ − x_34_1 + x_34_1 ≤ 0 ∧ x_34_1 − x_34_1 ≤ 0 ∧ − x_34_0 + x_34_0 ≤ 0 ∧ x_34_0 − x_34_0 ≤ 0 ∧ − x_28_post + x_28_post ≤ 0 ∧ x_28_post − x_28_post ≤ 0 ∧ − x_28_1 + x_28_1 ≤ 0 ∧ x_28_1 − x_28_1 ≤ 0 ∧ − x_28_0 + x_28_0 ≤ 0 ∧ x_28_0 − x_28_0 ≤ 0 ∧ − x_238_post + x_238_post ≤ 0 ∧ x_238_post − x_238_post ≤ 0 ∧ − x_238_0 + x_238_0 ≤ 0 ∧ x_238_0 − x_238_0 ≤ 0 ∧ − x_20_post + x_20_post ≤ 0 ∧ x_20_post − x_20_post ≤ 0 ∧ − x_20_2 + x_20_2 ≤ 0 ∧ x_20_2 − x_20_2 ≤ 0 ∧ − x_20_1 + x_20_1 ≤ 0 ∧ x_20_1 − x_20_1 ≤ 0 ∧ − x_20_0 + x_20_0 ≤ 0 ∧ x_20_0 − x_20_0 ≤ 0 ∧ − x_177_post + x_177_post ≤ 0 ∧ x_177_post − x_177_post ≤ 0 ∧ − x_177_0 + x_177_0 ≤ 0 ∧ x_177_0 − x_177_0 ≤ 0 ∧ − x_16_post + x_16_post ≤ 0 ∧ x_16_post − x_16_post ≤ 0 ∧ − x_16_1 + x_16_1 ≤ 0 ∧ x_16_1 − x_16_1 ≤ 0 ∧ − x_16_0 + x_16_0 ≤ 0 ∧ x_16_0 − x_16_0 ≤ 0 ∧ − x_14_post + x_14_post ≤ 0 ∧ x_14_post − x_14_post ≤ 0 ∧ − x_14_0 + x_14_0 ≤ 0 ∧ x_14_0 − x_14_0 ≤ 0 ∧ − tmp_48_post + tmp_48_post ≤ 0 ∧ tmp_48_post − tmp_48_post ≤ 0 ∧ − tmp_48_0 + tmp_48_0 ≤ 0 ∧ tmp_48_0 − tmp_48_0 ≤ 0 ∧ − temp_49_post + temp_49_post ≤ 0 ∧ temp_49_post − temp_49_post ≤ 0 ∧ − temp_49_0 + temp_49_0 ≤ 0 ∧ temp_49_0 − temp_49_0 ≤ 0 ∧ − temp0_45_post + temp0_45_post ≤ 0 ∧ temp0_45_post − temp0_45_post ≤ 0 ∧ − temp0_45_1 + temp0_45_1 ≤ 0 ∧ temp0_45_1 − temp0_45_1 ≤ 0 ∧ − temp0_45_0 + temp0_45_0 ≤ 0 ∧ temp0_45_0 − temp0_45_0 ≤ 0 ∧ − temp0_32_post + temp0_32_post ≤ 0 ∧ temp0_32_post − temp0_32_post ≤ 0 ∧ − temp0_32_4 + temp0_32_4 ≤ 0 ∧ temp0_32_4 − temp0_32_4 ≤ 0 ∧ − temp0_32_3 + temp0_32_3 ≤ 0 ∧ temp0_32_3 − temp0_32_3 ≤ 0 ∧ − temp0_32_2 + temp0_32_2 ≤ 0 ∧ temp0_32_2 − temp0_32_2 ≤ 0 ∧ − temp0_32_1 + temp0_32_1 ≤ 0 ∧ temp0_32_1 − temp0_32_1 ≤ 0 ∧ − temp0_32_0 + temp0_32_0 ≤ 0 ∧ temp0_32_0 − temp0_32_0 ≤ 0 ∧ − temp0_15_0 + temp0_15_0 ≤ 0 ∧ temp0_15_0 − temp0_15_0 ≤ 0 ∧ − t_23_post + t_23_post ≤ 0 ∧ t_23_post − t_23_post ≤ 0 ∧ − t_23_1 + t_23_1 ≤ 0 ∧ t_23_1 − t_23_1 ≤ 0 ∧ − t_23_0 + t_23_0 ≤ 0 ∧ t_23_0 − t_23_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_post + result_dot_printf_sdv_special_RETURN_VALUE_41_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_post − result_dot_printf_sdv_special_RETURN_VALUE_41_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_1 + result_dot_printf_sdv_special_RETURN_VALUE_41_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_1 − result_dot_printf_sdv_special_RETURN_VALUE_41_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_0 + result_dot_printf_sdv_special_RETURN_VALUE_41_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_0 − result_dot_printf_sdv_special_RETURN_VALUE_41_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_post + result_dot_printf_sdv_special_RETURN_VALUE_38_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_post − result_dot_printf_sdv_special_RETURN_VALUE_38_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_1 + result_dot_printf_sdv_special_RETURN_VALUE_38_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_1 − result_dot_printf_sdv_special_RETURN_VALUE_38_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_0 + result_dot_printf_sdv_special_RETURN_VALUE_38_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_0 − result_dot_printf_sdv_special_RETURN_VALUE_38_0 ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_post + result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_post − result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_1 + result_dot_nondet_sdv_special_RETURN_VALUE_13_1 ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_1 − result_dot_nondet_sdv_special_RETURN_VALUE_13_1 ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_0 + result_dot_nondet_sdv_special_RETURN_VALUE_13_0 ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_0 − result_dot_nondet_sdv_special_RETURN_VALUE_13_0 ≤ 0 ∧ − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post + result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post ≤ 0 ∧ result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post ≤ 0 ∧ − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 + result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 ≤ 0 ∧ result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 ≤ 0 ∧ − result_11_post + result_11_post ≤ 0 ∧ result_11_post − result_11_post ≤ 0 ∧ − result_11_6 + result_11_6 ≤ 0 ∧ result_11_6 − result_11_6 ≤ 0 ∧ − result_11_5 + result_11_5 ≤ 0 ∧ result_11_5 − result_11_5 ≤ 0 ∧ − result_11_4 + result_11_4 ≤ 0 ∧ result_11_4 − result_11_4 ≤ 0 ∧ − result_11_3 + result_11_3 ≤ 0 ∧ result_11_3 − result_11_3 ≤ 0 ∧ − result_11_2 + result_11_2 ≤ 0 ∧ result_11_2 − result_11_2 ≤ 0 ∧ − result_11_1 + result_11_1 ≤ 0 ∧ result_11_1 − result_11_1 ≤ 0 ∧ − result_11_0 + result_11_0 ≤ 0 ∧ result_11_0 − result_11_0 ≤ 0 ∧ − rcd_72_post + rcd_72_post ≤ 0 ∧ rcd_72_post − rcd_72_post ≤ 0 ∧ − rcd_72_0 + rcd_72_0 ≤ 0 ∧ rcd_72_0 − rcd_72_0 ≤ 0 ∧ − rcd_102_post + rcd_102_post ≤ 0 ∧ rcd_102_post − rcd_102_post ≤ 0 ∧ − rcd_102_0 + rcd_102_0 ≤ 0 ∧ rcd_102_0 − rcd_102_0 ≤ 0 ∧ − r_53_post + r_53_post ≤ 0 ∧ r_53_post − r_53_post ≤ 0 ∧ − r_53_0 + r_53_0 ≤ 0 ∧ r_53_0 − r_53_0 ≤ 0 ∧ − r_161_post + r_161_post ≤ 0 ∧ r_161_post − r_161_post ≤ 0 ∧ − r_161_0 + r_161_0 ≤ 0 ∧ r_161_0 − r_161_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 ≤ 0 ∧ − nondet_12_post + nondet_12_post ≤ 0 ∧ nondet_12_post − nondet_12_post ≤ 0 ∧ − nondet_12_1 + nondet_12_1 ≤ 0 ∧ nondet_12_1 − nondet_12_1 ≤ 0 ∧ − nondet_12_0 + nondet_12_0 ≤ 0 ∧ nondet_12_0 − nondet_12_0 ≤ 0 ∧ − lt_37_post + lt_37_post ≤ 0 ∧ lt_37_post − lt_37_post ≤ 0 ∧ − lt_37_1 + lt_37_1 ≤ 0 ∧ lt_37_1 − lt_37_1 ≤ 0 ∧ − lt_37_0 + lt_37_0 ≤ 0 ∧ lt_37_0 − lt_37_0 ≤ 0 ∧ − lt_36_post + lt_36_post ≤ 0 ∧ lt_36_post − lt_36_post ≤ 0 ∧ − lt_36_0 + lt_36_0 ≤ 0 ∧ lt_36_0 − lt_36_0 ≤ 0 ∧ − lt_237_post + lt_237_post ≤ 0 ∧ lt_237_post − lt_237_post ≤ 0 ∧ − lt_237_0 + lt_237_0 ≤ 0 ∧ lt_237_0 − lt_237_0 ≤ 0 ∧ − length_43_post + length_43_post ≤ 0 ∧ length_43_post − length_43_post ≤ 0 ∧ − length_43_0 + length_43_0 ≤ 0 ∧ length_43_0 − length_43_0 ≤ 0 ∧ − len_246_post + len_246_post ≤ 0 ∧ len_246_post − len_246_post ≤ 0 ∧ − len_246_0 + len_246_0 ≤ 0 ∧ len_246_0 − len_246_0 ≤ 0 ∧ − len_180_post + len_180_post ≤ 0 ∧ len_180_post − len_180_post ≤ 0 ∧ − len_180_0 + len_180_0 ≤ 0 ∧ len_180_0 − len_180_0 ≤ 0 ∧ − i_44_post + i_44_post ≤ 0 ∧ i_44_post − i_44_post ≤ 0 ∧ − i_44_0 + i_44_0 ≤ 0 ∧ i_44_0 − i_44_0 ≤ 0 ∧ − i_125_post + i_125_post ≤ 0 ∧ i_125_post − i_125_post ≤ 0 ∧ − i_125_0 + i_125_0 ≤ 0 ∧ i_125_0 − i_125_0 ≤ 0 ∧ − i_108_post + i_108_post ≤ 0 ∧ i_108_post − i_108_post ≤ 0 ∧ − i_108_0 + i_108_0 ≤ 0 ∧ i_108_0 − i_108_0 ≤ 0 ∧ − head_46_post + head_46_post ≤ 0 ∧ head_46_post − head_46_post ≤ 0 ∧ − head_46_0 + head_46_0 ≤ 0 ∧ head_46_0 − head_46_0 ≤ 0 ∧ − fmt_31_post + fmt_31_post ≤ 0 ∧ fmt_31_post − fmt_31_post ≤ 0 ∧ − fmt_31_4 + fmt_31_4 ≤ 0 ∧ fmt_31_4 − fmt_31_4 ≤ 0 ∧ − fmt_31_3 + fmt_31_3 ≤ 0 ∧ fmt_31_3 − fmt_31_3 ≤ 0 ∧ − fmt_31_2 + fmt_31_2 ≤ 0 ∧ fmt_31_2 − fmt_31_2 ≤ 0 ∧ − fmt_31_1 + fmt_31_1 ≤ 0 ∧ fmt_31_1 − fmt_31_1 ≤ 0 ∧ − fmt_31_0 + fmt_31_0 ≤ 0 ∧ fmt_31_0 − fmt_31_0 ≤ 0 ∧ − ct_17_post + ct_17_post ≤ 0 ∧ ct_17_post − ct_17_post ≤ 0 ∧ − ct_17_2 + ct_17_2 ≤ 0 ∧ ct_17_2 − ct_17_2 ≤ 0 ∧ − ct_17_1 + ct_17_1 ≤ 0 ∧ ct_17_1 − ct_17_1 ≤ 0 ∧ − ct_17_0 + ct_17_0 ≤ 0 ∧ ct_17_0 − ct_17_0 ≤ 0 ∧ − a_328_post + a_328_post ≤ 0 ∧ a_328_post − a_328_post ≤ 0 ∧ − a_328_0 + a_328_0 ≤ 0 ∧ a_328_0 − a_328_0 ≤ 0 ∧ − a_305_post + a_305_post ≤ 0 ∧ a_305_post − a_305_post ≤ 0 ∧ − a_305_0 + a_305_0 ≤ 0 ∧ a_305_0 − a_305_0 ≤ 0 ∧ − a_283_post + a_283_post ≤ 0 ∧ a_283_post − a_283_post ≤ 0 ∧ − a_283_0 + a_283_0 ≤ 0 ∧ a_283_0 − a_283_0 ≤ 0 ∧ − a_26_post + a_26_post ≤ 0 ∧ a_26_post − a_26_post ≤ 0 ∧ − a_26_1 + a_26_1 ≤ 0 ∧ a_26_1 − a_26_1 ≤ 0 ∧ − a_26_0 + a_26_0 ≤ 0 ∧ a_26_0 − a_26_0 ≤ 0 ∧ − a_247_post + a_247_post ≤ 0 ∧ a_247_post − a_247_post ≤ 0 ∧ − a_247_0 + a_247_0 ≤ 0 ∧ a_247_0 − a_247_0 ≤ 0 ∧ − a_197_post + a_197_post ≤ 0 ∧ a_197_post − a_197_post ≤ 0 ∧ − a_197_0 + a_197_0 ≤ 0 ∧ a_197_0 − a_197_0 ≤ 0 ∧ − a_146_0 + a_146_0 ≤ 0 ∧ a_146_0 − a_146_0 ≤ 0 | |
| 63 | 99 | 18: | − y_19_post + y_19_post ≤ 0 ∧ y_19_post − y_19_post ≤ 0 ∧ − y_19_2 + y_19_2 ≤ 0 ∧ y_19_2 − y_19_2 ≤ 0 ∧ − y_19_1 + y_19_1 ≤ 0 ∧ y_19_1 − y_19_1 ≤ 0 ∧ − y_19_0 + y_19_0 ≤ 0 ∧ y_19_0 − y_19_0 ≤ 0 ∧ − x_SLAM_f_18_post + x_SLAM_f_18_post ≤ 0 ∧ x_SLAM_f_18_post − x_SLAM_f_18_post ≤ 0 ∧ − x_SLAM_f_18_2 + x_SLAM_f_18_2 ≤ 0 ∧ x_SLAM_f_18_2 − x_SLAM_f_18_2 ≤ 0 ∧ − x_SLAM_f_18_1 + x_SLAM_f_18_1 ≤ 0 ∧ x_SLAM_f_18_1 − x_SLAM_f_18_1 ≤ 0 ∧ − x_SLAM_f_18_0 + x_SLAM_f_18_0 ≤ 0 ∧ x_SLAM_f_18_0 − x_SLAM_f_18_0 ≤ 0 ∧ − x_34_post + x_34_post ≤ 0 ∧ x_34_post − x_34_post ≤ 0 ∧ − x_34_1 + x_34_1 ≤ 0 ∧ x_34_1 − x_34_1 ≤ 0 ∧ − x_34_0 + x_34_0 ≤ 0 ∧ x_34_0 − x_34_0 ≤ 0 ∧ − x_28_post + x_28_post ≤ 0 ∧ x_28_post − x_28_post ≤ 0 ∧ − x_28_1 + x_28_1 ≤ 0 ∧ x_28_1 − x_28_1 ≤ 0 ∧ − x_28_0 + x_28_0 ≤ 0 ∧ x_28_0 − x_28_0 ≤ 0 ∧ − x_238_post + x_238_post ≤ 0 ∧ x_238_post − x_238_post ≤ 0 ∧ − x_238_0 + x_238_0 ≤ 0 ∧ x_238_0 − x_238_0 ≤ 0 ∧ − x_20_post + x_20_post ≤ 0 ∧ x_20_post − x_20_post ≤ 0 ∧ − x_20_2 + x_20_2 ≤ 0 ∧ x_20_2 − x_20_2 ≤ 0 ∧ − x_20_1 + x_20_1 ≤ 0 ∧ x_20_1 − x_20_1 ≤ 0 ∧ − x_20_0 + x_20_0 ≤ 0 ∧ x_20_0 − x_20_0 ≤ 0 ∧ − x_177_post + x_177_post ≤ 0 ∧ x_177_post − x_177_post ≤ 0 ∧ − x_177_0 + x_177_0 ≤ 0 ∧ x_177_0 − x_177_0 ≤ 0 ∧ − x_16_post + x_16_post ≤ 0 ∧ x_16_post − x_16_post ≤ 0 ∧ − x_16_1 + x_16_1 ≤ 0 ∧ x_16_1 − x_16_1 ≤ 0 ∧ − x_16_0 + x_16_0 ≤ 0 ∧ x_16_0 − x_16_0 ≤ 0 ∧ − x_14_post + x_14_post ≤ 0 ∧ x_14_post − x_14_post ≤ 0 ∧ − x_14_0 + x_14_0 ≤ 0 ∧ x_14_0 − x_14_0 ≤ 0 ∧ − tmp_48_post + tmp_48_post ≤ 0 ∧ tmp_48_post − tmp_48_post ≤ 0 ∧ − tmp_48_0 + tmp_48_0 ≤ 0 ∧ tmp_48_0 − tmp_48_0 ≤ 0 ∧ − temp_49_post + temp_49_post ≤ 0 ∧ temp_49_post − temp_49_post ≤ 0 ∧ − temp_49_0 + temp_49_0 ≤ 0 ∧ temp_49_0 − temp_49_0 ≤ 0 ∧ − temp0_45_post + temp0_45_post ≤ 0 ∧ temp0_45_post − temp0_45_post ≤ 0 ∧ − temp0_45_1 + temp0_45_1 ≤ 0 ∧ temp0_45_1 − temp0_45_1 ≤ 0 ∧ − temp0_45_0 + temp0_45_0 ≤ 0 ∧ temp0_45_0 − temp0_45_0 ≤ 0 ∧ − temp0_32_post + temp0_32_post ≤ 0 ∧ temp0_32_post − temp0_32_post ≤ 0 ∧ − temp0_32_4 + temp0_32_4 ≤ 0 ∧ temp0_32_4 − temp0_32_4 ≤ 0 ∧ − temp0_32_3 + temp0_32_3 ≤ 0 ∧ temp0_32_3 − temp0_32_3 ≤ 0 ∧ − temp0_32_2 + temp0_32_2 ≤ 0 ∧ temp0_32_2 − temp0_32_2 ≤ 0 ∧ − temp0_32_1 + temp0_32_1 ≤ 0 ∧ temp0_32_1 − temp0_32_1 ≤ 0 ∧ − temp0_32_0 + temp0_32_0 ≤ 0 ∧ temp0_32_0 − temp0_32_0 ≤ 0 ∧ − temp0_15_0 + temp0_15_0 ≤ 0 ∧ temp0_15_0 − temp0_15_0 ≤ 0 ∧ − t_23_post + t_23_post ≤ 0 ∧ t_23_post − t_23_post ≤ 0 ∧ − t_23_1 + t_23_1 ≤ 0 ∧ t_23_1 − t_23_1 ≤ 0 ∧ − t_23_0 + t_23_0 ≤ 0 ∧ t_23_0 − t_23_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_post + result_dot_printf_sdv_special_RETURN_VALUE_41_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_post − result_dot_printf_sdv_special_RETURN_VALUE_41_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_1 + result_dot_printf_sdv_special_RETURN_VALUE_41_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_1 − result_dot_printf_sdv_special_RETURN_VALUE_41_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_0 + result_dot_printf_sdv_special_RETURN_VALUE_41_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_0 − result_dot_printf_sdv_special_RETURN_VALUE_41_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_post + result_dot_printf_sdv_special_RETURN_VALUE_38_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_post − result_dot_printf_sdv_special_RETURN_VALUE_38_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_1 + result_dot_printf_sdv_special_RETURN_VALUE_38_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_1 − result_dot_printf_sdv_special_RETURN_VALUE_38_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_0 + result_dot_printf_sdv_special_RETURN_VALUE_38_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_0 − result_dot_printf_sdv_special_RETURN_VALUE_38_0 ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_post + result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_post − result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_1 + result_dot_nondet_sdv_special_RETURN_VALUE_13_1 ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_1 − result_dot_nondet_sdv_special_RETURN_VALUE_13_1 ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_0 + result_dot_nondet_sdv_special_RETURN_VALUE_13_0 ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_0 − result_dot_nondet_sdv_special_RETURN_VALUE_13_0 ≤ 0 ∧ − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post + result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post ≤ 0 ∧ result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post ≤ 0 ∧ − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 + result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 ≤ 0 ∧ result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 ≤ 0 ∧ − result_11_post + result_11_post ≤ 0 ∧ result_11_post − result_11_post ≤ 0 ∧ − result_11_6 + result_11_6 ≤ 0 ∧ result_11_6 − result_11_6 ≤ 0 ∧ − result_11_5 + result_11_5 ≤ 0 ∧ result_11_5 − result_11_5 ≤ 0 ∧ − result_11_4 + result_11_4 ≤ 0 ∧ result_11_4 − result_11_4 ≤ 0 ∧ − result_11_3 + result_11_3 ≤ 0 ∧ result_11_3 − result_11_3 ≤ 0 ∧ − result_11_2 + result_11_2 ≤ 0 ∧ result_11_2 − result_11_2 ≤ 0 ∧ − result_11_1 + result_11_1 ≤ 0 ∧ result_11_1 − result_11_1 ≤ 0 ∧ − result_11_0 + result_11_0 ≤ 0 ∧ result_11_0 − result_11_0 ≤ 0 ∧ − rcd_72_post + rcd_72_post ≤ 0 ∧ rcd_72_post − rcd_72_post ≤ 0 ∧ − rcd_72_0 + rcd_72_0 ≤ 0 ∧ rcd_72_0 − rcd_72_0 ≤ 0 ∧ − rcd_102_post + rcd_102_post ≤ 0 ∧ rcd_102_post − rcd_102_post ≤ 0 ∧ − rcd_102_0 + rcd_102_0 ≤ 0 ∧ rcd_102_0 − rcd_102_0 ≤ 0 ∧ − r_53_post + r_53_post ≤ 0 ∧ r_53_post − r_53_post ≤ 0 ∧ − r_53_0 + r_53_0 ≤ 0 ∧ r_53_0 − r_53_0 ≤ 0 ∧ − r_161_post + r_161_post ≤ 0 ∧ r_161_post − r_161_post ≤ 0 ∧ − r_161_0 + r_161_0 ≤ 0 ∧ r_161_0 − r_161_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 ≤ 0 ∧ − nondet_12_post + nondet_12_post ≤ 0 ∧ nondet_12_post − nondet_12_post ≤ 0 ∧ − nondet_12_1 + nondet_12_1 ≤ 0 ∧ nondet_12_1 − nondet_12_1 ≤ 0 ∧ − nondet_12_0 + nondet_12_0 ≤ 0 ∧ nondet_12_0 − nondet_12_0 ≤ 0 ∧ − lt_37_post + lt_37_post ≤ 0 ∧ lt_37_post − lt_37_post ≤ 0 ∧ − lt_37_1 + lt_37_1 ≤ 0 ∧ lt_37_1 − lt_37_1 ≤ 0 ∧ − lt_37_0 + lt_37_0 ≤ 0 ∧ lt_37_0 − lt_37_0 ≤ 0 ∧ − lt_36_post + lt_36_post ≤ 0 ∧ lt_36_post − lt_36_post ≤ 0 ∧ − lt_36_0 + lt_36_0 ≤ 0 ∧ lt_36_0 − lt_36_0 ≤ 0 ∧ − lt_237_post + lt_237_post ≤ 0 ∧ lt_237_post − lt_237_post ≤ 0 ∧ − lt_237_0 + lt_237_0 ≤ 0 ∧ lt_237_0 − lt_237_0 ≤ 0 ∧ − length_43_post + length_43_post ≤ 0 ∧ length_43_post − length_43_post ≤ 0 ∧ − length_43_0 + length_43_0 ≤ 0 ∧ length_43_0 − length_43_0 ≤ 0 ∧ − len_246_post + len_246_post ≤ 0 ∧ len_246_post − len_246_post ≤ 0 ∧ − len_246_0 + len_246_0 ≤ 0 ∧ len_246_0 − len_246_0 ≤ 0 ∧ − len_180_post + len_180_post ≤ 0 ∧ len_180_post − len_180_post ≤ 0 ∧ − len_180_0 + len_180_0 ≤ 0 ∧ len_180_0 − len_180_0 ≤ 0 ∧ − i_44_post + i_44_post ≤ 0 ∧ i_44_post − i_44_post ≤ 0 ∧ − i_44_0 + i_44_0 ≤ 0 ∧ i_44_0 − i_44_0 ≤ 0 ∧ − i_125_post + i_125_post ≤ 0 ∧ i_125_post − i_125_post ≤ 0 ∧ − i_125_0 + i_125_0 ≤ 0 ∧ i_125_0 − i_125_0 ≤ 0 ∧ − i_108_post + i_108_post ≤ 0 ∧ i_108_post − i_108_post ≤ 0 ∧ − i_108_0 + i_108_0 ≤ 0 ∧ i_108_0 − i_108_0 ≤ 0 ∧ − head_46_post + head_46_post ≤ 0 ∧ head_46_post − head_46_post ≤ 0 ∧ − head_46_0 + head_46_0 ≤ 0 ∧ head_46_0 − head_46_0 ≤ 0 ∧ − fmt_31_post + fmt_31_post ≤ 0 ∧ fmt_31_post − fmt_31_post ≤ 0 ∧ − fmt_31_4 + fmt_31_4 ≤ 0 ∧ fmt_31_4 − fmt_31_4 ≤ 0 ∧ − fmt_31_3 + fmt_31_3 ≤ 0 ∧ fmt_31_3 − fmt_31_3 ≤ 0 ∧ − fmt_31_2 + fmt_31_2 ≤ 0 ∧ fmt_31_2 − fmt_31_2 ≤ 0 ∧ − fmt_31_1 + fmt_31_1 ≤ 0 ∧ fmt_31_1 − fmt_31_1 ≤ 0 ∧ − fmt_31_0 + fmt_31_0 ≤ 0 ∧ fmt_31_0 − fmt_31_0 ≤ 0 ∧ − ct_17_post + ct_17_post ≤ 0 ∧ ct_17_post − ct_17_post ≤ 0 ∧ − ct_17_2 + ct_17_2 ≤ 0 ∧ ct_17_2 − ct_17_2 ≤ 0 ∧ − ct_17_1 + ct_17_1 ≤ 0 ∧ ct_17_1 − ct_17_1 ≤ 0 ∧ − ct_17_0 + ct_17_0 ≤ 0 ∧ ct_17_0 − ct_17_0 ≤ 0 ∧ − a_328_post + a_328_post ≤ 0 ∧ a_328_post − a_328_post ≤ 0 ∧ − a_328_0 + a_328_0 ≤ 0 ∧ a_328_0 − a_328_0 ≤ 0 ∧ − a_305_post + a_305_post ≤ 0 ∧ a_305_post − a_305_post ≤ 0 ∧ − a_305_0 + a_305_0 ≤ 0 ∧ a_305_0 − a_305_0 ≤ 0 ∧ − a_283_post + a_283_post ≤ 0 ∧ a_283_post − a_283_post ≤ 0 ∧ − a_283_0 + a_283_0 ≤ 0 ∧ a_283_0 − a_283_0 ≤ 0 ∧ − a_26_post + a_26_post ≤ 0 ∧ a_26_post − a_26_post ≤ 0 ∧ − a_26_1 + a_26_1 ≤ 0 ∧ a_26_1 − a_26_1 ≤ 0 ∧ − a_26_0 + a_26_0 ≤ 0 ∧ a_26_0 − a_26_0 ≤ 0 ∧ − a_247_post + a_247_post ≤ 0 ∧ a_247_post − a_247_post ≤ 0 ∧ − a_247_0 + a_247_0 ≤ 0 ∧ a_247_0 − a_247_0 ≤ 0 ∧ − a_197_post + a_197_post ≤ 0 ∧ a_197_post − a_197_post ≤ 0 ∧ − a_197_0 + a_197_0 ≤ 0 ∧ a_197_0 − a_197_0 ≤ 0 ∧ − a_146_0 + a_146_0 ≤ 0 ∧ a_146_0 − a_146_0 ≤ 0 | 
| 10 | 100 | : | − y_19_post + y_19_post ≤ 0 ∧ y_19_post − y_19_post ≤ 0 ∧ − y_19_2 + y_19_2 ≤ 0 ∧ y_19_2 − y_19_2 ≤ 0 ∧ − y_19_1 + y_19_1 ≤ 0 ∧ y_19_1 − y_19_1 ≤ 0 ∧ − y_19_0 + y_19_0 ≤ 0 ∧ y_19_0 − y_19_0 ≤ 0 ∧ − x_SLAM_f_18_post + x_SLAM_f_18_post ≤ 0 ∧ x_SLAM_f_18_post − x_SLAM_f_18_post ≤ 0 ∧ − x_SLAM_f_18_2 + x_SLAM_f_18_2 ≤ 0 ∧ x_SLAM_f_18_2 − x_SLAM_f_18_2 ≤ 0 ∧ − x_SLAM_f_18_1 + x_SLAM_f_18_1 ≤ 0 ∧ x_SLAM_f_18_1 − x_SLAM_f_18_1 ≤ 0 ∧ − x_SLAM_f_18_0 + x_SLAM_f_18_0 ≤ 0 ∧ x_SLAM_f_18_0 − x_SLAM_f_18_0 ≤ 0 ∧ − x_34_post + x_34_post ≤ 0 ∧ x_34_post − x_34_post ≤ 0 ∧ − x_34_1 + x_34_1 ≤ 0 ∧ x_34_1 − x_34_1 ≤ 0 ∧ − x_34_0 + x_34_0 ≤ 0 ∧ x_34_0 − x_34_0 ≤ 0 ∧ − x_28_post + x_28_post ≤ 0 ∧ x_28_post − x_28_post ≤ 0 ∧ − x_28_1 + x_28_1 ≤ 0 ∧ x_28_1 − x_28_1 ≤ 0 ∧ − x_28_0 + x_28_0 ≤ 0 ∧ x_28_0 − x_28_0 ≤ 0 ∧ − x_238_post + x_238_post ≤ 0 ∧ x_238_post − x_238_post ≤ 0 ∧ − x_238_0 + x_238_0 ≤ 0 ∧ x_238_0 − x_238_0 ≤ 0 ∧ − x_20_post + x_20_post ≤ 0 ∧ x_20_post − x_20_post ≤ 0 ∧ − x_20_2 + x_20_2 ≤ 0 ∧ x_20_2 − x_20_2 ≤ 0 ∧ − x_20_1 + x_20_1 ≤ 0 ∧ x_20_1 − x_20_1 ≤ 0 ∧ − x_20_0 + x_20_0 ≤ 0 ∧ x_20_0 − x_20_0 ≤ 0 ∧ − x_177_post + x_177_post ≤ 0 ∧ x_177_post − x_177_post ≤ 0 ∧ − x_177_0 + x_177_0 ≤ 0 ∧ x_177_0 − x_177_0 ≤ 0 ∧ − x_16_post + x_16_post ≤ 0 ∧ x_16_post − x_16_post ≤ 0 ∧ − x_16_1 + x_16_1 ≤ 0 ∧ x_16_1 − x_16_1 ≤ 0 ∧ − x_16_0 + x_16_0 ≤ 0 ∧ x_16_0 − x_16_0 ≤ 0 ∧ − x_14_post + x_14_post ≤ 0 ∧ x_14_post − x_14_post ≤ 0 ∧ − x_14_0 + x_14_0 ≤ 0 ∧ x_14_0 − x_14_0 ≤ 0 ∧ − tmp_48_post + tmp_48_post ≤ 0 ∧ tmp_48_post − tmp_48_post ≤ 0 ∧ − tmp_48_0 + tmp_48_0 ≤ 0 ∧ tmp_48_0 − tmp_48_0 ≤ 0 ∧ − temp_49_post + temp_49_post ≤ 0 ∧ temp_49_post − temp_49_post ≤ 0 ∧ − temp_49_0 + temp_49_0 ≤ 0 ∧ temp_49_0 − temp_49_0 ≤ 0 ∧ − temp0_45_post + temp0_45_post ≤ 0 ∧ temp0_45_post − temp0_45_post ≤ 0 ∧ − temp0_45_1 + temp0_45_1 ≤ 0 ∧ temp0_45_1 − temp0_45_1 ≤ 0 ∧ − temp0_45_0 + temp0_45_0 ≤ 0 ∧ temp0_45_0 − temp0_45_0 ≤ 0 ∧ − temp0_32_post + temp0_32_post ≤ 0 ∧ temp0_32_post − temp0_32_post ≤ 0 ∧ − temp0_32_4 + temp0_32_4 ≤ 0 ∧ temp0_32_4 − temp0_32_4 ≤ 0 ∧ − temp0_32_3 + temp0_32_3 ≤ 0 ∧ temp0_32_3 − temp0_32_3 ≤ 0 ∧ − temp0_32_2 + temp0_32_2 ≤ 0 ∧ temp0_32_2 − temp0_32_2 ≤ 0 ∧ − temp0_32_1 + temp0_32_1 ≤ 0 ∧ temp0_32_1 − temp0_32_1 ≤ 0 ∧ − temp0_32_0 + temp0_32_0 ≤ 0 ∧ temp0_32_0 − temp0_32_0 ≤ 0 ∧ − temp0_15_0 + temp0_15_0 ≤ 0 ∧ temp0_15_0 − temp0_15_0 ≤ 0 ∧ − t_23_post + t_23_post ≤ 0 ∧ t_23_post − t_23_post ≤ 0 ∧ − t_23_1 + t_23_1 ≤ 0 ∧ t_23_1 − t_23_1 ≤ 0 ∧ − t_23_0 + t_23_0 ≤ 0 ∧ t_23_0 − t_23_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_post + result_dot_printf_sdv_special_RETURN_VALUE_41_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_post − result_dot_printf_sdv_special_RETURN_VALUE_41_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_1 + result_dot_printf_sdv_special_RETURN_VALUE_41_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_1 − result_dot_printf_sdv_special_RETURN_VALUE_41_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_0 + result_dot_printf_sdv_special_RETURN_VALUE_41_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_0 − result_dot_printf_sdv_special_RETURN_VALUE_41_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_post + result_dot_printf_sdv_special_RETURN_VALUE_38_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_post − result_dot_printf_sdv_special_RETURN_VALUE_38_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_1 + result_dot_printf_sdv_special_RETURN_VALUE_38_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_1 − result_dot_printf_sdv_special_RETURN_VALUE_38_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_0 + result_dot_printf_sdv_special_RETURN_VALUE_38_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_0 − result_dot_printf_sdv_special_RETURN_VALUE_38_0 ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_post + result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_post − result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_1 + result_dot_nondet_sdv_special_RETURN_VALUE_13_1 ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_1 − result_dot_nondet_sdv_special_RETURN_VALUE_13_1 ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_0 + result_dot_nondet_sdv_special_RETURN_VALUE_13_0 ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_0 − result_dot_nondet_sdv_special_RETURN_VALUE_13_0 ≤ 0 ∧ − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post + result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post ≤ 0 ∧ result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post ≤ 0 ∧ − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 + result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 ≤ 0 ∧ result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 ≤ 0 ∧ − result_11_post + result_11_post ≤ 0 ∧ result_11_post − result_11_post ≤ 0 ∧ − result_11_6 + result_11_6 ≤ 0 ∧ result_11_6 − result_11_6 ≤ 0 ∧ − result_11_5 + result_11_5 ≤ 0 ∧ result_11_5 − result_11_5 ≤ 0 ∧ − result_11_4 + result_11_4 ≤ 0 ∧ result_11_4 − result_11_4 ≤ 0 ∧ − result_11_3 + result_11_3 ≤ 0 ∧ result_11_3 − result_11_3 ≤ 0 ∧ − result_11_2 + result_11_2 ≤ 0 ∧ result_11_2 − result_11_2 ≤ 0 ∧ − result_11_1 + result_11_1 ≤ 0 ∧ result_11_1 − result_11_1 ≤ 0 ∧ − result_11_0 + result_11_0 ≤ 0 ∧ result_11_0 − result_11_0 ≤ 0 ∧ − rcd_72_post + rcd_72_post ≤ 0 ∧ rcd_72_post − rcd_72_post ≤ 0 ∧ − rcd_72_0 + rcd_72_0 ≤ 0 ∧ rcd_72_0 − rcd_72_0 ≤ 0 ∧ − rcd_102_post + rcd_102_post ≤ 0 ∧ rcd_102_post − rcd_102_post ≤ 0 ∧ − rcd_102_0 + rcd_102_0 ≤ 0 ∧ rcd_102_0 − rcd_102_0 ≤ 0 ∧ − r_53_post + r_53_post ≤ 0 ∧ r_53_post − r_53_post ≤ 0 ∧ − r_53_0 + r_53_0 ≤ 0 ∧ r_53_0 − r_53_0 ≤ 0 ∧ − r_161_post + r_161_post ≤ 0 ∧ r_161_post − r_161_post ≤ 0 ∧ − r_161_0 + r_161_0 ≤ 0 ∧ r_161_0 − r_161_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 ≤ 0 ∧ − nondet_12_post + nondet_12_post ≤ 0 ∧ nondet_12_post − nondet_12_post ≤ 0 ∧ − nondet_12_1 + nondet_12_1 ≤ 0 ∧ nondet_12_1 − nondet_12_1 ≤ 0 ∧ − nondet_12_0 + nondet_12_0 ≤ 0 ∧ nondet_12_0 − nondet_12_0 ≤ 0 ∧ − lt_37_post + lt_37_post ≤ 0 ∧ lt_37_post − lt_37_post ≤ 0 ∧ − lt_37_1 + lt_37_1 ≤ 0 ∧ lt_37_1 − lt_37_1 ≤ 0 ∧ − lt_37_0 + lt_37_0 ≤ 0 ∧ lt_37_0 − lt_37_0 ≤ 0 ∧ − lt_36_post + lt_36_post ≤ 0 ∧ lt_36_post − lt_36_post ≤ 0 ∧ − lt_36_0 + lt_36_0 ≤ 0 ∧ lt_36_0 − lt_36_0 ≤ 0 ∧ − lt_237_post + lt_237_post ≤ 0 ∧ lt_237_post − lt_237_post ≤ 0 ∧ − lt_237_0 + lt_237_0 ≤ 0 ∧ lt_237_0 − lt_237_0 ≤ 0 ∧ − length_43_post + length_43_post ≤ 0 ∧ length_43_post − length_43_post ≤ 0 ∧ − length_43_0 + length_43_0 ≤ 0 ∧ length_43_0 − length_43_0 ≤ 0 ∧ − len_246_post + len_246_post ≤ 0 ∧ len_246_post − len_246_post ≤ 0 ∧ − len_246_0 + len_246_0 ≤ 0 ∧ len_246_0 − len_246_0 ≤ 0 ∧ − len_180_post + len_180_post ≤ 0 ∧ len_180_post − len_180_post ≤ 0 ∧ − len_180_0 + len_180_0 ≤ 0 ∧ len_180_0 − len_180_0 ≤ 0 ∧ − i_44_post + i_44_post ≤ 0 ∧ i_44_post − i_44_post ≤ 0 ∧ − i_44_0 + i_44_0 ≤ 0 ∧ i_44_0 − i_44_0 ≤ 0 ∧ − i_125_post + i_125_post ≤ 0 ∧ i_125_post − i_125_post ≤ 0 ∧ − i_125_0 + i_125_0 ≤ 0 ∧ i_125_0 − i_125_0 ≤ 0 ∧ − i_108_post + i_108_post ≤ 0 ∧ i_108_post − i_108_post ≤ 0 ∧ − i_108_0 + i_108_0 ≤ 0 ∧ i_108_0 − i_108_0 ≤ 0 ∧ − head_46_post + head_46_post ≤ 0 ∧ head_46_post − head_46_post ≤ 0 ∧ − head_46_0 + head_46_0 ≤ 0 ∧ head_46_0 − head_46_0 ≤ 0 ∧ − fmt_31_post + fmt_31_post ≤ 0 ∧ fmt_31_post − fmt_31_post ≤ 0 ∧ − fmt_31_4 + fmt_31_4 ≤ 0 ∧ fmt_31_4 − fmt_31_4 ≤ 0 ∧ − fmt_31_3 + fmt_31_3 ≤ 0 ∧ fmt_31_3 − fmt_31_3 ≤ 0 ∧ − fmt_31_2 + fmt_31_2 ≤ 0 ∧ fmt_31_2 − fmt_31_2 ≤ 0 ∧ − fmt_31_1 + fmt_31_1 ≤ 0 ∧ fmt_31_1 − fmt_31_1 ≤ 0 ∧ − fmt_31_0 + fmt_31_0 ≤ 0 ∧ fmt_31_0 − fmt_31_0 ≤ 0 ∧ − ct_17_post + ct_17_post ≤ 0 ∧ ct_17_post − ct_17_post ≤ 0 ∧ − ct_17_2 + ct_17_2 ≤ 0 ∧ ct_17_2 − ct_17_2 ≤ 0 ∧ − ct_17_1 + ct_17_1 ≤ 0 ∧ ct_17_1 − ct_17_1 ≤ 0 ∧ − ct_17_0 + ct_17_0 ≤ 0 ∧ ct_17_0 − ct_17_0 ≤ 0 ∧ − a_328_post + a_328_post ≤ 0 ∧ a_328_post − a_328_post ≤ 0 ∧ − a_328_0 + a_328_0 ≤ 0 ∧ a_328_0 − a_328_0 ≤ 0 ∧ − a_305_post + a_305_post ≤ 0 ∧ a_305_post − a_305_post ≤ 0 ∧ − a_305_0 + a_305_0 ≤ 0 ∧ a_305_0 − a_305_0 ≤ 0 ∧ − a_283_post + a_283_post ≤ 0 ∧ a_283_post − a_283_post ≤ 0 ∧ − a_283_0 + a_283_0 ≤ 0 ∧ a_283_0 − a_283_0 ≤ 0 ∧ − a_26_post + a_26_post ≤ 0 ∧ a_26_post − a_26_post ≤ 0 ∧ − a_26_1 + a_26_1 ≤ 0 ∧ a_26_1 − a_26_1 ≤ 0 ∧ − a_26_0 + a_26_0 ≤ 0 ∧ a_26_0 − a_26_0 ≤ 0 ∧ − a_247_post + a_247_post ≤ 0 ∧ a_247_post − a_247_post ≤ 0 ∧ − a_247_0 + a_247_0 ≤ 0 ∧ a_247_0 − a_247_0 ≤ 0 ∧ − a_197_post + a_197_post ≤ 0 ∧ a_197_post − a_197_post ≤ 0 ∧ − a_197_0 + a_197_0 ≤ 0 ∧ a_197_0 − a_197_0 ≤ 0 ∧ − a_146_0 + a_146_0 ≤ 0 ∧ a_146_0 − a_146_0 ≤ 0 | 
| 33 | 107 | : | − y_19_post + y_19_post ≤ 0 ∧ y_19_post − y_19_post ≤ 0 ∧ − y_19_2 + y_19_2 ≤ 0 ∧ y_19_2 − y_19_2 ≤ 0 ∧ − y_19_1 + y_19_1 ≤ 0 ∧ y_19_1 − y_19_1 ≤ 0 ∧ − y_19_0 + y_19_0 ≤ 0 ∧ y_19_0 − y_19_0 ≤ 0 ∧ − x_SLAM_f_18_post + x_SLAM_f_18_post ≤ 0 ∧ x_SLAM_f_18_post − x_SLAM_f_18_post ≤ 0 ∧ − x_SLAM_f_18_2 + x_SLAM_f_18_2 ≤ 0 ∧ x_SLAM_f_18_2 − x_SLAM_f_18_2 ≤ 0 ∧ − x_SLAM_f_18_1 + x_SLAM_f_18_1 ≤ 0 ∧ x_SLAM_f_18_1 − x_SLAM_f_18_1 ≤ 0 ∧ − x_SLAM_f_18_0 + x_SLAM_f_18_0 ≤ 0 ∧ x_SLAM_f_18_0 − x_SLAM_f_18_0 ≤ 0 ∧ − x_34_post + x_34_post ≤ 0 ∧ x_34_post − x_34_post ≤ 0 ∧ − x_34_1 + x_34_1 ≤ 0 ∧ x_34_1 − x_34_1 ≤ 0 ∧ − x_34_0 + x_34_0 ≤ 0 ∧ x_34_0 − x_34_0 ≤ 0 ∧ − x_28_post + x_28_post ≤ 0 ∧ x_28_post − x_28_post ≤ 0 ∧ − x_28_1 + x_28_1 ≤ 0 ∧ x_28_1 − x_28_1 ≤ 0 ∧ − x_28_0 + x_28_0 ≤ 0 ∧ x_28_0 − x_28_0 ≤ 0 ∧ − x_238_post + x_238_post ≤ 0 ∧ x_238_post − x_238_post ≤ 0 ∧ − x_238_0 + x_238_0 ≤ 0 ∧ x_238_0 − x_238_0 ≤ 0 ∧ − x_20_post + x_20_post ≤ 0 ∧ x_20_post − x_20_post ≤ 0 ∧ − x_20_2 + x_20_2 ≤ 0 ∧ x_20_2 − x_20_2 ≤ 0 ∧ − x_20_1 + x_20_1 ≤ 0 ∧ x_20_1 − x_20_1 ≤ 0 ∧ − x_20_0 + x_20_0 ≤ 0 ∧ x_20_0 − x_20_0 ≤ 0 ∧ − x_177_post + x_177_post ≤ 0 ∧ x_177_post − x_177_post ≤ 0 ∧ − x_177_0 + x_177_0 ≤ 0 ∧ x_177_0 − x_177_0 ≤ 0 ∧ − x_16_post + x_16_post ≤ 0 ∧ x_16_post − x_16_post ≤ 0 ∧ − x_16_1 + x_16_1 ≤ 0 ∧ x_16_1 − x_16_1 ≤ 0 ∧ − x_16_0 + x_16_0 ≤ 0 ∧ x_16_0 − x_16_0 ≤ 0 ∧ − x_14_post + x_14_post ≤ 0 ∧ x_14_post − x_14_post ≤ 0 ∧ − x_14_0 + x_14_0 ≤ 0 ∧ x_14_0 − x_14_0 ≤ 0 ∧ − tmp_48_post + tmp_48_post ≤ 0 ∧ tmp_48_post − tmp_48_post ≤ 0 ∧ − tmp_48_0 + tmp_48_0 ≤ 0 ∧ tmp_48_0 − tmp_48_0 ≤ 0 ∧ − temp_49_post + temp_49_post ≤ 0 ∧ temp_49_post − temp_49_post ≤ 0 ∧ − temp_49_0 + temp_49_0 ≤ 0 ∧ temp_49_0 − temp_49_0 ≤ 0 ∧ − temp0_45_post + temp0_45_post ≤ 0 ∧ temp0_45_post − temp0_45_post ≤ 0 ∧ − temp0_45_1 + temp0_45_1 ≤ 0 ∧ temp0_45_1 − temp0_45_1 ≤ 0 ∧ − temp0_45_0 + temp0_45_0 ≤ 0 ∧ temp0_45_0 − temp0_45_0 ≤ 0 ∧ − temp0_32_post + temp0_32_post ≤ 0 ∧ temp0_32_post − temp0_32_post ≤ 0 ∧ − temp0_32_4 + temp0_32_4 ≤ 0 ∧ temp0_32_4 − temp0_32_4 ≤ 0 ∧ − temp0_32_3 + temp0_32_3 ≤ 0 ∧ temp0_32_3 − temp0_32_3 ≤ 0 ∧ − temp0_32_2 + temp0_32_2 ≤ 0 ∧ temp0_32_2 − temp0_32_2 ≤ 0 ∧ − temp0_32_1 + temp0_32_1 ≤ 0 ∧ temp0_32_1 − temp0_32_1 ≤ 0 ∧ − temp0_32_0 + temp0_32_0 ≤ 0 ∧ temp0_32_0 − temp0_32_0 ≤ 0 ∧ − temp0_15_0 + temp0_15_0 ≤ 0 ∧ temp0_15_0 − temp0_15_0 ≤ 0 ∧ − t_23_post + t_23_post ≤ 0 ∧ t_23_post − t_23_post ≤ 0 ∧ − t_23_1 + t_23_1 ≤ 0 ∧ t_23_1 − t_23_1 ≤ 0 ∧ − t_23_0 + t_23_0 ≤ 0 ∧ t_23_0 − t_23_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_post + result_dot_printf_sdv_special_RETURN_VALUE_41_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_post − result_dot_printf_sdv_special_RETURN_VALUE_41_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_1 + result_dot_printf_sdv_special_RETURN_VALUE_41_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_1 − result_dot_printf_sdv_special_RETURN_VALUE_41_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_0 + result_dot_printf_sdv_special_RETURN_VALUE_41_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_0 − result_dot_printf_sdv_special_RETURN_VALUE_41_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_post + result_dot_printf_sdv_special_RETURN_VALUE_38_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_post − result_dot_printf_sdv_special_RETURN_VALUE_38_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_1 + result_dot_printf_sdv_special_RETURN_VALUE_38_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_1 − result_dot_printf_sdv_special_RETURN_VALUE_38_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_0 + result_dot_printf_sdv_special_RETURN_VALUE_38_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_0 − result_dot_printf_sdv_special_RETURN_VALUE_38_0 ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_post + result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_post − result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_1 + result_dot_nondet_sdv_special_RETURN_VALUE_13_1 ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_1 − result_dot_nondet_sdv_special_RETURN_VALUE_13_1 ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_0 + result_dot_nondet_sdv_special_RETURN_VALUE_13_0 ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_0 − result_dot_nondet_sdv_special_RETURN_VALUE_13_0 ≤ 0 ∧ − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post + result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post ≤ 0 ∧ result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post ≤ 0 ∧ − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 + result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 ≤ 0 ∧ result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 ≤ 0 ∧ − result_11_post + result_11_post ≤ 0 ∧ result_11_post − result_11_post ≤ 0 ∧ − result_11_6 + result_11_6 ≤ 0 ∧ result_11_6 − result_11_6 ≤ 0 ∧ − result_11_5 + result_11_5 ≤ 0 ∧ result_11_5 − result_11_5 ≤ 0 ∧ − result_11_4 + result_11_4 ≤ 0 ∧ result_11_4 − result_11_4 ≤ 0 ∧ − result_11_3 + result_11_3 ≤ 0 ∧ result_11_3 − result_11_3 ≤ 0 ∧ − result_11_2 + result_11_2 ≤ 0 ∧ result_11_2 − result_11_2 ≤ 0 ∧ − result_11_1 + result_11_1 ≤ 0 ∧ result_11_1 − result_11_1 ≤ 0 ∧ − result_11_0 + result_11_0 ≤ 0 ∧ result_11_0 − result_11_0 ≤ 0 ∧ − rcd_72_post + rcd_72_post ≤ 0 ∧ rcd_72_post − rcd_72_post ≤ 0 ∧ − rcd_72_0 + rcd_72_0 ≤ 0 ∧ rcd_72_0 − rcd_72_0 ≤ 0 ∧ − rcd_102_post + rcd_102_post ≤ 0 ∧ rcd_102_post − rcd_102_post ≤ 0 ∧ − rcd_102_0 + rcd_102_0 ≤ 0 ∧ rcd_102_0 − rcd_102_0 ≤ 0 ∧ − r_53_post + r_53_post ≤ 0 ∧ r_53_post − r_53_post ≤ 0 ∧ − r_53_0 + r_53_0 ≤ 0 ∧ r_53_0 − r_53_0 ≤ 0 ∧ − r_161_post + r_161_post ≤ 0 ∧ r_161_post − r_161_post ≤ 0 ∧ − r_161_0 + r_161_0 ≤ 0 ∧ r_161_0 − r_161_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 ≤ 0 ∧ − nondet_12_post + nondet_12_post ≤ 0 ∧ nondet_12_post − nondet_12_post ≤ 0 ∧ − nondet_12_1 + nondet_12_1 ≤ 0 ∧ nondet_12_1 − nondet_12_1 ≤ 0 ∧ − nondet_12_0 + nondet_12_0 ≤ 0 ∧ nondet_12_0 − nondet_12_0 ≤ 0 ∧ − lt_37_post + lt_37_post ≤ 0 ∧ lt_37_post − lt_37_post ≤ 0 ∧ − lt_37_1 + lt_37_1 ≤ 0 ∧ lt_37_1 − lt_37_1 ≤ 0 ∧ − lt_37_0 + lt_37_0 ≤ 0 ∧ lt_37_0 − lt_37_0 ≤ 0 ∧ − lt_36_post + lt_36_post ≤ 0 ∧ lt_36_post − lt_36_post ≤ 0 ∧ − lt_36_0 + lt_36_0 ≤ 0 ∧ lt_36_0 − lt_36_0 ≤ 0 ∧ − lt_237_post + lt_237_post ≤ 0 ∧ lt_237_post − lt_237_post ≤ 0 ∧ − lt_237_0 + lt_237_0 ≤ 0 ∧ lt_237_0 − lt_237_0 ≤ 0 ∧ − length_43_post + length_43_post ≤ 0 ∧ length_43_post − length_43_post ≤ 0 ∧ − length_43_0 + length_43_0 ≤ 0 ∧ length_43_0 − length_43_0 ≤ 0 ∧ − len_246_post + len_246_post ≤ 0 ∧ len_246_post − len_246_post ≤ 0 ∧ − len_246_0 + len_246_0 ≤ 0 ∧ len_246_0 − len_246_0 ≤ 0 ∧ − len_180_post + len_180_post ≤ 0 ∧ len_180_post − len_180_post ≤ 0 ∧ − len_180_0 + len_180_0 ≤ 0 ∧ len_180_0 − len_180_0 ≤ 0 ∧ − i_44_post + i_44_post ≤ 0 ∧ i_44_post − i_44_post ≤ 0 ∧ − i_44_0 + i_44_0 ≤ 0 ∧ i_44_0 − i_44_0 ≤ 0 ∧ − i_125_post + i_125_post ≤ 0 ∧ i_125_post − i_125_post ≤ 0 ∧ − i_125_0 + i_125_0 ≤ 0 ∧ i_125_0 − i_125_0 ≤ 0 ∧ − i_108_post + i_108_post ≤ 0 ∧ i_108_post − i_108_post ≤ 0 ∧ − i_108_0 + i_108_0 ≤ 0 ∧ i_108_0 − i_108_0 ≤ 0 ∧ − head_46_post + head_46_post ≤ 0 ∧ head_46_post − head_46_post ≤ 0 ∧ − head_46_0 + head_46_0 ≤ 0 ∧ head_46_0 − head_46_0 ≤ 0 ∧ − fmt_31_post + fmt_31_post ≤ 0 ∧ fmt_31_post − fmt_31_post ≤ 0 ∧ − fmt_31_4 + fmt_31_4 ≤ 0 ∧ fmt_31_4 − fmt_31_4 ≤ 0 ∧ − fmt_31_3 + fmt_31_3 ≤ 0 ∧ fmt_31_3 − fmt_31_3 ≤ 0 ∧ − fmt_31_2 + fmt_31_2 ≤ 0 ∧ fmt_31_2 − fmt_31_2 ≤ 0 ∧ − fmt_31_1 + fmt_31_1 ≤ 0 ∧ fmt_31_1 − fmt_31_1 ≤ 0 ∧ − fmt_31_0 + fmt_31_0 ≤ 0 ∧ fmt_31_0 − fmt_31_0 ≤ 0 ∧ − ct_17_post + ct_17_post ≤ 0 ∧ ct_17_post − ct_17_post ≤ 0 ∧ − ct_17_2 + ct_17_2 ≤ 0 ∧ ct_17_2 − ct_17_2 ≤ 0 ∧ − ct_17_1 + ct_17_1 ≤ 0 ∧ ct_17_1 − ct_17_1 ≤ 0 ∧ − ct_17_0 + ct_17_0 ≤ 0 ∧ ct_17_0 − ct_17_0 ≤ 0 ∧ − a_328_post + a_328_post ≤ 0 ∧ a_328_post − a_328_post ≤ 0 ∧ − a_328_0 + a_328_0 ≤ 0 ∧ a_328_0 − a_328_0 ≤ 0 ∧ − a_305_post + a_305_post ≤ 0 ∧ a_305_post − a_305_post ≤ 0 ∧ − a_305_0 + a_305_0 ≤ 0 ∧ a_305_0 − a_305_0 ≤ 0 ∧ − a_283_post + a_283_post ≤ 0 ∧ a_283_post − a_283_post ≤ 0 ∧ − a_283_0 + a_283_0 ≤ 0 ∧ a_283_0 − a_283_0 ≤ 0 ∧ − a_26_post + a_26_post ≤ 0 ∧ a_26_post − a_26_post ≤ 0 ∧ − a_26_1 + a_26_1 ≤ 0 ∧ a_26_1 − a_26_1 ≤ 0 ∧ − a_26_0 + a_26_0 ≤ 0 ∧ a_26_0 − a_26_0 ≤ 0 ∧ − a_247_post + a_247_post ≤ 0 ∧ a_247_post − a_247_post ≤ 0 ∧ − a_247_0 + a_247_0 ≤ 0 ∧ a_247_0 − a_247_0 ≤ 0 ∧ − a_197_post + a_197_post ≤ 0 ∧ a_197_post − a_197_post ≤ 0 ∧ − a_197_0 + a_197_0 ≤ 0 ∧ a_197_0 − a_197_0 ≤ 0 ∧ − a_146_0 + a_146_0 ≤ 0 ∧ a_146_0 − a_146_0 ≤ 0 | 
| 40 | 114 | : | − y_19_post + y_19_post ≤ 0 ∧ y_19_post − y_19_post ≤ 0 ∧ − y_19_2 + y_19_2 ≤ 0 ∧ y_19_2 − y_19_2 ≤ 0 ∧ − y_19_1 + y_19_1 ≤ 0 ∧ y_19_1 − y_19_1 ≤ 0 ∧ − y_19_0 + y_19_0 ≤ 0 ∧ y_19_0 − y_19_0 ≤ 0 ∧ − x_SLAM_f_18_post + x_SLAM_f_18_post ≤ 0 ∧ x_SLAM_f_18_post − x_SLAM_f_18_post ≤ 0 ∧ − x_SLAM_f_18_2 + x_SLAM_f_18_2 ≤ 0 ∧ x_SLAM_f_18_2 − x_SLAM_f_18_2 ≤ 0 ∧ − x_SLAM_f_18_1 + x_SLAM_f_18_1 ≤ 0 ∧ x_SLAM_f_18_1 − x_SLAM_f_18_1 ≤ 0 ∧ − x_SLAM_f_18_0 + x_SLAM_f_18_0 ≤ 0 ∧ x_SLAM_f_18_0 − x_SLAM_f_18_0 ≤ 0 ∧ − x_34_post + x_34_post ≤ 0 ∧ x_34_post − x_34_post ≤ 0 ∧ − x_34_1 + x_34_1 ≤ 0 ∧ x_34_1 − x_34_1 ≤ 0 ∧ − x_34_0 + x_34_0 ≤ 0 ∧ x_34_0 − x_34_0 ≤ 0 ∧ − x_28_post + x_28_post ≤ 0 ∧ x_28_post − x_28_post ≤ 0 ∧ − x_28_1 + x_28_1 ≤ 0 ∧ x_28_1 − x_28_1 ≤ 0 ∧ − x_28_0 + x_28_0 ≤ 0 ∧ x_28_0 − x_28_0 ≤ 0 ∧ − x_238_post + x_238_post ≤ 0 ∧ x_238_post − x_238_post ≤ 0 ∧ − x_238_0 + x_238_0 ≤ 0 ∧ x_238_0 − x_238_0 ≤ 0 ∧ − x_20_post + x_20_post ≤ 0 ∧ x_20_post − x_20_post ≤ 0 ∧ − x_20_2 + x_20_2 ≤ 0 ∧ x_20_2 − x_20_2 ≤ 0 ∧ − x_20_1 + x_20_1 ≤ 0 ∧ x_20_1 − x_20_1 ≤ 0 ∧ − x_20_0 + x_20_0 ≤ 0 ∧ x_20_0 − x_20_0 ≤ 0 ∧ − x_177_post + x_177_post ≤ 0 ∧ x_177_post − x_177_post ≤ 0 ∧ − x_177_0 + x_177_0 ≤ 0 ∧ x_177_0 − x_177_0 ≤ 0 ∧ − x_16_post + x_16_post ≤ 0 ∧ x_16_post − x_16_post ≤ 0 ∧ − x_16_1 + x_16_1 ≤ 0 ∧ x_16_1 − x_16_1 ≤ 0 ∧ − x_16_0 + x_16_0 ≤ 0 ∧ x_16_0 − x_16_0 ≤ 0 ∧ − x_14_post + x_14_post ≤ 0 ∧ x_14_post − x_14_post ≤ 0 ∧ − x_14_0 + x_14_0 ≤ 0 ∧ x_14_0 − x_14_0 ≤ 0 ∧ − tmp_48_post + tmp_48_post ≤ 0 ∧ tmp_48_post − tmp_48_post ≤ 0 ∧ − tmp_48_0 + tmp_48_0 ≤ 0 ∧ tmp_48_0 − tmp_48_0 ≤ 0 ∧ − temp_49_post + temp_49_post ≤ 0 ∧ temp_49_post − temp_49_post ≤ 0 ∧ − temp_49_0 + temp_49_0 ≤ 0 ∧ temp_49_0 − temp_49_0 ≤ 0 ∧ − temp0_45_post + temp0_45_post ≤ 0 ∧ temp0_45_post − temp0_45_post ≤ 0 ∧ − temp0_45_1 + temp0_45_1 ≤ 0 ∧ temp0_45_1 − temp0_45_1 ≤ 0 ∧ − temp0_45_0 + temp0_45_0 ≤ 0 ∧ temp0_45_0 − temp0_45_0 ≤ 0 ∧ − temp0_32_post + temp0_32_post ≤ 0 ∧ temp0_32_post − temp0_32_post ≤ 0 ∧ − temp0_32_4 + temp0_32_4 ≤ 0 ∧ temp0_32_4 − temp0_32_4 ≤ 0 ∧ − temp0_32_3 + temp0_32_3 ≤ 0 ∧ temp0_32_3 − temp0_32_3 ≤ 0 ∧ − temp0_32_2 + temp0_32_2 ≤ 0 ∧ temp0_32_2 − temp0_32_2 ≤ 0 ∧ − temp0_32_1 + temp0_32_1 ≤ 0 ∧ temp0_32_1 − temp0_32_1 ≤ 0 ∧ − temp0_32_0 + temp0_32_0 ≤ 0 ∧ temp0_32_0 − temp0_32_0 ≤ 0 ∧ − temp0_15_0 + temp0_15_0 ≤ 0 ∧ temp0_15_0 − temp0_15_0 ≤ 0 ∧ − t_23_post + t_23_post ≤ 0 ∧ t_23_post − t_23_post ≤ 0 ∧ − t_23_1 + t_23_1 ≤ 0 ∧ t_23_1 − t_23_1 ≤ 0 ∧ − t_23_0 + t_23_0 ≤ 0 ∧ t_23_0 − t_23_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_post + result_dot_printf_sdv_special_RETURN_VALUE_41_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_post − result_dot_printf_sdv_special_RETURN_VALUE_41_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_1 + result_dot_printf_sdv_special_RETURN_VALUE_41_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_1 − result_dot_printf_sdv_special_RETURN_VALUE_41_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_0 + result_dot_printf_sdv_special_RETURN_VALUE_41_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_0 − result_dot_printf_sdv_special_RETURN_VALUE_41_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_post + result_dot_printf_sdv_special_RETURN_VALUE_38_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_post − result_dot_printf_sdv_special_RETURN_VALUE_38_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_1 + result_dot_printf_sdv_special_RETURN_VALUE_38_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_1 − result_dot_printf_sdv_special_RETURN_VALUE_38_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_0 + result_dot_printf_sdv_special_RETURN_VALUE_38_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_0 − result_dot_printf_sdv_special_RETURN_VALUE_38_0 ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_post + result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_post − result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_1 + result_dot_nondet_sdv_special_RETURN_VALUE_13_1 ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_1 − result_dot_nondet_sdv_special_RETURN_VALUE_13_1 ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_0 + result_dot_nondet_sdv_special_RETURN_VALUE_13_0 ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_0 − result_dot_nondet_sdv_special_RETURN_VALUE_13_0 ≤ 0 ∧ − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post + result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post ≤ 0 ∧ result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post ≤ 0 ∧ − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 + result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 ≤ 0 ∧ result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 ≤ 0 ∧ − result_11_post + result_11_post ≤ 0 ∧ result_11_post − result_11_post ≤ 0 ∧ − result_11_6 + result_11_6 ≤ 0 ∧ result_11_6 − result_11_6 ≤ 0 ∧ − result_11_5 + result_11_5 ≤ 0 ∧ result_11_5 − result_11_5 ≤ 0 ∧ − result_11_4 + result_11_4 ≤ 0 ∧ result_11_4 − result_11_4 ≤ 0 ∧ − result_11_3 + result_11_3 ≤ 0 ∧ result_11_3 − result_11_3 ≤ 0 ∧ − result_11_2 + result_11_2 ≤ 0 ∧ result_11_2 − result_11_2 ≤ 0 ∧ − result_11_1 + result_11_1 ≤ 0 ∧ result_11_1 − result_11_1 ≤ 0 ∧ − result_11_0 + result_11_0 ≤ 0 ∧ result_11_0 − result_11_0 ≤ 0 ∧ − rcd_72_post + rcd_72_post ≤ 0 ∧ rcd_72_post − rcd_72_post ≤ 0 ∧ − rcd_72_0 + rcd_72_0 ≤ 0 ∧ rcd_72_0 − rcd_72_0 ≤ 0 ∧ − rcd_102_post + rcd_102_post ≤ 0 ∧ rcd_102_post − rcd_102_post ≤ 0 ∧ − rcd_102_0 + rcd_102_0 ≤ 0 ∧ rcd_102_0 − rcd_102_0 ≤ 0 ∧ − r_53_post + r_53_post ≤ 0 ∧ r_53_post − r_53_post ≤ 0 ∧ − r_53_0 + r_53_0 ≤ 0 ∧ r_53_0 − r_53_0 ≤ 0 ∧ − r_161_post + r_161_post ≤ 0 ∧ r_161_post − r_161_post ≤ 0 ∧ − r_161_0 + r_161_0 ≤ 0 ∧ r_161_0 − r_161_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 ≤ 0 ∧ − nondet_12_post + nondet_12_post ≤ 0 ∧ nondet_12_post − nondet_12_post ≤ 0 ∧ − nondet_12_1 + nondet_12_1 ≤ 0 ∧ nondet_12_1 − nondet_12_1 ≤ 0 ∧ − nondet_12_0 + nondet_12_0 ≤ 0 ∧ nondet_12_0 − nondet_12_0 ≤ 0 ∧ − lt_37_post + lt_37_post ≤ 0 ∧ lt_37_post − lt_37_post ≤ 0 ∧ − lt_37_1 + lt_37_1 ≤ 0 ∧ lt_37_1 − lt_37_1 ≤ 0 ∧ − lt_37_0 + lt_37_0 ≤ 0 ∧ lt_37_0 − lt_37_0 ≤ 0 ∧ − lt_36_post + lt_36_post ≤ 0 ∧ lt_36_post − lt_36_post ≤ 0 ∧ − lt_36_0 + lt_36_0 ≤ 0 ∧ lt_36_0 − lt_36_0 ≤ 0 ∧ − lt_237_post + lt_237_post ≤ 0 ∧ lt_237_post − lt_237_post ≤ 0 ∧ − lt_237_0 + lt_237_0 ≤ 0 ∧ lt_237_0 − lt_237_0 ≤ 0 ∧ − length_43_post + length_43_post ≤ 0 ∧ length_43_post − length_43_post ≤ 0 ∧ − length_43_0 + length_43_0 ≤ 0 ∧ length_43_0 − length_43_0 ≤ 0 ∧ − len_246_post + len_246_post ≤ 0 ∧ len_246_post − len_246_post ≤ 0 ∧ − len_246_0 + len_246_0 ≤ 0 ∧ len_246_0 − len_246_0 ≤ 0 ∧ − len_180_post + len_180_post ≤ 0 ∧ len_180_post − len_180_post ≤ 0 ∧ − len_180_0 + len_180_0 ≤ 0 ∧ len_180_0 − len_180_0 ≤ 0 ∧ − i_44_post + i_44_post ≤ 0 ∧ i_44_post − i_44_post ≤ 0 ∧ − i_44_0 + i_44_0 ≤ 0 ∧ i_44_0 − i_44_0 ≤ 0 ∧ − i_125_post + i_125_post ≤ 0 ∧ i_125_post − i_125_post ≤ 0 ∧ − i_125_0 + i_125_0 ≤ 0 ∧ i_125_0 − i_125_0 ≤ 0 ∧ − i_108_post + i_108_post ≤ 0 ∧ i_108_post − i_108_post ≤ 0 ∧ − i_108_0 + i_108_0 ≤ 0 ∧ i_108_0 − i_108_0 ≤ 0 ∧ − head_46_post + head_46_post ≤ 0 ∧ head_46_post − head_46_post ≤ 0 ∧ − head_46_0 + head_46_0 ≤ 0 ∧ head_46_0 − head_46_0 ≤ 0 ∧ − fmt_31_post + fmt_31_post ≤ 0 ∧ fmt_31_post − fmt_31_post ≤ 0 ∧ − fmt_31_4 + fmt_31_4 ≤ 0 ∧ fmt_31_4 − fmt_31_4 ≤ 0 ∧ − fmt_31_3 + fmt_31_3 ≤ 0 ∧ fmt_31_3 − fmt_31_3 ≤ 0 ∧ − fmt_31_2 + fmt_31_2 ≤ 0 ∧ fmt_31_2 − fmt_31_2 ≤ 0 ∧ − fmt_31_1 + fmt_31_1 ≤ 0 ∧ fmt_31_1 − fmt_31_1 ≤ 0 ∧ − fmt_31_0 + fmt_31_0 ≤ 0 ∧ fmt_31_0 − fmt_31_0 ≤ 0 ∧ − ct_17_post + ct_17_post ≤ 0 ∧ ct_17_post − ct_17_post ≤ 0 ∧ − ct_17_2 + ct_17_2 ≤ 0 ∧ ct_17_2 − ct_17_2 ≤ 0 ∧ − ct_17_1 + ct_17_1 ≤ 0 ∧ ct_17_1 − ct_17_1 ≤ 0 ∧ − ct_17_0 + ct_17_0 ≤ 0 ∧ ct_17_0 − ct_17_0 ≤ 0 ∧ − a_328_post + a_328_post ≤ 0 ∧ a_328_post − a_328_post ≤ 0 ∧ − a_328_0 + a_328_0 ≤ 0 ∧ a_328_0 − a_328_0 ≤ 0 ∧ − a_305_post + a_305_post ≤ 0 ∧ a_305_post − a_305_post ≤ 0 ∧ − a_305_0 + a_305_0 ≤ 0 ∧ a_305_0 − a_305_0 ≤ 0 ∧ − a_283_post + a_283_post ≤ 0 ∧ a_283_post − a_283_post ≤ 0 ∧ − a_283_0 + a_283_0 ≤ 0 ∧ a_283_0 − a_283_0 ≤ 0 ∧ − a_26_post + a_26_post ≤ 0 ∧ a_26_post − a_26_post ≤ 0 ∧ − a_26_1 + a_26_1 ≤ 0 ∧ a_26_1 − a_26_1 ≤ 0 ∧ − a_26_0 + a_26_0 ≤ 0 ∧ a_26_0 − a_26_0 ≤ 0 ∧ − a_247_post + a_247_post ≤ 0 ∧ a_247_post − a_247_post ≤ 0 ∧ − a_247_0 + a_247_0 ≤ 0 ∧ a_247_0 − a_247_0 ≤ 0 ∧ − a_197_post + a_197_post ≤ 0 ∧ a_197_post − a_197_post ≤ 0 ∧ − a_197_0 + a_197_0 ≤ 0 ∧ a_197_0 − a_197_0 ≤ 0 ∧ − a_146_0 + a_146_0 ≤ 0 ∧ a_146_0 − a_146_0 ≤ 0 | 
We remove transitions , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , using the following ranking functions, which are bounded by −91.
| 63: | 0 | 
| 18: | 0 | 
| 19: | 0 | 
| 20: | 0 | 
| 21: | 0 | 
| 22: | 0 | 
| 23: | 0 | 
| 24: | 0 | 
| 25: | 0 | 
| 26: | 0 | 
| 27: | 0 | 
| 28: | 0 | 
| 29: | 0 | 
| 30: | 0 | 
| 31: | 0 | 
| 32: | 0 | 
| 33: | 0 | 
| 39: | 0 | 
| 34: | 0 | 
| 35: | 0 | 
| 36: | 0 | 
| 37: | 0 | 
| 38: | 0 | 
| 49: | 0 | 
| 50: | 0 | 
| 51: | 0 | 
| 52: | 0 | 
| 53: | 0 | 
| 54: | 0 | 
| 55: | 0 | 
| 40: | 0 | 
| 43: | 0 | 
| 44: | 0 | 
| 45: | 0 | 
| 46: | 0 | 
| 47: | 0 | 
| 48: | 0 | 
| 41: | 0 | 
| 42: | 0 | 
| 11: | 0 | 
| 12: | 0 | 
| 13: | 0 | 
| 14: | 0 | 
| 15: | 0 | 
| 16: | 0 | 
| 17: | 0 | 
| 10: | 0 | 
| 56: | 0 | 
| 57: | 0 | 
| 58: | 0 | 
| 59: | 0 | 
| 60: | 0 | 
| 61: | 0 | 
| 62: | 0 | 
| 3: | 0 | 
| : | −42 | 
| : | −43 | 
| : | −44 | 
| : | −45 | 
| : | −46 | 
| : | −47 | 
| : | −48 | 
| : | −49 | 
| : | −50 | 
| : | −51 | 
| : | −52 | 
| : | −53 | 
| : | −54 | 
| : | −55 | 
| : | −56 | 
| : | −57 | 
| : | −58 | 
| : | −58 | 
| : | −58 | 
| : | −58 | 
| : | −61 | 
| : | −62 | 
| : | −63 | 
| : | −64 | 
| : | −65 | 
| : | −66 | 
| : | −67 | 
| : | −68 | 
| : | −69 | 
| : | −70 | 
| : | −71 | 
| : | −72 | 
| : | −73 | 
| : | −73 | 
| : | −73 | 
| : | −73 | 
| : | −73 | 
| : | −73 | 
| : | −73 | 
| : | −73 | 
| : | −73 | 
| : | −76 | 
| : | −77 | 
| : | −78 | 
| : | −79 | 
| : | −80 | 
| : | −81 | 
| : | −82 | 
| : | −83 | 
| : | −84 | 
| : | −85 | 
| : | −85 | 
| : | −85 | 
| : | −85 | 
| : | −85 | 
| : | −85 | 
| : | −85 | 
| : | −85 | 
| : | −85 | 
| : | −85 | 
| : | −89 | 
The following skip-transition is inserted and corresponding redirections w.r.t. the old location are performed.
103 : − y_19_post + y_19_post ≤ 0 ∧ y_19_post − y_19_post ≤ 0 ∧ − y_19_2 + y_19_2 ≤ 0 ∧ y_19_2 − y_19_2 ≤ 0 ∧ − y_19_1 + y_19_1 ≤ 0 ∧ y_19_1 − y_19_1 ≤ 0 ∧ − y_19_0 + y_19_0 ≤ 0 ∧ y_19_0 − y_19_0 ≤ 0 ∧ − x_SLAM_f_18_post + x_SLAM_f_18_post ≤ 0 ∧ x_SLAM_f_18_post − x_SLAM_f_18_post ≤ 0 ∧ − x_SLAM_f_18_2 + x_SLAM_f_18_2 ≤ 0 ∧ x_SLAM_f_18_2 − x_SLAM_f_18_2 ≤ 0 ∧ − x_SLAM_f_18_1 + x_SLAM_f_18_1 ≤ 0 ∧ x_SLAM_f_18_1 − x_SLAM_f_18_1 ≤ 0 ∧ − x_SLAM_f_18_0 + x_SLAM_f_18_0 ≤ 0 ∧ x_SLAM_f_18_0 − x_SLAM_f_18_0 ≤ 0 ∧ − x_34_post + x_34_post ≤ 0 ∧ x_34_post − x_34_post ≤ 0 ∧ − x_34_1 + x_34_1 ≤ 0 ∧ x_34_1 − x_34_1 ≤ 0 ∧ − x_34_0 + x_34_0 ≤ 0 ∧ x_34_0 − x_34_0 ≤ 0 ∧ − x_28_post + x_28_post ≤ 0 ∧ x_28_post − x_28_post ≤ 0 ∧ − x_28_1 + x_28_1 ≤ 0 ∧ x_28_1 − x_28_1 ≤ 0 ∧ − x_28_0 + x_28_0 ≤ 0 ∧ x_28_0 − x_28_0 ≤ 0 ∧ − x_238_post + x_238_post ≤ 0 ∧ x_238_post − x_238_post ≤ 0 ∧ − x_238_0 + x_238_0 ≤ 0 ∧ x_238_0 − x_238_0 ≤ 0 ∧ − x_20_post + x_20_post ≤ 0 ∧ x_20_post − x_20_post ≤ 0 ∧ − x_20_2 + x_20_2 ≤ 0 ∧ x_20_2 − x_20_2 ≤ 0 ∧ − x_20_1 + x_20_1 ≤ 0 ∧ x_20_1 − x_20_1 ≤ 0 ∧ − x_20_0 + x_20_0 ≤ 0 ∧ x_20_0 − x_20_0 ≤ 0 ∧ − x_177_post + x_177_post ≤ 0 ∧ x_177_post − x_177_post ≤ 0 ∧ − x_177_0 + x_177_0 ≤ 0 ∧ x_177_0 − x_177_0 ≤ 0 ∧ − x_16_post + x_16_post ≤ 0 ∧ x_16_post − x_16_post ≤ 0 ∧ − x_16_1 + x_16_1 ≤ 0 ∧ x_16_1 − x_16_1 ≤ 0 ∧ − x_16_0 + x_16_0 ≤ 0 ∧ x_16_0 − x_16_0 ≤ 0 ∧ − x_14_post + x_14_post ≤ 0 ∧ x_14_post − x_14_post ≤ 0 ∧ − x_14_0 + x_14_0 ≤ 0 ∧ x_14_0 − x_14_0 ≤ 0 ∧ − tmp_48_post + tmp_48_post ≤ 0 ∧ tmp_48_post − tmp_48_post ≤ 0 ∧ − tmp_48_0 + tmp_48_0 ≤ 0 ∧ tmp_48_0 − tmp_48_0 ≤ 0 ∧ − temp_49_post + temp_49_post ≤ 0 ∧ temp_49_post − temp_49_post ≤ 0 ∧ − temp_49_0 + temp_49_0 ≤ 0 ∧ temp_49_0 − temp_49_0 ≤ 0 ∧ − temp0_45_post + temp0_45_post ≤ 0 ∧ temp0_45_post − temp0_45_post ≤ 0 ∧ − temp0_45_1 + temp0_45_1 ≤ 0 ∧ temp0_45_1 − temp0_45_1 ≤ 0 ∧ − temp0_45_0 + temp0_45_0 ≤ 0 ∧ temp0_45_0 − temp0_45_0 ≤ 0 ∧ − temp0_32_post + temp0_32_post ≤ 0 ∧ temp0_32_post − temp0_32_post ≤ 0 ∧ − temp0_32_4 + temp0_32_4 ≤ 0 ∧ temp0_32_4 − temp0_32_4 ≤ 0 ∧ − temp0_32_3 + temp0_32_3 ≤ 0 ∧ temp0_32_3 − temp0_32_3 ≤ 0 ∧ − temp0_32_2 + temp0_32_2 ≤ 0 ∧ temp0_32_2 − temp0_32_2 ≤ 0 ∧ − temp0_32_1 + temp0_32_1 ≤ 0 ∧ temp0_32_1 − temp0_32_1 ≤ 0 ∧ − temp0_32_0 + temp0_32_0 ≤ 0 ∧ temp0_32_0 − temp0_32_0 ≤ 0 ∧ − temp0_15_0 + temp0_15_0 ≤ 0 ∧ temp0_15_0 − temp0_15_0 ≤ 0 ∧ − t_23_post + t_23_post ≤ 0 ∧ t_23_post − t_23_post ≤ 0 ∧ − t_23_1 + t_23_1 ≤ 0 ∧ t_23_1 − t_23_1 ≤ 0 ∧ − t_23_0 + t_23_0 ≤ 0 ∧ t_23_0 − t_23_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_post + result_dot_printf_sdv_special_RETURN_VALUE_41_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_post − result_dot_printf_sdv_special_RETURN_VALUE_41_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_1 + result_dot_printf_sdv_special_RETURN_VALUE_41_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_1 − result_dot_printf_sdv_special_RETURN_VALUE_41_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_0 + result_dot_printf_sdv_special_RETURN_VALUE_41_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_0 − result_dot_printf_sdv_special_RETURN_VALUE_41_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_post + result_dot_printf_sdv_special_RETURN_VALUE_38_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_post − result_dot_printf_sdv_special_RETURN_VALUE_38_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_1 + result_dot_printf_sdv_special_RETURN_VALUE_38_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_1 − result_dot_printf_sdv_special_RETURN_VALUE_38_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_0 + result_dot_printf_sdv_special_RETURN_VALUE_38_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_0 − result_dot_printf_sdv_special_RETURN_VALUE_38_0 ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_post + result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_post − result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_1 + result_dot_nondet_sdv_special_RETURN_VALUE_13_1 ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_1 − result_dot_nondet_sdv_special_RETURN_VALUE_13_1 ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_0 + result_dot_nondet_sdv_special_RETURN_VALUE_13_0 ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_0 − result_dot_nondet_sdv_special_RETURN_VALUE_13_0 ≤ 0 ∧ − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post + result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post ≤ 0 ∧ result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post ≤ 0 ∧ − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 + result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 ≤ 0 ∧ result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 ≤ 0 ∧ − result_11_post + result_11_post ≤ 0 ∧ result_11_post − result_11_post ≤ 0 ∧ − result_11_6 + result_11_6 ≤ 0 ∧ result_11_6 − result_11_6 ≤ 0 ∧ − result_11_5 + result_11_5 ≤ 0 ∧ result_11_5 − result_11_5 ≤ 0 ∧ − result_11_4 + result_11_4 ≤ 0 ∧ result_11_4 − result_11_4 ≤ 0 ∧ − result_11_3 + result_11_3 ≤ 0 ∧ result_11_3 − result_11_3 ≤ 0 ∧ − result_11_2 + result_11_2 ≤ 0 ∧ result_11_2 − result_11_2 ≤ 0 ∧ − result_11_1 + result_11_1 ≤ 0 ∧ result_11_1 − result_11_1 ≤ 0 ∧ − result_11_0 + result_11_0 ≤ 0 ∧ result_11_0 − result_11_0 ≤ 0 ∧ − rcd_72_post + rcd_72_post ≤ 0 ∧ rcd_72_post − rcd_72_post ≤ 0 ∧ − rcd_72_0 + rcd_72_0 ≤ 0 ∧ rcd_72_0 − rcd_72_0 ≤ 0 ∧ − rcd_102_post + rcd_102_post ≤ 0 ∧ rcd_102_post − rcd_102_post ≤ 0 ∧ − rcd_102_0 + rcd_102_0 ≤ 0 ∧ rcd_102_0 − rcd_102_0 ≤ 0 ∧ − r_53_post + r_53_post ≤ 0 ∧ r_53_post − r_53_post ≤ 0 ∧ − r_53_0 + r_53_0 ≤ 0 ∧ r_53_0 − r_53_0 ≤ 0 ∧ − r_161_post + r_161_post ≤ 0 ∧ r_161_post − r_161_post ≤ 0 ∧ − r_161_0 + r_161_0 ≤ 0 ∧ r_161_0 − r_161_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 ≤ 0 ∧ − nondet_12_post + nondet_12_post ≤ 0 ∧ nondet_12_post − nondet_12_post ≤ 0 ∧ − nondet_12_1 + nondet_12_1 ≤ 0 ∧ nondet_12_1 − nondet_12_1 ≤ 0 ∧ − nondet_12_0 + nondet_12_0 ≤ 0 ∧ nondet_12_0 − nondet_12_0 ≤ 0 ∧ − lt_37_post + lt_37_post ≤ 0 ∧ lt_37_post − lt_37_post ≤ 0 ∧ − lt_37_1 + lt_37_1 ≤ 0 ∧ lt_37_1 − lt_37_1 ≤ 0 ∧ − lt_37_0 + lt_37_0 ≤ 0 ∧ lt_37_0 − lt_37_0 ≤ 0 ∧ − lt_36_post + lt_36_post ≤ 0 ∧ lt_36_post − lt_36_post ≤ 0 ∧ − lt_36_0 + lt_36_0 ≤ 0 ∧ lt_36_0 − lt_36_0 ≤ 0 ∧ − lt_237_post + lt_237_post ≤ 0 ∧ lt_237_post − lt_237_post ≤ 0 ∧ − lt_237_0 + lt_237_0 ≤ 0 ∧ lt_237_0 − lt_237_0 ≤ 0 ∧ − length_43_post + length_43_post ≤ 0 ∧ length_43_post − length_43_post ≤ 0 ∧ − length_43_0 + length_43_0 ≤ 0 ∧ length_43_0 − length_43_0 ≤ 0 ∧ − len_246_post + len_246_post ≤ 0 ∧ len_246_post − len_246_post ≤ 0 ∧ − len_246_0 + len_246_0 ≤ 0 ∧ len_246_0 − len_246_0 ≤ 0 ∧ − len_180_post + len_180_post ≤ 0 ∧ len_180_post − len_180_post ≤ 0 ∧ − len_180_0 + len_180_0 ≤ 0 ∧ len_180_0 − len_180_0 ≤ 0 ∧ − i_44_post + i_44_post ≤ 0 ∧ i_44_post − i_44_post ≤ 0 ∧ − i_44_0 + i_44_0 ≤ 0 ∧ i_44_0 − i_44_0 ≤ 0 ∧ − i_125_post + i_125_post ≤ 0 ∧ i_125_post − i_125_post ≤ 0 ∧ − i_125_0 + i_125_0 ≤ 0 ∧ i_125_0 − i_125_0 ≤ 0 ∧ − i_108_post + i_108_post ≤ 0 ∧ i_108_post − i_108_post ≤ 0 ∧ − i_108_0 + i_108_0 ≤ 0 ∧ i_108_0 − i_108_0 ≤ 0 ∧ − head_46_post + head_46_post ≤ 0 ∧ head_46_post − head_46_post ≤ 0 ∧ − head_46_0 + head_46_0 ≤ 0 ∧ head_46_0 − head_46_0 ≤ 0 ∧ − fmt_31_post + fmt_31_post ≤ 0 ∧ fmt_31_post − fmt_31_post ≤ 0 ∧ − fmt_31_4 + fmt_31_4 ≤ 0 ∧ fmt_31_4 − fmt_31_4 ≤ 0 ∧ − fmt_31_3 + fmt_31_3 ≤ 0 ∧ fmt_31_3 − fmt_31_3 ≤ 0 ∧ − fmt_31_2 + fmt_31_2 ≤ 0 ∧ fmt_31_2 − fmt_31_2 ≤ 0 ∧ − fmt_31_1 + fmt_31_1 ≤ 0 ∧ fmt_31_1 − fmt_31_1 ≤ 0 ∧ − fmt_31_0 + fmt_31_0 ≤ 0 ∧ fmt_31_0 − fmt_31_0 ≤ 0 ∧ − ct_17_post + ct_17_post ≤ 0 ∧ ct_17_post − ct_17_post ≤ 0 ∧ − ct_17_2 + ct_17_2 ≤ 0 ∧ ct_17_2 − ct_17_2 ≤ 0 ∧ − ct_17_1 + ct_17_1 ≤ 0 ∧ ct_17_1 − ct_17_1 ≤ 0 ∧ − ct_17_0 + ct_17_0 ≤ 0 ∧ ct_17_0 − ct_17_0 ≤ 0 ∧ − a_328_post + a_328_post ≤ 0 ∧ a_328_post − a_328_post ≤ 0 ∧ − a_328_0 + a_328_0 ≤ 0 ∧ a_328_0 − a_328_0 ≤ 0 ∧ − a_305_post + a_305_post ≤ 0 ∧ a_305_post − a_305_post ≤ 0 ∧ − a_305_0 + a_305_0 ≤ 0 ∧ a_305_0 − a_305_0 ≤ 0 ∧ − a_283_post + a_283_post ≤ 0 ∧ a_283_post − a_283_post ≤ 0 ∧ − a_283_0 + a_283_0 ≤ 0 ∧ a_283_0 − a_283_0 ≤ 0 ∧ − a_26_post + a_26_post ≤ 0 ∧ a_26_post − a_26_post ≤ 0 ∧ − a_26_1 + a_26_1 ≤ 0 ∧ a_26_1 − a_26_1 ≤ 0 ∧ − a_26_0 + a_26_0 ≤ 0 ∧ a_26_0 − a_26_0 ≤ 0 ∧ − a_247_post + a_247_post ≤ 0 ∧ a_247_post − a_247_post ≤ 0 ∧ − a_247_0 + a_247_0 ≤ 0 ∧ a_247_0 − a_247_0 ≤ 0 ∧ − a_197_post + a_197_post ≤ 0 ∧ a_197_post − a_197_post ≤ 0 ∧ − a_197_0 + a_197_0 ≤ 0 ∧ a_197_0 − a_197_0 ≤ 0 ∧ − a_146_0 + a_146_0 ≤ 0 ∧ a_146_0 − a_146_0 ≤ 0
The following skip-transition is inserted and corresponding redirections w.r.t. the old location are performed.
101 : − y_19_post + y_19_post ≤ 0 ∧ y_19_post − y_19_post ≤ 0 ∧ − y_19_2 + y_19_2 ≤ 0 ∧ y_19_2 − y_19_2 ≤ 0 ∧ − y_19_1 + y_19_1 ≤ 0 ∧ y_19_1 − y_19_1 ≤ 0 ∧ − y_19_0 + y_19_0 ≤ 0 ∧ y_19_0 − y_19_0 ≤ 0 ∧ − x_SLAM_f_18_post + x_SLAM_f_18_post ≤ 0 ∧ x_SLAM_f_18_post − x_SLAM_f_18_post ≤ 0 ∧ − x_SLAM_f_18_2 + x_SLAM_f_18_2 ≤ 0 ∧ x_SLAM_f_18_2 − x_SLAM_f_18_2 ≤ 0 ∧ − x_SLAM_f_18_1 + x_SLAM_f_18_1 ≤ 0 ∧ x_SLAM_f_18_1 − x_SLAM_f_18_1 ≤ 0 ∧ − x_SLAM_f_18_0 + x_SLAM_f_18_0 ≤ 0 ∧ x_SLAM_f_18_0 − x_SLAM_f_18_0 ≤ 0 ∧ − x_34_post + x_34_post ≤ 0 ∧ x_34_post − x_34_post ≤ 0 ∧ − x_34_1 + x_34_1 ≤ 0 ∧ x_34_1 − x_34_1 ≤ 0 ∧ − x_34_0 + x_34_0 ≤ 0 ∧ x_34_0 − x_34_0 ≤ 0 ∧ − x_28_post + x_28_post ≤ 0 ∧ x_28_post − x_28_post ≤ 0 ∧ − x_28_1 + x_28_1 ≤ 0 ∧ x_28_1 − x_28_1 ≤ 0 ∧ − x_28_0 + x_28_0 ≤ 0 ∧ x_28_0 − x_28_0 ≤ 0 ∧ − x_238_post + x_238_post ≤ 0 ∧ x_238_post − x_238_post ≤ 0 ∧ − x_238_0 + x_238_0 ≤ 0 ∧ x_238_0 − x_238_0 ≤ 0 ∧ − x_20_post + x_20_post ≤ 0 ∧ x_20_post − x_20_post ≤ 0 ∧ − x_20_2 + x_20_2 ≤ 0 ∧ x_20_2 − x_20_2 ≤ 0 ∧ − x_20_1 + x_20_1 ≤ 0 ∧ x_20_1 − x_20_1 ≤ 0 ∧ − x_20_0 + x_20_0 ≤ 0 ∧ x_20_0 − x_20_0 ≤ 0 ∧ − x_177_post + x_177_post ≤ 0 ∧ x_177_post − x_177_post ≤ 0 ∧ − x_177_0 + x_177_0 ≤ 0 ∧ x_177_0 − x_177_0 ≤ 0 ∧ − x_16_post + x_16_post ≤ 0 ∧ x_16_post − x_16_post ≤ 0 ∧ − x_16_1 + x_16_1 ≤ 0 ∧ x_16_1 − x_16_1 ≤ 0 ∧ − x_16_0 + x_16_0 ≤ 0 ∧ x_16_0 − x_16_0 ≤ 0 ∧ − x_14_post + x_14_post ≤ 0 ∧ x_14_post − x_14_post ≤ 0 ∧ − x_14_0 + x_14_0 ≤ 0 ∧ x_14_0 − x_14_0 ≤ 0 ∧ − tmp_48_post + tmp_48_post ≤ 0 ∧ tmp_48_post − tmp_48_post ≤ 0 ∧ − tmp_48_0 + tmp_48_0 ≤ 0 ∧ tmp_48_0 − tmp_48_0 ≤ 0 ∧ − temp_49_post + temp_49_post ≤ 0 ∧ temp_49_post − temp_49_post ≤ 0 ∧ − temp_49_0 + temp_49_0 ≤ 0 ∧ temp_49_0 − temp_49_0 ≤ 0 ∧ − temp0_45_post + temp0_45_post ≤ 0 ∧ temp0_45_post − temp0_45_post ≤ 0 ∧ − temp0_45_1 + temp0_45_1 ≤ 0 ∧ temp0_45_1 − temp0_45_1 ≤ 0 ∧ − temp0_45_0 + temp0_45_0 ≤ 0 ∧ temp0_45_0 − temp0_45_0 ≤ 0 ∧ − temp0_32_post + temp0_32_post ≤ 0 ∧ temp0_32_post − temp0_32_post ≤ 0 ∧ − temp0_32_4 + temp0_32_4 ≤ 0 ∧ temp0_32_4 − temp0_32_4 ≤ 0 ∧ − temp0_32_3 + temp0_32_3 ≤ 0 ∧ temp0_32_3 − temp0_32_3 ≤ 0 ∧ − temp0_32_2 + temp0_32_2 ≤ 0 ∧ temp0_32_2 − temp0_32_2 ≤ 0 ∧ − temp0_32_1 + temp0_32_1 ≤ 0 ∧ temp0_32_1 − temp0_32_1 ≤ 0 ∧ − temp0_32_0 + temp0_32_0 ≤ 0 ∧ temp0_32_0 − temp0_32_0 ≤ 0 ∧ − temp0_15_0 + temp0_15_0 ≤ 0 ∧ temp0_15_0 − temp0_15_0 ≤ 0 ∧ − t_23_post + t_23_post ≤ 0 ∧ t_23_post − t_23_post ≤ 0 ∧ − t_23_1 + t_23_1 ≤ 0 ∧ t_23_1 − t_23_1 ≤ 0 ∧ − t_23_0 + t_23_0 ≤ 0 ∧ t_23_0 − t_23_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_post + result_dot_printf_sdv_special_RETURN_VALUE_41_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_post − result_dot_printf_sdv_special_RETURN_VALUE_41_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_1 + result_dot_printf_sdv_special_RETURN_VALUE_41_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_1 − result_dot_printf_sdv_special_RETURN_VALUE_41_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_0 + result_dot_printf_sdv_special_RETURN_VALUE_41_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_0 − result_dot_printf_sdv_special_RETURN_VALUE_41_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_post + result_dot_printf_sdv_special_RETURN_VALUE_38_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_post − result_dot_printf_sdv_special_RETURN_VALUE_38_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_1 + result_dot_printf_sdv_special_RETURN_VALUE_38_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_1 − result_dot_printf_sdv_special_RETURN_VALUE_38_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_0 + result_dot_printf_sdv_special_RETURN_VALUE_38_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_0 − result_dot_printf_sdv_special_RETURN_VALUE_38_0 ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_post + result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_post − result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_1 + result_dot_nondet_sdv_special_RETURN_VALUE_13_1 ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_1 − result_dot_nondet_sdv_special_RETURN_VALUE_13_1 ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_0 + result_dot_nondet_sdv_special_RETURN_VALUE_13_0 ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_0 − result_dot_nondet_sdv_special_RETURN_VALUE_13_0 ≤ 0 ∧ − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post + result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post ≤ 0 ∧ result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post ≤ 0 ∧ − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 + result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 ≤ 0 ∧ result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 ≤ 0 ∧ − result_11_post + result_11_post ≤ 0 ∧ result_11_post − result_11_post ≤ 0 ∧ − result_11_6 + result_11_6 ≤ 0 ∧ result_11_6 − result_11_6 ≤ 0 ∧ − result_11_5 + result_11_5 ≤ 0 ∧ result_11_5 − result_11_5 ≤ 0 ∧ − result_11_4 + result_11_4 ≤ 0 ∧ result_11_4 − result_11_4 ≤ 0 ∧ − result_11_3 + result_11_3 ≤ 0 ∧ result_11_3 − result_11_3 ≤ 0 ∧ − result_11_2 + result_11_2 ≤ 0 ∧ result_11_2 − result_11_2 ≤ 0 ∧ − result_11_1 + result_11_1 ≤ 0 ∧ result_11_1 − result_11_1 ≤ 0 ∧ − result_11_0 + result_11_0 ≤ 0 ∧ result_11_0 − result_11_0 ≤ 0 ∧ − rcd_72_post + rcd_72_post ≤ 0 ∧ rcd_72_post − rcd_72_post ≤ 0 ∧ − rcd_72_0 + rcd_72_0 ≤ 0 ∧ rcd_72_0 − rcd_72_0 ≤ 0 ∧ − rcd_102_post + rcd_102_post ≤ 0 ∧ rcd_102_post − rcd_102_post ≤ 0 ∧ − rcd_102_0 + rcd_102_0 ≤ 0 ∧ rcd_102_0 − rcd_102_0 ≤ 0 ∧ − r_53_post + r_53_post ≤ 0 ∧ r_53_post − r_53_post ≤ 0 ∧ − r_53_0 + r_53_0 ≤ 0 ∧ r_53_0 − r_53_0 ≤ 0 ∧ − r_161_post + r_161_post ≤ 0 ∧ r_161_post − r_161_post ≤ 0 ∧ − r_161_0 + r_161_0 ≤ 0 ∧ r_161_0 − r_161_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 ≤ 0 ∧ − nondet_12_post + nondet_12_post ≤ 0 ∧ nondet_12_post − nondet_12_post ≤ 0 ∧ − nondet_12_1 + nondet_12_1 ≤ 0 ∧ nondet_12_1 − nondet_12_1 ≤ 0 ∧ − nondet_12_0 + nondet_12_0 ≤ 0 ∧ nondet_12_0 − nondet_12_0 ≤ 0 ∧ − lt_37_post + lt_37_post ≤ 0 ∧ lt_37_post − lt_37_post ≤ 0 ∧ − lt_37_1 + lt_37_1 ≤ 0 ∧ lt_37_1 − lt_37_1 ≤ 0 ∧ − lt_37_0 + lt_37_0 ≤ 0 ∧ lt_37_0 − lt_37_0 ≤ 0 ∧ − lt_36_post + lt_36_post ≤ 0 ∧ lt_36_post − lt_36_post ≤ 0 ∧ − lt_36_0 + lt_36_0 ≤ 0 ∧ lt_36_0 − lt_36_0 ≤ 0 ∧ − lt_237_post + lt_237_post ≤ 0 ∧ lt_237_post − lt_237_post ≤ 0 ∧ − lt_237_0 + lt_237_0 ≤ 0 ∧ lt_237_0 − lt_237_0 ≤ 0 ∧ − length_43_post + length_43_post ≤ 0 ∧ length_43_post − length_43_post ≤ 0 ∧ − length_43_0 + length_43_0 ≤ 0 ∧ length_43_0 − length_43_0 ≤ 0 ∧ − len_246_post + len_246_post ≤ 0 ∧ len_246_post − len_246_post ≤ 0 ∧ − len_246_0 + len_246_0 ≤ 0 ∧ len_246_0 − len_246_0 ≤ 0 ∧ − len_180_post + len_180_post ≤ 0 ∧ len_180_post − len_180_post ≤ 0 ∧ − len_180_0 + len_180_0 ≤ 0 ∧ len_180_0 − len_180_0 ≤ 0 ∧ − i_44_post + i_44_post ≤ 0 ∧ i_44_post − i_44_post ≤ 0 ∧ − i_44_0 + i_44_0 ≤ 0 ∧ i_44_0 − i_44_0 ≤ 0 ∧ − i_125_post + i_125_post ≤ 0 ∧ i_125_post − i_125_post ≤ 0 ∧ − i_125_0 + i_125_0 ≤ 0 ∧ i_125_0 − i_125_0 ≤ 0 ∧ − i_108_post + i_108_post ≤ 0 ∧ i_108_post − i_108_post ≤ 0 ∧ − i_108_0 + i_108_0 ≤ 0 ∧ i_108_0 − i_108_0 ≤ 0 ∧ − head_46_post + head_46_post ≤ 0 ∧ head_46_post − head_46_post ≤ 0 ∧ − head_46_0 + head_46_0 ≤ 0 ∧ head_46_0 − head_46_0 ≤ 0 ∧ − fmt_31_post + fmt_31_post ≤ 0 ∧ fmt_31_post − fmt_31_post ≤ 0 ∧ − fmt_31_4 + fmt_31_4 ≤ 0 ∧ fmt_31_4 − fmt_31_4 ≤ 0 ∧ − fmt_31_3 + fmt_31_3 ≤ 0 ∧ fmt_31_3 − fmt_31_3 ≤ 0 ∧ − fmt_31_2 + fmt_31_2 ≤ 0 ∧ fmt_31_2 − fmt_31_2 ≤ 0 ∧ − fmt_31_1 + fmt_31_1 ≤ 0 ∧ fmt_31_1 − fmt_31_1 ≤ 0 ∧ − fmt_31_0 + fmt_31_0 ≤ 0 ∧ fmt_31_0 − fmt_31_0 ≤ 0 ∧ − ct_17_post + ct_17_post ≤ 0 ∧ ct_17_post − ct_17_post ≤ 0 ∧ − ct_17_2 + ct_17_2 ≤ 0 ∧ ct_17_2 − ct_17_2 ≤ 0 ∧ − ct_17_1 + ct_17_1 ≤ 0 ∧ ct_17_1 − ct_17_1 ≤ 0 ∧ − ct_17_0 + ct_17_0 ≤ 0 ∧ ct_17_0 − ct_17_0 ≤ 0 ∧ − a_328_post + a_328_post ≤ 0 ∧ a_328_post − a_328_post ≤ 0 ∧ − a_328_0 + a_328_0 ≤ 0 ∧ a_328_0 − a_328_0 ≤ 0 ∧ − a_305_post + a_305_post ≤ 0 ∧ a_305_post − a_305_post ≤ 0 ∧ − a_305_0 + a_305_0 ≤ 0 ∧ a_305_0 − a_305_0 ≤ 0 ∧ − a_283_post + a_283_post ≤ 0 ∧ a_283_post − a_283_post ≤ 0 ∧ − a_283_0 + a_283_0 ≤ 0 ∧ a_283_0 − a_283_0 ≤ 0 ∧ − a_26_post + a_26_post ≤ 0 ∧ a_26_post − a_26_post ≤ 0 ∧ − a_26_1 + a_26_1 ≤ 0 ∧ a_26_1 − a_26_1 ≤ 0 ∧ − a_26_0 + a_26_0 ≤ 0 ∧ a_26_0 − a_26_0 ≤ 0 ∧ − a_247_post + a_247_post ≤ 0 ∧ a_247_post − a_247_post ≤ 0 ∧ − a_247_0 + a_247_0 ≤ 0 ∧ a_247_0 − a_247_0 ≤ 0 ∧ − a_197_post + a_197_post ≤ 0 ∧ a_197_post − a_197_post ≤ 0 ∧ − a_197_0 + a_197_0 ≤ 0 ∧ a_197_0 − a_197_0 ≤ 0 ∧ − a_146_0 + a_146_0 ≤ 0 ∧ a_146_0 − a_146_0 ≤ 0
The following skip-transition is inserted and corresponding redirections w.r.t. the old location are performed.
110 : − y_19_post + y_19_post ≤ 0 ∧ y_19_post − y_19_post ≤ 0 ∧ − y_19_2 + y_19_2 ≤ 0 ∧ y_19_2 − y_19_2 ≤ 0 ∧ − y_19_1 + y_19_1 ≤ 0 ∧ y_19_1 − y_19_1 ≤ 0 ∧ − y_19_0 + y_19_0 ≤ 0 ∧ y_19_0 − y_19_0 ≤ 0 ∧ − x_SLAM_f_18_post + x_SLAM_f_18_post ≤ 0 ∧ x_SLAM_f_18_post − x_SLAM_f_18_post ≤ 0 ∧ − x_SLAM_f_18_2 + x_SLAM_f_18_2 ≤ 0 ∧ x_SLAM_f_18_2 − x_SLAM_f_18_2 ≤ 0 ∧ − x_SLAM_f_18_1 + x_SLAM_f_18_1 ≤ 0 ∧ x_SLAM_f_18_1 − x_SLAM_f_18_1 ≤ 0 ∧ − x_SLAM_f_18_0 + x_SLAM_f_18_0 ≤ 0 ∧ x_SLAM_f_18_0 − x_SLAM_f_18_0 ≤ 0 ∧ − x_34_post + x_34_post ≤ 0 ∧ x_34_post − x_34_post ≤ 0 ∧ − x_34_1 + x_34_1 ≤ 0 ∧ x_34_1 − x_34_1 ≤ 0 ∧ − x_34_0 + x_34_0 ≤ 0 ∧ x_34_0 − x_34_0 ≤ 0 ∧ − x_28_post + x_28_post ≤ 0 ∧ x_28_post − x_28_post ≤ 0 ∧ − x_28_1 + x_28_1 ≤ 0 ∧ x_28_1 − x_28_1 ≤ 0 ∧ − x_28_0 + x_28_0 ≤ 0 ∧ x_28_0 − x_28_0 ≤ 0 ∧ − x_238_post + x_238_post ≤ 0 ∧ x_238_post − x_238_post ≤ 0 ∧ − x_238_0 + x_238_0 ≤ 0 ∧ x_238_0 − x_238_0 ≤ 0 ∧ − x_20_post + x_20_post ≤ 0 ∧ x_20_post − x_20_post ≤ 0 ∧ − x_20_2 + x_20_2 ≤ 0 ∧ x_20_2 − x_20_2 ≤ 0 ∧ − x_20_1 + x_20_1 ≤ 0 ∧ x_20_1 − x_20_1 ≤ 0 ∧ − x_20_0 + x_20_0 ≤ 0 ∧ x_20_0 − x_20_0 ≤ 0 ∧ − x_177_post + x_177_post ≤ 0 ∧ x_177_post − x_177_post ≤ 0 ∧ − x_177_0 + x_177_0 ≤ 0 ∧ x_177_0 − x_177_0 ≤ 0 ∧ − x_16_post + x_16_post ≤ 0 ∧ x_16_post − x_16_post ≤ 0 ∧ − x_16_1 + x_16_1 ≤ 0 ∧ x_16_1 − x_16_1 ≤ 0 ∧ − x_16_0 + x_16_0 ≤ 0 ∧ x_16_0 − x_16_0 ≤ 0 ∧ − x_14_post + x_14_post ≤ 0 ∧ x_14_post − x_14_post ≤ 0 ∧ − x_14_0 + x_14_0 ≤ 0 ∧ x_14_0 − x_14_0 ≤ 0 ∧ − tmp_48_post + tmp_48_post ≤ 0 ∧ tmp_48_post − tmp_48_post ≤ 0 ∧ − tmp_48_0 + tmp_48_0 ≤ 0 ∧ tmp_48_0 − tmp_48_0 ≤ 0 ∧ − temp_49_post + temp_49_post ≤ 0 ∧ temp_49_post − temp_49_post ≤ 0 ∧ − temp_49_0 + temp_49_0 ≤ 0 ∧ temp_49_0 − temp_49_0 ≤ 0 ∧ − temp0_45_post + temp0_45_post ≤ 0 ∧ temp0_45_post − temp0_45_post ≤ 0 ∧ − temp0_45_1 + temp0_45_1 ≤ 0 ∧ temp0_45_1 − temp0_45_1 ≤ 0 ∧ − temp0_45_0 + temp0_45_0 ≤ 0 ∧ temp0_45_0 − temp0_45_0 ≤ 0 ∧ − temp0_32_post + temp0_32_post ≤ 0 ∧ temp0_32_post − temp0_32_post ≤ 0 ∧ − temp0_32_4 + temp0_32_4 ≤ 0 ∧ temp0_32_4 − temp0_32_4 ≤ 0 ∧ − temp0_32_3 + temp0_32_3 ≤ 0 ∧ temp0_32_3 − temp0_32_3 ≤ 0 ∧ − temp0_32_2 + temp0_32_2 ≤ 0 ∧ temp0_32_2 − temp0_32_2 ≤ 0 ∧ − temp0_32_1 + temp0_32_1 ≤ 0 ∧ temp0_32_1 − temp0_32_1 ≤ 0 ∧ − temp0_32_0 + temp0_32_0 ≤ 0 ∧ temp0_32_0 − temp0_32_0 ≤ 0 ∧ − temp0_15_0 + temp0_15_0 ≤ 0 ∧ temp0_15_0 − temp0_15_0 ≤ 0 ∧ − t_23_post + t_23_post ≤ 0 ∧ t_23_post − t_23_post ≤ 0 ∧ − t_23_1 + t_23_1 ≤ 0 ∧ t_23_1 − t_23_1 ≤ 0 ∧ − t_23_0 + t_23_0 ≤ 0 ∧ t_23_0 − t_23_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_post + result_dot_printf_sdv_special_RETURN_VALUE_41_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_post − result_dot_printf_sdv_special_RETURN_VALUE_41_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_1 + result_dot_printf_sdv_special_RETURN_VALUE_41_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_1 − result_dot_printf_sdv_special_RETURN_VALUE_41_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_0 + result_dot_printf_sdv_special_RETURN_VALUE_41_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_0 − result_dot_printf_sdv_special_RETURN_VALUE_41_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_post + result_dot_printf_sdv_special_RETURN_VALUE_38_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_post − result_dot_printf_sdv_special_RETURN_VALUE_38_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_1 + result_dot_printf_sdv_special_RETURN_VALUE_38_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_1 − result_dot_printf_sdv_special_RETURN_VALUE_38_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_0 + result_dot_printf_sdv_special_RETURN_VALUE_38_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_0 − result_dot_printf_sdv_special_RETURN_VALUE_38_0 ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_post + result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_post − result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_1 + result_dot_nondet_sdv_special_RETURN_VALUE_13_1 ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_1 − result_dot_nondet_sdv_special_RETURN_VALUE_13_1 ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_0 + result_dot_nondet_sdv_special_RETURN_VALUE_13_0 ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_0 − result_dot_nondet_sdv_special_RETURN_VALUE_13_0 ≤ 0 ∧ − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post + result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post ≤ 0 ∧ result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post ≤ 0 ∧ − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 + result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 ≤ 0 ∧ result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 ≤ 0 ∧ − result_11_post + result_11_post ≤ 0 ∧ result_11_post − result_11_post ≤ 0 ∧ − result_11_6 + result_11_6 ≤ 0 ∧ result_11_6 − result_11_6 ≤ 0 ∧ − result_11_5 + result_11_5 ≤ 0 ∧ result_11_5 − result_11_5 ≤ 0 ∧ − result_11_4 + result_11_4 ≤ 0 ∧ result_11_4 − result_11_4 ≤ 0 ∧ − result_11_3 + result_11_3 ≤ 0 ∧ result_11_3 − result_11_3 ≤ 0 ∧ − result_11_2 + result_11_2 ≤ 0 ∧ result_11_2 − result_11_2 ≤ 0 ∧ − result_11_1 + result_11_1 ≤ 0 ∧ result_11_1 − result_11_1 ≤ 0 ∧ − result_11_0 + result_11_0 ≤ 0 ∧ result_11_0 − result_11_0 ≤ 0 ∧ − rcd_72_post + rcd_72_post ≤ 0 ∧ rcd_72_post − rcd_72_post ≤ 0 ∧ − rcd_72_0 + rcd_72_0 ≤ 0 ∧ rcd_72_0 − rcd_72_0 ≤ 0 ∧ − rcd_102_post + rcd_102_post ≤ 0 ∧ rcd_102_post − rcd_102_post ≤ 0 ∧ − rcd_102_0 + rcd_102_0 ≤ 0 ∧ rcd_102_0 − rcd_102_0 ≤ 0 ∧ − r_53_post + r_53_post ≤ 0 ∧ r_53_post − r_53_post ≤ 0 ∧ − r_53_0 + r_53_0 ≤ 0 ∧ r_53_0 − r_53_0 ≤ 0 ∧ − r_161_post + r_161_post ≤ 0 ∧ r_161_post − r_161_post ≤ 0 ∧ − r_161_0 + r_161_0 ≤ 0 ∧ r_161_0 − r_161_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 ≤ 0 ∧ − nondet_12_post + nondet_12_post ≤ 0 ∧ nondet_12_post − nondet_12_post ≤ 0 ∧ − nondet_12_1 + nondet_12_1 ≤ 0 ∧ nondet_12_1 − nondet_12_1 ≤ 0 ∧ − nondet_12_0 + nondet_12_0 ≤ 0 ∧ nondet_12_0 − nondet_12_0 ≤ 0 ∧ − lt_37_post + lt_37_post ≤ 0 ∧ lt_37_post − lt_37_post ≤ 0 ∧ − lt_37_1 + lt_37_1 ≤ 0 ∧ lt_37_1 − lt_37_1 ≤ 0 ∧ − lt_37_0 + lt_37_0 ≤ 0 ∧ lt_37_0 − lt_37_0 ≤ 0 ∧ − lt_36_post + lt_36_post ≤ 0 ∧ lt_36_post − lt_36_post ≤ 0 ∧ − lt_36_0 + lt_36_0 ≤ 0 ∧ lt_36_0 − lt_36_0 ≤ 0 ∧ − lt_237_post + lt_237_post ≤ 0 ∧ lt_237_post − lt_237_post ≤ 0 ∧ − lt_237_0 + lt_237_0 ≤ 0 ∧ lt_237_0 − lt_237_0 ≤ 0 ∧ − length_43_post + length_43_post ≤ 0 ∧ length_43_post − length_43_post ≤ 0 ∧ − length_43_0 + length_43_0 ≤ 0 ∧ length_43_0 − length_43_0 ≤ 0 ∧ − len_246_post + len_246_post ≤ 0 ∧ len_246_post − len_246_post ≤ 0 ∧ − len_246_0 + len_246_0 ≤ 0 ∧ len_246_0 − len_246_0 ≤ 0 ∧ − len_180_post + len_180_post ≤ 0 ∧ len_180_post − len_180_post ≤ 0 ∧ − len_180_0 + len_180_0 ≤ 0 ∧ len_180_0 − len_180_0 ≤ 0 ∧ − i_44_post + i_44_post ≤ 0 ∧ i_44_post − i_44_post ≤ 0 ∧ − i_44_0 + i_44_0 ≤ 0 ∧ i_44_0 − i_44_0 ≤ 0 ∧ − i_125_post + i_125_post ≤ 0 ∧ i_125_post − i_125_post ≤ 0 ∧ − i_125_0 + i_125_0 ≤ 0 ∧ i_125_0 − i_125_0 ≤ 0 ∧ − i_108_post + i_108_post ≤ 0 ∧ i_108_post − i_108_post ≤ 0 ∧ − i_108_0 + i_108_0 ≤ 0 ∧ i_108_0 − i_108_0 ≤ 0 ∧ − head_46_post + head_46_post ≤ 0 ∧ head_46_post − head_46_post ≤ 0 ∧ − head_46_0 + head_46_0 ≤ 0 ∧ head_46_0 − head_46_0 ≤ 0 ∧ − fmt_31_post + fmt_31_post ≤ 0 ∧ fmt_31_post − fmt_31_post ≤ 0 ∧ − fmt_31_4 + fmt_31_4 ≤ 0 ∧ fmt_31_4 − fmt_31_4 ≤ 0 ∧ − fmt_31_3 + fmt_31_3 ≤ 0 ∧ fmt_31_3 − fmt_31_3 ≤ 0 ∧ − fmt_31_2 + fmt_31_2 ≤ 0 ∧ fmt_31_2 − fmt_31_2 ≤ 0 ∧ − fmt_31_1 + fmt_31_1 ≤ 0 ∧ fmt_31_1 − fmt_31_1 ≤ 0 ∧ − fmt_31_0 + fmt_31_0 ≤ 0 ∧ fmt_31_0 − fmt_31_0 ≤ 0 ∧ − ct_17_post + ct_17_post ≤ 0 ∧ ct_17_post − ct_17_post ≤ 0 ∧ − ct_17_2 + ct_17_2 ≤ 0 ∧ ct_17_2 − ct_17_2 ≤ 0 ∧ − ct_17_1 + ct_17_1 ≤ 0 ∧ ct_17_1 − ct_17_1 ≤ 0 ∧ − ct_17_0 + ct_17_0 ≤ 0 ∧ ct_17_0 − ct_17_0 ≤ 0 ∧ − a_328_post + a_328_post ≤ 0 ∧ a_328_post − a_328_post ≤ 0 ∧ − a_328_0 + a_328_0 ≤ 0 ∧ a_328_0 − a_328_0 ≤ 0 ∧ − a_305_post + a_305_post ≤ 0 ∧ a_305_post − a_305_post ≤ 0 ∧ − a_305_0 + a_305_0 ≤ 0 ∧ a_305_0 − a_305_0 ≤ 0 ∧ − a_283_post + a_283_post ≤ 0 ∧ a_283_post − a_283_post ≤ 0 ∧ − a_283_0 + a_283_0 ≤ 0 ∧ a_283_0 − a_283_0 ≤ 0 ∧ − a_26_post + a_26_post ≤ 0 ∧ a_26_post − a_26_post ≤ 0 ∧ − a_26_1 + a_26_1 ≤ 0 ∧ a_26_1 − a_26_1 ≤ 0 ∧ − a_26_0 + a_26_0 ≤ 0 ∧ a_26_0 − a_26_0 ≤ 0 ∧ − a_247_post + a_247_post ≤ 0 ∧ a_247_post − a_247_post ≤ 0 ∧ − a_247_0 + a_247_0 ≤ 0 ∧ a_247_0 − a_247_0 ≤ 0 ∧ − a_197_post + a_197_post ≤ 0 ∧ a_197_post − a_197_post ≤ 0 ∧ − a_197_0 + a_197_0 ≤ 0 ∧ a_197_0 − a_197_0 ≤ 0 ∧ − a_146_0 + a_146_0 ≤ 0 ∧ a_146_0 − a_146_0 ≤ 0
The following skip-transition is inserted and corresponding redirections w.r.t. the old location are performed.
108 : − y_19_post + y_19_post ≤ 0 ∧ y_19_post − y_19_post ≤ 0 ∧ − y_19_2 + y_19_2 ≤ 0 ∧ y_19_2 − y_19_2 ≤ 0 ∧ − y_19_1 + y_19_1 ≤ 0 ∧ y_19_1 − y_19_1 ≤ 0 ∧ − y_19_0 + y_19_0 ≤ 0 ∧ y_19_0 − y_19_0 ≤ 0 ∧ − x_SLAM_f_18_post + x_SLAM_f_18_post ≤ 0 ∧ x_SLAM_f_18_post − x_SLAM_f_18_post ≤ 0 ∧ − x_SLAM_f_18_2 + x_SLAM_f_18_2 ≤ 0 ∧ x_SLAM_f_18_2 − x_SLAM_f_18_2 ≤ 0 ∧ − x_SLAM_f_18_1 + x_SLAM_f_18_1 ≤ 0 ∧ x_SLAM_f_18_1 − x_SLAM_f_18_1 ≤ 0 ∧ − x_SLAM_f_18_0 + x_SLAM_f_18_0 ≤ 0 ∧ x_SLAM_f_18_0 − x_SLAM_f_18_0 ≤ 0 ∧ − x_34_post + x_34_post ≤ 0 ∧ x_34_post − x_34_post ≤ 0 ∧ − x_34_1 + x_34_1 ≤ 0 ∧ x_34_1 − x_34_1 ≤ 0 ∧ − x_34_0 + x_34_0 ≤ 0 ∧ x_34_0 − x_34_0 ≤ 0 ∧ − x_28_post + x_28_post ≤ 0 ∧ x_28_post − x_28_post ≤ 0 ∧ − x_28_1 + x_28_1 ≤ 0 ∧ x_28_1 − x_28_1 ≤ 0 ∧ − x_28_0 + x_28_0 ≤ 0 ∧ x_28_0 − x_28_0 ≤ 0 ∧ − x_238_post + x_238_post ≤ 0 ∧ x_238_post − x_238_post ≤ 0 ∧ − x_238_0 + x_238_0 ≤ 0 ∧ x_238_0 − x_238_0 ≤ 0 ∧ − x_20_post + x_20_post ≤ 0 ∧ x_20_post − x_20_post ≤ 0 ∧ − x_20_2 + x_20_2 ≤ 0 ∧ x_20_2 − x_20_2 ≤ 0 ∧ − x_20_1 + x_20_1 ≤ 0 ∧ x_20_1 − x_20_1 ≤ 0 ∧ − x_20_0 + x_20_0 ≤ 0 ∧ x_20_0 − x_20_0 ≤ 0 ∧ − x_177_post + x_177_post ≤ 0 ∧ x_177_post − x_177_post ≤ 0 ∧ − x_177_0 + x_177_0 ≤ 0 ∧ x_177_0 − x_177_0 ≤ 0 ∧ − x_16_post + x_16_post ≤ 0 ∧ x_16_post − x_16_post ≤ 0 ∧ − x_16_1 + x_16_1 ≤ 0 ∧ x_16_1 − x_16_1 ≤ 0 ∧ − x_16_0 + x_16_0 ≤ 0 ∧ x_16_0 − x_16_0 ≤ 0 ∧ − x_14_post + x_14_post ≤ 0 ∧ x_14_post − x_14_post ≤ 0 ∧ − x_14_0 + x_14_0 ≤ 0 ∧ x_14_0 − x_14_0 ≤ 0 ∧ − tmp_48_post + tmp_48_post ≤ 0 ∧ tmp_48_post − tmp_48_post ≤ 0 ∧ − tmp_48_0 + tmp_48_0 ≤ 0 ∧ tmp_48_0 − tmp_48_0 ≤ 0 ∧ − temp_49_post + temp_49_post ≤ 0 ∧ temp_49_post − temp_49_post ≤ 0 ∧ − temp_49_0 + temp_49_0 ≤ 0 ∧ temp_49_0 − temp_49_0 ≤ 0 ∧ − temp0_45_post + temp0_45_post ≤ 0 ∧ temp0_45_post − temp0_45_post ≤ 0 ∧ − temp0_45_1 + temp0_45_1 ≤ 0 ∧ temp0_45_1 − temp0_45_1 ≤ 0 ∧ − temp0_45_0 + temp0_45_0 ≤ 0 ∧ temp0_45_0 − temp0_45_0 ≤ 0 ∧ − temp0_32_post + temp0_32_post ≤ 0 ∧ temp0_32_post − temp0_32_post ≤ 0 ∧ − temp0_32_4 + temp0_32_4 ≤ 0 ∧ temp0_32_4 − temp0_32_4 ≤ 0 ∧ − temp0_32_3 + temp0_32_3 ≤ 0 ∧ temp0_32_3 − temp0_32_3 ≤ 0 ∧ − temp0_32_2 + temp0_32_2 ≤ 0 ∧ temp0_32_2 − temp0_32_2 ≤ 0 ∧ − temp0_32_1 + temp0_32_1 ≤ 0 ∧ temp0_32_1 − temp0_32_1 ≤ 0 ∧ − temp0_32_0 + temp0_32_0 ≤ 0 ∧ temp0_32_0 − temp0_32_0 ≤ 0 ∧ − temp0_15_0 + temp0_15_0 ≤ 0 ∧ temp0_15_0 − temp0_15_0 ≤ 0 ∧ − t_23_post + t_23_post ≤ 0 ∧ t_23_post − t_23_post ≤ 0 ∧ − t_23_1 + t_23_1 ≤ 0 ∧ t_23_1 − t_23_1 ≤ 0 ∧ − t_23_0 + t_23_0 ≤ 0 ∧ t_23_0 − t_23_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_post + result_dot_printf_sdv_special_RETURN_VALUE_41_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_post − result_dot_printf_sdv_special_RETURN_VALUE_41_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_1 + result_dot_printf_sdv_special_RETURN_VALUE_41_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_1 − result_dot_printf_sdv_special_RETURN_VALUE_41_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_0 + result_dot_printf_sdv_special_RETURN_VALUE_41_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_0 − result_dot_printf_sdv_special_RETURN_VALUE_41_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_post + result_dot_printf_sdv_special_RETURN_VALUE_38_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_post − result_dot_printf_sdv_special_RETURN_VALUE_38_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_1 + result_dot_printf_sdv_special_RETURN_VALUE_38_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_1 − result_dot_printf_sdv_special_RETURN_VALUE_38_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_0 + result_dot_printf_sdv_special_RETURN_VALUE_38_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_0 − result_dot_printf_sdv_special_RETURN_VALUE_38_0 ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_post + result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_post − result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_1 + result_dot_nondet_sdv_special_RETURN_VALUE_13_1 ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_1 − result_dot_nondet_sdv_special_RETURN_VALUE_13_1 ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_0 + result_dot_nondet_sdv_special_RETURN_VALUE_13_0 ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_0 − result_dot_nondet_sdv_special_RETURN_VALUE_13_0 ≤ 0 ∧ − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post + result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post ≤ 0 ∧ result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post ≤ 0 ∧ − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 + result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 ≤ 0 ∧ result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 ≤ 0 ∧ − result_11_post + result_11_post ≤ 0 ∧ result_11_post − result_11_post ≤ 0 ∧ − result_11_6 + result_11_6 ≤ 0 ∧ result_11_6 − result_11_6 ≤ 0 ∧ − result_11_5 + result_11_5 ≤ 0 ∧ result_11_5 − result_11_5 ≤ 0 ∧ − result_11_4 + result_11_4 ≤ 0 ∧ result_11_4 − result_11_4 ≤ 0 ∧ − result_11_3 + result_11_3 ≤ 0 ∧ result_11_3 − result_11_3 ≤ 0 ∧ − result_11_2 + result_11_2 ≤ 0 ∧ result_11_2 − result_11_2 ≤ 0 ∧ − result_11_1 + result_11_1 ≤ 0 ∧ result_11_1 − result_11_1 ≤ 0 ∧ − result_11_0 + result_11_0 ≤ 0 ∧ result_11_0 − result_11_0 ≤ 0 ∧ − rcd_72_post + rcd_72_post ≤ 0 ∧ rcd_72_post − rcd_72_post ≤ 0 ∧ − rcd_72_0 + rcd_72_0 ≤ 0 ∧ rcd_72_0 − rcd_72_0 ≤ 0 ∧ − rcd_102_post + rcd_102_post ≤ 0 ∧ rcd_102_post − rcd_102_post ≤ 0 ∧ − rcd_102_0 + rcd_102_0 ≤ 0 ∧ rcd_102_0 − rcd_102_0 ≤ 0 ∧ − r_53_post + r_53_post ≤ 0 ∧ r_53_post − r_53_post ≤ 0 ∧ − r_53_0 + r_53_0 ≤ 0 ∧ r_53_0 − r_53_0 ≤ 0 ∧ − r_161_post + r_161_post ≤ 0 ∧ r_161_post − r_161_post ≤ 0 ∧ − r_161_0 + r_161_0 ≤ 0 ∧ r_161_0 − r_161_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 ≤ 0 ∧ − nondet_12_post + nondet_12_post ≤ 0 ∧ nondet_12_post − nondet_12_post ≤ 0 ∧ − nondet_12_1 + nondet_12_1 ≤ 0 ∧ nondet_12_1 − nondet_12_1 ≤ 0 ∧ − nondet_12_0 + nondet_12_0 ≤ 0 ∧ nondet_12_0 − nondet_12_0 ≤ 0 ∧ − lt_37_post + lt_37_post ≤ 0 ∧ lt_37_post − lt_37_post ≤ 0 ∧ − lt_37_1 + lt_37_1 ≤ 0 ∧ lt_37_1 − lt_37_1 ≤ 0 ∧ − lt_37_0 + lt_37_0 ≤ 0 ∧ lt_37_0 − lt_37_0 ≤ 0 ∧ − lt_36_post + lt_36_post ≤ 0 ∧ lt_36_post − lt_36_post ≤ 0 ∧ − lt_36_0 + lt_36_0 ≤ 0 ∧ lt_36_0 − lt_36_0 ≤ 0 ∧ − lt_237_post + lt_237_post ≤ 0 ∧ lt_237_post − lt_237_post ≤ 0 ∧ − lt_237_0 + lt_237_0 ≤ 0 ∧ lt_237_0 − lt_237_0 ≤ 0 ∧ − length_43_post + length_43_post ≤ 0 ∧ length_43_post − length_43_post ≤ 0 ∧ − length_43_0 + length_43_0 ≤ 0 ∧ length_43_0 − length_43_0 ≤ 0 ∧ − len_246_post + len_246_post ≤ 0 ∧ len_246_post − len_246_post ≤ 0 ∧ − len_246_0 + len_246_0 ≤ 0 ∧ len_246_0 − len_246_0 ≤ 0 ∧ − len_180_post + len_180_post ≤ 0 ∧ len_180_post − len_180_post ≤ 0 ∧ − len_180_0 + len_180_0 ≤ 0 ∧ len_180_0 − len_180_0 ≤ 0 ∧ − i_44_post + i_44_post ≤ 0 ∧ i_44_post − i_44_post ≤ 0 ∧ − i_44_0 + i_44_0 ≤ 0 ∧ i_44_0 − i_44_0 ≤ 0 ∧ − i_125_post + i_125_post ≤ 0 ∧ i_125_post − i_125_post ≤ 0 ∧ − i_125_0 + i_125_0 ≤ 0 ∧ i_125_0 − i_125_0 ≤ 0 ∧ − i_108_post + i_108_post ≤ 0 ∧ i_108_post − i_108_post ≤ 0 ∧ − i_108_0 + i_108_0 ≤ 0 ∧ i_108_0 − i_108_0 ≤ 0 ∧ − head_46_post + head_46_post ≤ 0 ∧ head_46_post − head_46_post ≤ 0 ∧ − head_46_0 + head_46_0 ≤ 0 ∧ head_46_0 − head_46_0 ≤ 0 ∧ − fmt_31_post + fmt_31_post ≤ 0 ∧ fmt_31_post − fmt_31_post ≤ 0 ∧ − fmt_31_4 + fmt_31_4 ≤ 0 ∧ fmt_31_4 − fmt_31_4 ≤ 0 ∧ − fmt_31_3 + fmt_31_3 ≤ 0 ∧ fmt_31_3 − fmt_31_3 ≤ 0 ∧ − fmt_31_2 + fmt_31_2 ≤ 0 ∧ fmt_31_2 − fmt_31_2 ≤ 0 ∧ − fmt_31_1 + fmt_31_1 ≤ 0 ∧ fmt_31_1 − fmt_31_1 ≤ 0 ∧ − fmt_31_0 + fmt_31_0 ≤ 0 ∧ fmt_31_0 − fmt_31_0 ≤ 0 ∧ − ct_17_post + ct_17_post ≤ 0 ∧ ct_17_post − ct_17_post ≤ 0 ∧ − ct_17_2 + ct_17_2 ≤ 0 ∧ ct_17_2 − ct_17_2 ≤ 0 ∧ − ct_17_1 + ct_17_1 ≤ 0 ∧ ct_17_1 − ct_17_1 ≤ 0 ∧ − ct_17_0 + ct_17_0 ≤ 0 ∧ ct_17_0 − ct_17_0 ≤ 0 ∧ − a_328_post + a_328_post ≤ 0 ∧ a_328_post − a_328_post ≤ 0 ∧ − a_328_0 + a_328_0 ≤ 0 ∧ a_328_0 − a_328_0 ≤ 0 ∧ − a_305_post + a_305_post ≤ 0 ∧ a_305_post − a_305_post ≤ 0 ∧ − a_305_0 + a_305_0 ≤ 0 ∧ a_305_0 − a_305_0 ≤ 0 ∧ − a_283_post + a_283_post ≤ 0 ∧ a_283_post − a_283_post ≤ 0 ∧ − a_283_0 + a_283_0 ≤ 0 ∧ a_283_0 − a_283_0 ≤ 0 ∧ − a_26_post + a_26_post ≤ 0 ∧ a_26_post − a_26_post ≤ 0 ∧ − a_26_1 + a_26_1 ≤ 0 ∧ a_26_1 − a_26_1 ≤ 0 ∧ − a_26_0 + a_26_0 ≤ 0 ∧ a_26_0 − a_26_0 ≤ 0 ∧ − a_247_post + a_247_post ≤ 0 ∧ a_247_post − a_247_post ≤ 0 ∧ − a_247_0 + a_247_0 ≤ 0 ∧ a_247_0 − a_247_0 ≤ 0 ∧ − a_197_post + a_197_post ≤ 0 ∧ a_197_post − a_197_post ≤ 0 ∧ − a_197_0 + a_197_0 ≤ 0 ∧ a_197_0 − a_197_0 ≤ 0 ∧ − a_146_0 + a_146_0 ≤ 0 ∧ a_146_0 − a_146_0 ≤ 0
The following skip-transition is inserted and corresponding redirections w.r.t. the old location are performed.
117 : − y_19_post + y_19_post ≤ 0 ∧ y_19_post − y_19_post ≤ 0 ∧ − y_19_2 + y_19_2 ≤ 0 ∧ y_19_2 − y_19_2 ≤ 0 ∧ − y_19_1 + y_19_1 ≤ 0 ∧ y_19_1 − y_19_1 ≤ 0 ∧ − y_19_0 + y_19_0 ≤ 0 ∧ y_19_0 − y_19_0 ≤ 0 ∧ − x_SLAM_f_18_post + x_SLAM_f_18_post ≤ 0 ∧ x_SLAM_f_18_post − x_SLAM_f_18_post ≤ 0 ∧ − x_SLAM_f_18_2 + x_SLAM_f_18_2 ≤ 0 ∧ x_SLAM_f_18_2 − x_SLAM_f_18_2 ≤ 0 ∧ − x_SLAM_f_18_1 + x_SLAM_f_18_1 ≤ 0 ∧ x_SLAM_f_18_1 − x_SLAM_f_18_1 ≤ 0 ∧ − x_SLAM_f_18_0 + x_SLAM_f_18_0 ≤ 0 ∧ x_SLAM_f_18_0 − x_SLAM_f_18_0 ≤ 0 ∧ − x_34_post + x_34_post ≤ 0 ∧ x_34_post − x_34_post ≤ 0 ∧ − x_34_1 + x_34_1 ≤ 0 ∧ x_34_1 − x_34_1 ≤ 0 ∧ − x_34_0 + x_34_0 ≤ 0 ∧ x_34_0 − x_34_0 ≤ 0 ∧ − x_28_post + x_28_post ≤ 0 ∧ x_28_post − x_28_post ≤ 0 ∧ − x_28_1 + x_28_1 ≤ 0 ∧ x_28_1 − x_28_1 ≤ 0 ∧ − x_28_0 + x_28_0 ≤ 0 ∧ x_28_0 − x_28_0 ≤ 0 ∧ − x_238_post + x_238_post ≤ 0 ∧ x_238_post − x_238_post ≤ 0 ∧ − x_238_0 + x_238_0 ≤ 0 ∧ x_238_0 − x_238_0 ≤ 0 ∧ − x_20_post + x_20_post ≤ 0 ∧ x_20_post − x_20_post ≤ 0 ∧ − x_20_2 + x_20_2 ≤ 0 ∧ x_20_2 − x_20_2 ≤ 0 ∧ − x_20_1 + x_20_1 ≤ 0 ∧ x_20_1 − x_20_1 ≤ 0 ∧ − x_20_0 + x_20_0 ≤ 0 ∧ x_20_0 − x_20_0 ≤ 0 ∧ − x_177_post + x_177_post ≤ 0 ∧ x_177_post − x_177_post ≤ 0 ∧ − x_177_0 + x_177_0 ≤ 0 ∧ x_177_0 − x_177_0 ≤ 0 ∧ − x_16_post + x_16_post ≤ 0 ∧ x_16_post − x_16_post ≤ 0 ∧ − x_16_1 + x_16_1 ≤ 0 ∧ x_16_1 − x_16_1 ≤ 0 ∧ − x_16_0 + x_16_0 ≤ 0 ∧ x_16_0 − x_16_0 ≤ 0 ∧ − x_14_post + x_14_post ≤ 0 ∧ x_14_post − x_14_post ≤ 0 ∧ − x_14_0 + x_14_0 ≤ 0 ∧ x_14_0 − x_14_0 ≤ 0 ∧ − tmp_48_post + tmp_48_post ≤ 0 ∧ tmp_48_post − tmp_48_post ≤ 0 ∧ − tmp_48_0 + tmp_48_0 ≤ 0 ∧ tmp_48_0 − tmp_48_0 ≤ 0 ∧ − temp_49_post + temp_49_post ≤ 0 ∧ temp_49_post − temp_49_post ≤ 0 ∧ − temp_49_0 + temp_49_0 ≤ 0 ∧ temp_49_0 − temp_49_0 ≤ 0 ∧ − temp0_45_post + temp0_45_post ≤ 0 ∧ temp0_45_post − temp0_45_post ≤ 0 ∧ − temp0_45_1 + temp0_45_1 ≤ 0 ∧ temp0_45_1 − temp0_45_1 ≤ 0 ∧ − temp0_45_0 + temp0_45_0 ≤ 0 ∧ temp0_45_0 − temp0_45_0 ≤ 0 ∧ − temp0_32_post + temp0_32_post ≤ 0 ∧ temp0_32_post − temp0_32_post ≤ 0 ∧ − temp0_32_4 + temp0_32_4 ≤ 0 ∧ temp0_32_4 − temp0_32_4 ≤ 0 ∧ − temp0_32_3 + temp0_32_3 ≤ 0 ∧ temp0_32_3 − temp0_32_3 ≤ 0 ∧ − temp0_32_2 + temp0_32_2 ≤ 0 ∧ temp0_32_2 − temp0_32_2 ≤ 0 ∧ − temp0_32_1 + temp0_32_1 ≤ 0 ∧ temp0_32_1 − temp0_32_1 ≤ 0 ∧ − temp0_32_0 + temp0_32_0 ≤ 0 ∧ temp0_32_0 − temp0_32_0 ≤ 0 ∧ − temp0_15_0 + temp0_15_0 ≤ 0 ∧ temp0_15_0 − temp0_15_0 ≤ 0 ∧ − t_23_post + t_23_post ≤ 0 ∧ t_23_post − t_23_post ≤ 0 ∧ − t_23_1 + t_23_1 ≤ 0 ∧ t_23_1 − t_23_1 ≤ 0 ∧ − t_23_0 + t_23_0 ≤ 0 ∧ t_23_0 − t_23_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_post + result_dot_printf_sdv_special_RETURN_VALUE_41_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_post − result_dot_printf_sdv_special_RETURN_VALUE_41_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_1 + result_dot_printf_sdv_special_RETURN_VALUE_41_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_1 − result_dot_printf_sdv_special_RETURN_VALUE_41_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_0 + result_dot_printf_sdv_special_RETURN_VALUE_41_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_0 − result_dot_printf_sdv_special_RETURN_VALUE_41_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_post + result_dot_printf_sdv_special_RETURN_VALUE_38_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_post − result_dot_printf_sdv_special_RETURN_VALUE_38_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_1 + result_dot_printf_sdv_special_RETURN_VALUE_38_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_1 − result_dot_printf_sdv_special_RETURN_VALUE_38_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_0 + result_dot_printf_sdv_special_RETURN_VALUE_38_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_0 − result_dot_printf_sdv_special_RETURN_VALUE_38_0 ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_post + result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_post − result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_1 + result_dot_nondet_sdv_special_RETURN_VALUE_13_1 ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_1 − result_dot_nondet_sdv_special_RETURN_VALUE_13_1 ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_0 + result_dot_nondet_sdv_special_RETURN_VALUE_13_0 ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_0 − result_dot_nondet_sdv_special_RETURN_VALUE_13_0 ≤ 0 ∧ − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post + result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post ≤ 0 ∧ result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post ≤ 0 ∧ − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 + result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 ≤ 0 ∧ result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 ≤ 0 ∧ − result_11_post + result_11_post ≤ 0 ∧ result_11_post − result_11_post ≤ 0 ∧ − result_11_6 + result_11_6 ≤ 0 ∧ result_11_6 − result_11_6 ≤ 0 ∧ − result_11_5 + result_11_5 ≤ 0 ∧ result_11_5 − result_11_5 ≤ 0 ∧ − result_11_4 + result_11_4 ≤ 0 ∧ result_11_4 − result_11_4 ≤ 0 ∧ − result_11_3 + result_11_3 ≤ 0 ∧ result_11_3 − result_11_3 ≤ 0 ∧ − result_11_2 + result_11_2 ≤ 0 ∧ result_11_2 − result_11_2 ≤ 0 ∧ − result_11_1 + result_11_1 ≤ 0 ∧ result_11_1 − result_11_1 ≤ 0 ∧ − result_11_0 + result_11_0 ≤ 0 ∧ result_11_0 − result_11_0 ≤ 0 ∧ − rcd_72_post + rcd_72_post ≤ 0 ∧ rcd_72_post − rcd_72_post ≤ 0 ∧ − rcd_72_0 + rcd_72_0 ≤ 0 ∧ rcd_72_0 − rcd_72_0 ≤ 0 ∧ − rcd_102_post + rcd_102_post ≤ 0 ∧ rcd_102_post − rcd_102_post ≤ 0 ∧ − rcd_102_0 + rcd_102_0 ≤ 0 ∧ rcd_102_0 − rcd_102_0 ≤ 0 ∧ − r_53_post + r_53_post ≤ 0 ∧ r_53_post − r_53_post ≤ 0 ∧ − r_53_0 + r_53_0 ≤ 0 ∧ r_53_0 − r_53_0 ≤ 0 ∧ − r_161_post + r_161_post ≤ 0 ∧ r_161_post − r_161_post ≤ 0 ∧ − r_161_0 + r_161_0 ≤ 0 ∧ r_161_0 − r_161_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 ≤ 0 ∧ − nondet_12_post + nondet_12_post ≤ 0 ∧ nondet_12_post − nondet_12_post ≤ 0 ∧ − nondet_12_1 + nondet_12_1 ≤ 0 ∧ nondet_12_1 − nondet_12_1 ≤ 0 ∧ − nondet_12_0 + nondet_12_0 ≤ 0 ∧ nondet_12_0 − nondet_12_0 ≤ 0 ∧ − lt_37_post + lt_37_post ≤ 0 ∧ lt_37_post − lt_37_post ≤ 0 ∧ − lt_37_1 + lt_37_1 ≤ 0 ∧ lt_37_1 − lt_37_1 ≤ 0 ∧ − lt_37_0 + lt_37_0 ≤ 0 ∧ lt_37_0 − lt_37_0 ≤ 0 ∧ − lt_36_post + lt_36_post ≤ 0 ∧ lt_36_post − lt_36_post ≤ 0 ∧ − lt_36_0 + lt_36_0 ≤ 0 ∧ lt_36_0 − lt_36_0 ≤ 0 ∧ − lt_237_post + lt_237_post ≤ 0 ∧ lt_237_post − lt_237_post ≤ 0 ∧ − lt_237_0 + lt_237_0 ≤ 0 ∧ lt_237_0 − lt_237_0 ≤ 0 ∧ − length_43_post + length_43_post ≤ 0 ∧ length_43_post − length_43_post ≤ 0 ∧ − length_43_0 + length_43_0 ≤ 0 ∧ length_43_0 − length_43_0 ≤ 0 ∧ − len_246_post + len_246_post ≤ 0 ∧ len_246_post − len_246_post ≤ 0 ∧ − len_246_0 + len_246_0 ≤ 0 ∧ len_246_0 − len_246_0 ≤ 0 ∧ − len_180_post + len_180_post ≤ 0 ∧ len_180_post − len_180_post ≤ 0 ∧ − len_180_0 + len_180_0 ≤ 0 ∧ len_180_0 − len_180_0 ≤ 0 ∧ − i_44_post + i_44_post ≤ 0 ∧ i_44_post − i_44_post ≤ 0 ∧ − i_44_0 + i_44_0 ≤ 0 ∧ i_44_0 − i_44_0 ≤ 0 ∧ − i_125_post + i_125_post ≤ 0 ∧ i_125_post − i_125_post ≤ 0 ∧ − i_125_0 + i_125_0 ≤ 0 ∧ i_125_0 − i_125_0 ≤ 0 ∧ − i_108_post + i_108_post ≤ 0 ∧ i_108_post − i_108_post ≤ 0 ∧ − i_108_0 + i_108_0 ≤ 0 ∧ i_108_0 − i_108_0 ≤ 0 ∧ − head_46_post + head_46_post ≤ 0 ∧ head_46_post − head_46_post ≤ 0 ∧ − head_46_0 + head_46_0 ≤ 0 ∧ head_46_0 − head_46_0 ≤ 0 ∧ − fmt_31_post + fmt_31_post ≤ 0 ∧ fmt_31_post − fmt_31_post ≤ 0 ∧ − fmt_31_4 + fmt_31_4 ≤ 0 ∧ fmt_31_4 − fmt_31_4 ≤ 0 ∧ − fmt_31_3 + fmt_31_3 ≤ 0 ∧ fmt_31_3 − fmt_31_3 ≤ 0 ∧ − fmt_31_2 + fmt_31_2 ≤ 0 ∧ fmt_31_2 − fmt_31_2 ≤ 0 ∧ − fmt_31_1 + fmt_31_1 ≤ 0 ∧ fmt_31_1 − fmt_31_1 ≤ 0 ∧ − fmt_31_0 + fmt_31_0 ≤ 0 ∧ fmt_31_0 − fmt_31_0 ≤ 0 ∧ − ct_17_post + ct_17_post ≤ 0 ∧ ct_17_post − ct_17_post ≤ 0 ∧ − ct_17_2 + ct_17_2 ≤ 0 ∧ ct_17_2 − ct_17_2 ≤ 0 ∧ − ct_17_1 + ct_17_1 ≤ 0 ∧ ct_17_1 − ct_17_1 ≤ 0 ∧ − ct_17_0 + ct_17_0 ≤ 0 ∧ ct_17_0 − ct_17_0 ≤ 0 ∧ − a_328_post + a_328_post ≤ 0 ∧ a_328_post − a_328_post ≤ 0 ∧ − a_328_0 + a_328_0 ≤ 0 ∧ a_328_0 − a_328_0 ≤ 0 ∧ − a_305_post + a_305_post ≤ 0 ∧ a_305_post − a_305_post ≤ 0 ∧ − a_305_0 + a_305_0 ≤ 0 ∧ a_305_0 − a_305_0 ≤ 0 ∧ − a_283_post + a_283_post ≤ 0 ∧ a_283_post − a_283_post ≤ 0 ∧ − a_283_0 + a_283_0 ≤ 0 ∧ a_283_0 − a_283_0 ≤ 0 ∧ − a_26_post + a_26_post ≤ 0 ∧ a_26_post − a_26_post ≤ 0 ∧ − a_26_1 + a_26_1 ≤ 0 ∧ a_26_1 − a_26_1 ≤ 0 ∧ − a_26_0 + a_26_0 ≤ 0 ∧ a_26_0 − a_26_0 ≤ 0 ∧ − a_247_post + a_247_post ≤ 0 ∧ a_247_post − a_247_post ≤ 0 ∧ − a_247_0 + a_247_0 ≤ 0 ∧ a_247_0 − a_247_0 ≤ 0 ∧ − a_197_post + a_197_post ≤ 0 ∧ a_197_post − a_197_post ≤ 0 ∧ − a_197_0 + a_197_0 ≤ 0 ∧ a_197_0 − a_197_0 ≤ 0 ∧ − a_146_0 + a_146_0 ≤ 0 ∧ a_146_0 − a_146_0 ≤ 0
The following skip-transition is inserted and corresponding redirections w.r.t. the old location are performed.
115 : − y_19_post + y_19_post ≤ 0 ∧ y_19_post − y_19_post ≤ 0 ∧ − y_19_2 + y_19_2 ≤ 0 ∧ y_19_2 − y_19_2 ≤ 0 ∧ − y_19_1 + y_19_1 ≤ 0 ∧ y_19_1 − y_19_1 ≤ 0 ∧ − y_19_0 + y_19_0 ≤ 0 ∧ y_19_0 − y_19_0 ≤ 0 ∧ − x_SLAM_f_18_post + x_SLAM_f_18_post ≤ 0 ∧ x_SLAM_f_18_post − x_SLAM_f_18_post ≤ 0 ∧ − x_SLAM_f_18_2 + x_SLAM_f_18_2 ≤ 0 ∧ x_SLAM_f_18_2 − x_SLAM_f_18_2 ≤ 0 ∧ − x_SLAM_f_18_1 + x_SLAM_f_18_1 ≤ 0 ∧ x_SLAM_f_18_1 − x_SLAM_f_18_1 ≤ 0 ∧ − x_SLAM_f_18_0 + x_SLAM_f_18_0 ≤ 0 ∧ x_SLAM_f_18_0 − x_SLAM_f_18_0 ≤ 0 ∧ − x_34_post + x_34_post ≤ 0 ∧ x_34_post − x_34_post ≤ 0 ∧ − x_34_1 + x_34_1 ≤ 0 ∧ x_34_1 − x_34_1 ≤ 0 ∧ − x_34_0 + x_34_0 ≤ 0 ∧ x_34_0 − x_34_0 ≤ 0 ∧ − x_28_post + x_28_post ≤ 0 ∧ x_28_post − x_28_post ≤ 0 ∧ − x_28_1 + x_28_1 ≤ 0 ∧ x_28_1 − x_28_1 ≤ 0 ∧ − x_28_0 + x_28_0 ≤ 0 ∧ x_28_0 − x_28_0 ≤ 0 ∧ − x_238_post + x_238_post ≤ 0 ∧ x_238_post − x_238_post ≤ 0 ∧ − x_238_0 + x_238_0 ≤ 0 ∧ x_238_0 − x_238_0 ≤ 0 ∧ − x_20_post + x_20_post ≤ 0 ∧ x_20_post − x_20_post ≤ 0 ∧ − x_20_2 + x_20_2 ≤ 0 ∧ x_20_2 − x_20_2 ≤ 0 ∧ − x_20_1 + x_20_1 ≤ 0 ∧ x_20_1 − x_20_1 ≤ 0 ∧ − x_20_0 + x_20_0 ≤ 0 ∧ x_20_0 − x_20_0 ≤ 0 ∧ − x_177_post + x_177_post ≤ 0 ∧ x_177_post − x_177_post ≤ 0 ∧ − x_177_0 + x_177_0 ≤ 0 ∧ x_177_0 − x_177_0 ≤ 0 ∧ − x_16_post + x_16_post ≤ 0 ∧ x_16_post − x_16_post ≤ 0 ∧ − x_16_1 + x_16_1 ≤ 0 ∧ x_16_1 − x_16_1 ≤ 0 ∧ − x_16_0 + x_16_0 ≤ 0 ∧ x_16_0 − x_16_0 ≤ 0 ∧ − x_14_post + x_14_post ≤ 0 ∧ x_14_post − x_14_post ≤ 0 ∧ − x_14_0 + x_14_0 ≤ 0 ∧ x_14_0 − x_14_0 ≤ 0 ∧ − tmp_48_post + tmp_48_post ≤ 0 ∧ tmp_48_post − tmp_48_post ≤ 0 ∧ − tmp_48_0 + tmp_48_0 ≤ 0 ∧ tmp_48_0 − tmp_48_0 ≤ 0 ∧ − temp_49_post + temp_49_post ≤ 0 ∧ temp_49_post − temp_49_post ≤ 0 ∧ − temp_49_0 + temp_49_0 ≤ 0 ∧ temp_49_0 − temp_49_0 ≤ 0 ∧ − temp0_45_post + temp0_45_post ≤ 0 ∧ temp0_45_post − temp0_45_post ≤ 0 ∧ − temp0_45_1 + temp0_45_1 ≤ 0 ∧ temp0_45_1 − temp0_45_1 ≤ 0 ∧ − temp0_45_0 + temp0_45_0 ≤ 0 ∧ temp0_45_0 − temp0_45_0 ≤ 0 ∧ − temp0_32_post + temp0_32_post ≤ 0 ∧ temp0_32_post − temp0_32_post ≤ 0 ∧ − temp0_32_4 + temp0_32_4 ≤ 0 ∧ temp0_32_4 − temp0_32_4 ≤ 0 ∧ − temp0_32_3 + temp0_32_3 ≤ 0 ∧ temp0_32_3 − temp0_32_3 ≤ 0 ∧ − temp0_32_2 + temp0_32_2 ≤ 0 ∧ temp0_32_2 − temp0_32_2 ≤ 0 ∧ − temp0_32_1 + temp0_32_1 ≤ 0 ∧ temp0_32_1 − temp0_32_1 ≤ 0 ∧ − temp0_32_0 + temp0_32_0 ≤ 0 ∧ temp0_32_0 − temp0_32_0 ≤ 0 ∧ − temp0_15_0 + temp0_15_0 ≤ 0 ∧ temp0_15_0 − temp0_15_0 ≤ 0 ∧ − t_23_post + t_23_post ≤ 0 ∧ t_23_post − t_23_post ≤ 0 ∧ − t_23_1 + t_23_1 ≤ 0 ∧ t_23_1 − t_23_1 ≤ 0 ∧ − t_23_0 + t_23_0 ≤ 0 ∧ t_23_0 − t_23_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_3_30_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 + result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 − result_dot_printf_sdv_special_RETURN_VALUE_sdv_unique_name_2_40_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_post + result_dot_printf_sdv_special_RETURN_VALUE_41_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_post − result_dot_printf_sdv_special_RETURN_VALUE_41_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_1 + result_dot_printf_sdv_special_RETURN_VALUE_41_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_1 − result_dot_printf_sdv_special_RETURN_VALUE_41_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_41_0 + result_dot_printf_sdv_special_RETURN_VALUE_41_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_41_0 − result_dot_printf_sdv_special_RETURN_VALUE_41_0 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_post + result_dot_printf_sdv_special_RETURN_VALUE_38_post ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_post − result_dot_printf_sdv_special_RETURN_VALUE_38_post ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_1 + result_dot_printf_sdv_special_RETURN_VALUE_38_1 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_1 − result_dot_printf_sdv_special_RETURN_VALUE_38_1 ≤ 0 ∧ − result_dot_printf_sdv_special_RETURN_VALUE_38_0 + result_dot_printf_sdv_special_RETURN_VALUE_38_0 ≤ 0 ∧ result_dot_printf_sdv_special_RETURN_VALUE_38_0 − result_dot_printf_sdv_special_RETURN_VALUE_38_0 ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_post + result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_post − result_dot_nondet_sdv_special_RETURN_VALUE_13_post ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_1 + result_dot_nondet_sdv_special_RETURN_VALUE_13_1 ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_1 − result_dot_nondet_sdv_special_RETURN_VALUE_13_1 ≤ 0 ∧ − result_dot_nondet_sdv_special_RETURN_VALUE_13_0 + result_dot_nondet_sdv_special_RETURN_VALUE_13_0 ≤ 0 ∧ result_dot_nondet_sdv_special_RETURN_VALUE_13_0 − result_dot_nondet_sdv_special_RETURN_VALUE_13_0 ≤ 0 ∧ − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post + result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post ≤ 0 ∧ result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_post ≤ 0 ∧ − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 + result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 ≤ 0 ∧ result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 − result_dot_SLAyer_malloc_sdv_special_RETURN_VALUE_47_0 ≤ 0 ∧ − result_11_post + result_11_post ≤ 0 ∧ result_11_post − result_11_post ≤ 0 ∧ − result_11_6 + result_11_6 ≤ 0 ∧ result_11_6 − result_11_6 ≤ 0 ∧ − result_11_5 + result_11_5 ≤ 0 ∧ result_11_5 − result_11_5 ≤ 0 ∧ − result_11_4 + result_11_4 ≤ 0 ∧ result_11_4 − result_11_4 ≤ 0 ∧ − result_11_3 + result_11_3 ≤ 0 ∧ result_11_3 − result_11_3 ≤ 0 ∧ − result_11_2 + result_11_2 ≤ 0 ∧ result_11_2 − result_11_2 ≤ 0 ∧ − result_11_1 + result_11_1 ≤ 0 ∧ result_11_1 − result_11_1 ≤ 0 ∧ − result_11_0 + result_11_0 ≤ 0 ∧ result_11_0 − result_11_0 ≤ 0 ∧ − rcd_72_post + rcd_72_post ≤ 0 ∧ rcd_72_post − rcd_72_post ≤ 0 ∧ − rcd_72_0 + rcd_72_0 ≤ 0 ∧ rcd_72_0 − rcd_72_0 ≤ 0 ∧ − rcd_102_post + rcd_102_post ≤ 0 ∧ rcd_102_post − rcd_102_post ≤ 0 ∧ − rcd_102_0 + rcd_102_0 ≤ 0 ∧ rcd_102_0 − rcd_102_0 ≤ 0 ∧ − r_53_post + r_53_post ≤ 0 ∧ r_53_post − r_53_post ≤ 0 ∧ − r_53_0 + r_53_0 ≤ 0 ∧ r_53_0 − r_53_0 ≤ 0 ∧ − r_161_post + r_161_post ≤ 0 ∧ r_161_post − r_161_post ≤ 0 ∧ − r_161_0 + r_161_0 ≤ 0 ∧ r_161_0 − r_161_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_3_33_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_sdv_unique_name_2_29_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_35_0 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_post ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_1 ≤ 0 ∧ − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 + printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 ≤ 0 ∧ printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 − printf_dot_arg_dot_1_sdv_special_TEMPORARY_27_0 ≤ 0 ∧ − nondet_12_post + nondet_12_post ≤ 0 ∧ nondet_12_post − nondet_12_post ≤ 0 ∧ − nondet_12_1 + nondet_12_1 ≤ 0 ∧ nondet_12_1 − nondet_12_1 ≤ 0 ∧ − nondet_12_0 + nondet_12_0 ≤ 0 ∧ nondet_12_0 − nondet_12_0 ≤ 0 ∧ − lt_37_post + lt_37_post ≤ 0 ∧ lt_37_post − lt_37_post ≤ 0 ∧ − lt_37_1 + lt_37_1 ≤ 0 ∧ lt_37_1 − lt_37_1 ≤ 0 ∧ − lt_37_0 + lt_37_0 ≤ 0 ∧ lt_37_0 − lt_37_0 ≤ 0 ∧ − lt_36_post + lt_36_post ≤ 0 ∧ lt_36_post − lt_36_post ≤ 0 ∧ − lt_36_0 + lt_36_0 ≤ 0 ∧ lt_36_0 − lt_36_0 ≤ 0 ∧ − lt_237_post + lt_237_post ≤ 0 ∧ lt_237_post − lt_237_post ≤ 0 ∧ − lt_237_0 + lt_237_0 ≤ 0 ∧ lt_237_0 − lt_237_0 ≤ 0 ∧ − length_43_post + length_43_post ≤ 0 ∧ length_43_post − length_43_post ≤ 0 ∧ − length_43_0 + length_43_0 ≤ 0 ∧ length_43_0 − length_43_0 ≤ 0 ∧ − len_246_post + len_246_post ≤ 0 ∧ len_246_post − len_246_post ≤ 0 ∧ − len_246_0 + len_246_0 ≤ 0 ∧ len_246_0 − len_246_0 ≤ 0 ∧ − len_180_post + len_180_post ≤ 0 ∧ len_180_post − len_180_post ≤ 0 ∧ − len_180_0 + len_180_0 ≤ 0 ∧ len_180_0 − len_180_0 ≤ 0 ∧ − i_44_post + i_44_post ≤ 0 ∧ i_44_post − i_44_post ≤ 0 ∧ − i_44_0 + i_44_0 ≤ 0 ∧ i_44_0 − i_44_0 ≤ 0 ∧ − i_125_post + i_125_post ≤ 0 ∧ i_125_post − i_125_post ≤ 0 ∧ − i_125_0 + i_125_0 ≤ 0 ∧ i_125_0 − i_125_0 ≤ 0 ∧ − i_108_post + i_108_post ≤ 0 ∧ i_108_post − i_108_post ≤ 0 ∧ − i_108_0 + i_108_0 ≤ 0 ∧ i_108_0 − i_108_0 ≤ 0 ∧ − head_46_post + head_46_post ≤ 0 ∧ head_46_post − head_46_post ≤ 0 ∧ − head_46_0 + head_46_0 ≤ 0 ∧ head_46_0 − head_46_0 ≤ 0 ∧ − fmt_31_post + fmt_31_post ≤ 0 ∧ fmt_31_post − fmt_31_post ≤ 0 ∧ − fmt_31_4 + fmt_31_4 ≤ 0 ∧ fmt_31_4 − fmt_31_4 ≤ 0 ∧ − fmt_31_3 + fmt_31_3 ≤ 0 ∧ fmt_31_3 − fmt_31_3 ≤ 0 ∧ − fmt_31_2 + fmt_31_2 ≤ 0 ∧ fmt_31_2 − fmt_31_2 ≤ 0 ∧ − fmt_31_1 + fmt_31_1 ≤ 0 ∧ fmt_31_1 − fmt_31_1 ≤ 0 ∧ − fmt_31_0 + fmt_31_0 ≤ 0 ∧ fmt_31_0 − fmt_31_0 ≤ 0 ∧ − ct_17_post + ct_17_post ≤ 0 ∧ ct_17_post − ct_17_post ≤ 0 ∧ − ct_17_2 + ct_17_2 ≤ 0 ∧ ct_17_2 − ct_17_2 ≤ 0 ∧ − ct_17_1 + ct_17_1 ≤ 0 ∧ ct_17_1 − ct_17_1 ≤ 0 ∧ − ct_17_0 + ct_17_0 ≤ 0 ∧ ct_17_0 − ct_17_0 ≤ 0 ∧ − a_328_post + a_328_post ≤ 0 ∧ a_328_post − a_328_post ≤ 0 ∧ − a_328_0 + a_328_0 ≤ 0 ∧ a_328_0 − a_328_0 ≤ 0 ∧ − a_305_post + a_305_post ≤ 0 ∧ a_305_post − a_305_post ≤ 0 ∧ − a_305_0 + a_305_0 ≤ 0 ∧ a_305_0 − a_305_0 ≤ 0 ∧ − a_283_post + a_283_post ≤ 0 ∧ a_283_post − a_283_post ≤ 0 ∧ − a_283_0 + a_283_0 ≤ 0 ∧ a_283_0 − a_283_0 ≤ 0 ∧ − a_26_post + a_26_post ≤ 0 ∧ a_26_post − a_26_post ≤ 0 ∧ − a_26_1 + a_26_1 ≤ 0 ∧ a_26_1 − a_26_1 ≤ 0 ∧ − a_26_0 + a_26_0 ≤ 0 ∧ a_26_0 − a_26_0 ≤ 0 ∧ − a_247_post + a_247_post ≤ 0 ∧ a_247_post − a_247_post ≤ 0 ∧ − a_247_0 + a_247_0 ≤ 0 ∧ a_247_0 − a_247_0 ≤ 0 ∧ − a_197_post + a_197_post ≤ 0 ∧ a_197_post − a_197_post ≤ 0 ∧ − a_197_0 + a_197_0 ≤ 0 ∧ a_197_0 − a_197_0 ≤ 0 ∧ − a_146_0 + a_146_0 ≤ 0 ∧ a_146_0 − a_146_0 ≤ 0
We consider subproblems for each of the 3 SCC(s) of the program graph.
Here we consider the SCC { , , , , , , , , , }.
We remove transition using the following ranking functions, which are bounded by −4.
| : | −2 + 10⋅a_305_0 | 
| : | −4 + 10⋅a_305_0 | 
| : | −5 + 10⋅a_305_0 | 
| : | 4 + 10⋅a_328_0 | 
| : | 3 + 10⋅a_328_0 | 
| : | 2 + 10⋅a_328_0 | 
| : | 1 + 10⋅a_328_0 | 
| : | 10⋅a_305_0 | 
| : | −3 + 10⋅a_305_0 | 
| : | −1 + 10⋅a_305_0 | 
We remove transitions 101, 103, , , , , , , , , , , using the following ranking functions, which are bounded by −4.
| : | −3 | 
| : | 5 | 
| : | 4 | 
| : | 3 | 
| : | 2 | 
| : | 1 | 
| : | 0 | 
| : | −1 | 
| : | −4 | 
| : | −2 | 
We consider 1 subproblems corresponding to sets of cut-point transitions as follows.
There remain no cut-point transition to consider. Hence the cooperation termination is trivial.
Here we consider the SCC { , , , , , , , , }.
We remove transition using the following ranking functions, which are bounded by −3.
| : | −1 + 9⋅a_197_0 | 
| : | −3 + 9⋅a_197_0 | 
| : | −4 + 9⋅a_197_0 | 
| : | 4 + 9⋅a_247_0 | 
| : | 3 + 9⋅a_247_0 | 
| : | 2 + 9⋅a_247_0 | 
| : | 1 + 9⋅a_197_0 | 
| : | −2 + 9⋅a_197_0 | 
| : | 9⋅a_197_0 | 
We remove transitions 115, 117, , , , , , , , using the following ranking functions, which are bounded by −2.
| : | −1 | 
| : | 6 | 
| : | 5 | 
| : | 4 | 
| : | 3 | 
| : | 2 | 
| : | 1 | 
| : | −2 | 
| : | 0 | 
We remove transition using the following ranking functions, which are bounded by 0.
| : | 0 | 
| : | 0 | 
| : | 0 | 
| : | 1 | 
| : | 0 | 
| : | 0 | 
| : | 0 | 
| : | 0 | 
| : | 0 | 
We consider 1 subproblems corresponding to sets of cut-point transitions as follows.
There remain no cut-point transition to consider. Hence the cooperation termination is trivial.
Here we consider the SCC { , , , }.
We remove transition using the following ranking functions, which are bounded by 1.
| : | −1 − 4⋅i_44_0 + 4⋅length_43_0 | 
| : | 1 − 4⋅i_44_0 + 4⋅length_43_0 | 
| : | −2 − 4⋅i_44_0 + 4⋅length_43_0 | 
| : | −4⋅i_44_0 + 4⋅length_43_0 | 
We remove transitions 108, 110 using the following ranking functions, which are bounded by −2.
| : | −1 | 
| : | 1 | 
| : | −2 | 
| : | 0 | 
We remove transition using the following ranking functions, which are bounded by −1.
| : | 0 | 
| : | 0 | 
| : | 0 | 
| : | −1 | 
We consider 1 subproblems corresponding to sets of cut-point transitions as follows.
There remain no cut-point transition to consider. Hence the cooperation termination is trivial.
T2Cert